2 * omap_hwmod macros, structures
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011 Texas Instruments, Inc.
8 * Created in collaboration with (alphabetical order): BenoƮt Cousson,
9 * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
10 * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
16 * These headers and macros are used to define OMAP on-chip module
17 * data and their integration with other OMAP modules and Linux.
18 * Copious documentation and references can also be found in the
19 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
23 * - add interconnect error log structures
25 * - init_conn_id_bit (CONNID_BIT_VECTOR)
26 * - implement default hwmod SMS/SDRC flags?
27 * - move Linux-specific data ("non-ROM data") out
30 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
31 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
33 #include <linux/kernel.h>
34 #include <linux/init.h>
35 #include <linux/list.h>
36 #include <linux/ioport.h>
37 #include <linux/spinlock.h>
42 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
43 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
46 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
47 * with the original PRCM protocol defined for OMAP2420
49 #define SYSC_TYPE1_MIDLEMODE_SHIFT 12
50 #define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_TYPE1_MIDLEMODE_SHIFT)
51 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
52 #define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_TYPE1_CLOCKACTIVITY_SHIFT)
53 #define SYSC_TYPE1_SIDLEMODE_SHIFT 3
54 #define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_TYPE1_SIDLEMODE_SHIFT)
55 #define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
56 #define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_TYPE1_ENAWAKEUP_SHIFT)
57 #define SYSC_TYPE1_SOFTRESET_SHIFT 1
58 #define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_TYPE1_SOFTRESET_SHIFT)
59 #define SYSC_TYPE1_AUTOIDLE_SHIFT 0
60 #define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_TYPE1_AUTOIDLE_SHIFT)
63 * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
64 * with the new PRCM protocol defined for new OMAP4 IPs.
66 #define SYSC_TYPE2_SOFTRESET_SHIFT 0
67 #define SYSC_TYPE2_SOFTRESET_MASK (1 << SYSC_TYPE2_SOFTRESET_SHIFT)
68 #define SYSC_TYPE2_SIDLEMODE_SHIFT 2
69 #define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
70 #define SYSC_TYPE2_MIDLEMODE_SHIFT 4
71 #define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
73 /* OCP SYSSTATUS bit shifts/masks */
74 #define SYSS_RESETDONE_SHIFT 0
75 #define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT)
77 /* Master standby/slave idle mode flags */
78 #define HWMOD_IDLEMODE_FORCE (1 << 0)
79 #define HWMOD_IDLEMODE_NO (1 << 1)
80 #define HWMOD_IDLEMODE_SMART (1 << 2)
81 #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3)
83 /* modulemode control type (SW or HW) */
84 #define MODULEMODE_HWCTRL 1
85 #define MODULEMODE_SWCTRL 2
89 * struct omap_hwmod_mux_info - hwmod specific mux configuration
90 * @pads: array of omap_device_pad entries
91 * @nr_pads: number of omap_device_pad entries
93 * Note that this is currently built during init as needed.
95 struct omap_hwmod_mux_info {
97 struct omap_device_pad *pads;
99 struct omap_device_pad **pads_dynamic;
105 * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
106 * @name: name of the IRQ channel (module local name)
107 * @irq: IRQ channel ID (should be non-negative except -1 = terminator)
109 * @name should be something short, e.g., "tx" or "rx". It is for use
110 * by platform_get_resource_byname(). It is defined locally to the
113 struct omap_hwmod_irq_info {
119 * struct omap_hwmod_dma_info - DMA channels used by the hwmod
120 * @name: name of the DMA channel (module local name)
121 * @dma_req: DMA request ID (should be non-negative except -1 = terminator)
123 * @name should be something short, e.g., "tx" or "rx". It is for use
124 * by platform_get_resource_byname(). It is defined locally to the
127 struct omap_hwmod_dma_info {
133 * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
134 * @name: name of the reset line (module local name)
135 * @rst_shift: Offset of the reset bit
136 * @st_shift: Offset of the reset status bit (OMAP2/3 only)
138 * @name should be something short, e.g., "cpu0" or "rst". It is defined
139 * locally to the hwmod.
141 struct omap_hwmod_rst_info {
148 * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
149 * @role: "sys", "32k", "tv", etc -- for use in clk_get()
150 * @clk: opt clock: OMAP clock name
151 * @_clk: pointer to the struct clk (filled in at runtime)
153 * The module's interface clock and main functional clock should not
154 * be added as optional clocks.
156 struct omap_hwmod_opt_clk {
163 /* omap_hwmod_omap2_firewall.flags bits */
164 #define OMAP_FIREWALL_L3 (1 << 0)
165 #define OMAP_FIREWALL_L4 (1 << 1)
168 * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
169 * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
170 * @l4_fw_region: L4 firewall region ID
171 * @l4_prot_group: L4 protection group ID
172 * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
174 struct omap_hwmod_omap2_firewall {
183 * omap_hwmod_addr_space.flags bits
185 * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
186 * ADDR_TYPE_RT: Address space contains module register target data.
188 #define ADDR_MAP_ON_INIT (1 << 0) /* XXX does not belong */
189 #define ADDR_TYPE_RT (1 << 1)
192 * struct omap_hwmod_addr_space - address space handled by the hwmod
193 * @name: name of the address space
194 * @pa_start: starting physical address
195 * @pa_end: ending physical address
196 * @flags: (see omap_hwmod_addr_space.flags macros above)
198 * Address space doesn't necessarily follow physical interconnect
199 * structure. GPMC is one example.
201 struct omap_hwmod_addr_space {
210 * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
211 * interface to interact with the hwmod. Used to add sleep dependencies
212 * when the module is enabled or disabled.
214 #define OCP_USER_MPU (1 << 0)
215 #define OCP_USER_SDMA (1 << 1)
216 #define OCP_USER_DSP (1 << 2)
217 #define OCP_USER_IVA (1 << 3)
219 /* omap_hwmod_ocp_if.flags bits */
220 #define OCPIF_SWSUP_IDLE (1 << 0)
221 #define OCPIF_CAN_BURST (1 << 1)
223 /* omap_hwmod_ocp_if._int_flags possibilities */
224 #define _OCPIF_INT_FLAGS_REGISTERED (1 << 0)
228 * struct omap_hwmod_ocp_if - OCP interface data
229 * @master: struct omap_hwmod that initiates OCP transactions on this link
230 * @slave: struct omap_hwmod that responds to OCP transactions on this link
231 * @addr: address space associated with this link
232 * @clk: interface clock: OMAP clock name
233 * @_clk: pointer to the interface struct clk (filled in at runtime)
234 * @fw: interface firewall data
235 * @width: OCP data width
236 * @user: initiators using this interface (see OCP_USER_* macros above)
237 * @flags: OCP interface flags (see OCPIF_* macros above)
238 * @_int_flags: internal flags (see _OCPIF_INT_FLAGS* macros above)
240 * It may also be useful to add a tag_cnt field for OCP2.x devices.
242 * Parameter names beginning with an underscore are managed internally by
243 * the omap_hwmod code and should not be set during initialization.
245 struct omap_hwmod_ocp_if {
246 struct omap_hwmod *master;
247 struct omap_hwmod *slave;
248 struct omap_hwmod_addr_space *addr;
252 struct omap_hwmod_omap2_firewall omap2;
261 /* Macros for use in struct omap_hwmod_sysconfig */
263 /* Flags for use in omap_hwmod_sysconfig.idlemodes */
264 #define MASTER_STANDBY_SHIFT 4
265 #define SLAVE_IDLE_SHIFT 0
266 #define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
267 #define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
268 #define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
269 #define SIDLE_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << SLAVE_IDLE_SHIFT)
270 #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
271 #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
272 #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
273 #define MSTANDBY_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT)
275 /* omap_hwmod_sysconfig.sysc_flags capability flags */
276 #define SYSC_HAS_AUTOIDLE (1 << 0)
277 #define SYSC_HAS_SOFTRESET (1 << 1)
278 #define SYSC_HAS_ENAWAKEUP (1 << 2)
279 #define SYSC_HAS_EMUFREE (1 << 3)
280 #define SYSC_HAS_CLOCKACTIVITY (1 << 4)
281 #define SYSC_HAS_SIDLEMODE (1 << 5)
282 #define SYSC_HAS_MIDLEMODE (1 << 6)
283 #define SYSS_HAS_RESET_STATUS (1 << 7)
284 #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */
285 #define SYSC_HAS_RESET_STATUS (1 << 9)
287 /* omap_hwmod_sysconfig.clockact flags */
288 #define CLOCKACT_TEST_BOTH 0x0
289 #define CLOCKACT_TEST_MAIN 0x1
290 #define CLOCKACT_TEST_ICLK 0x2
291 #define CLOCKACT_TEST_NONE 0x3
294 * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.
295 * @midle_shift: Offset of the midle bit
296 * @clkact_shift: Offset of the clockactivity bit
297 * @sidle_shift: Offset of the sidle bit
298 * @enwkup_shift: Offset of the enawakeup bit
299 * @srst_shift: Offset of the softreset bit
300 * @autoidle_shift: Offset of the autoidle bit
302 struct omap_hwmod_sysc_fields {
312 * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data
313 * @rev_offs: IP block revision register offset (from module base addr)
314 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
315 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
316 * @srst_udelay: Delay needed after doing a softreset in usecs
317 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
318 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
319 * @clockact: the default value of the module CLOCKACTIVITY bits
321 * @clockact describes to the module which clocks are likely to be
322 * disabled when the PRCM issues its idle request to the module. Some
323 * modules have separate clockdomains for the interface clock and main
324 * functional clock, and can check whether they should acknowledge the
325 * idle request based on the internal module functionality that has
326 * been associated with the clocks marked in @clockact. This field is
327 * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
329 * @sysc_fields: structure containing the offset positions of various bits in
330 * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or
331 * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on
332 * whether the device ip is compliant with the original PRCM protocol
333 * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs.
334 * If the device follows a different scheme for the sysconfig register ,
335 * then this field has to be populated with the correct offset structure.
337 struct omap_hwmod_class_sysconfig {
342 struct omap_hwmod_sysc_fields *sysc_fields;
349 * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
350 * @module_offs: PRCM submodule offset from the start of the PRM/CM
351 * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
352 * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
353 * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
354 * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
355 * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
357 * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
358 * WKEN, GRPSEL registers. In an ideal world, no extra information
359 * would be needed for IDLEST information, but alas, there are some
360 * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
361 * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
363 struct omap_hwmod_omap2_prcm {
374 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
375 * @clkctrl_reg: PRCM address of the clock control register
376 * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM
377 * @submodule_wkdep_bit: bit shift of the WKDEP range
379 struct omap_hwmod_omap4_prcm {
383 u8 submodule_wkdep_bit;
389 * omap_hwmod.flags definitions
391 * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
392 * of idle, rather than relying on module smart-idle
393 * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
394 * of standby, rather than relying on module smart-standby
395 * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
396 * SDRAM controller, etc. XXX probably belongs outside the main hwmod file
397 * XXX Should be HWMOD_SETUP_NO_RESET
398 * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
399 * controller, etc. XXX probably belongs outside the main hwmod file
400 * XXX Should be HWMOD_SETUP_NO_IDLE
401 * HWMOD_NO_OCP_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
402 * when module is enabled, rather than the default, which is to
404 * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
405 * HWMOD_NO_IDLEST: this module does not have idle status - this is the case
406 * only for few initiator modules on OMAP2 & 3.
407 * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset.
408 * This is needed for devices like DSS that require optional clocks enabled
409 * in order to complete the reset. Optional clocks will be disabled
410 * again after the reset.
411 * HWMOD_16BIT_REG: Module has 16bit registers
413 #define HWMOD_SWSUP_SIDLE (1 << 0)
414 #define HWMOD_SWSUP_MSTANDBY (1 << 1)
415 #define HWMOD_INIT_NO_RESET (1 << 2)
416 #define HWMOD_INIT_NO_IDLE (1 << 3)
417 #define HWMOD_NO_OCP_AUTOIDLE (1 << 4)
418 #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5)
419 #define HWMOD_NO_IDLEST (1 << 6)
420 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7)
421 #define HWMOD_16BIT_REG (1 << 8)
424 * omap_hwmod._int_flags definitions
425 * These are for internal use only and are managed by the omap_hwmod code.
427 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
428 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
429 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
430 * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) -
431 * causes the first call to _enable() to only update the pinmux
433 #define _HWMOD_NO_MPU_PORT (1 << 0)
434 #define _HWMOD_WAKEUP_ENABLED (1 << 1)
435 #define _HWMOD_SYSCONFIG_LOADED (1 << 2)
436 #define _HWMOD_SKIP_ENABLE (1 << 3)
439 * omap_hwmod._state definitions
441 * INITIALIZED: reset (optionally), initialized, enabled, disabled
446 #define _HWMOD_STATE_UNKNOWN 0
447 #define _HWMOD_STATE_REGISTERED 1
448 #define _HWMOD_STATE_CLKS_INITED 2
449 #define _HWMOD_STATE_INITIALIZED 3
450 #define _HWMOD_STATE_ENABLED 4
451 #define _HWMOD_STATE_IDLE 5
452 #define _HWMOD_STATE_DISABLED 6
455 * struct omap_hwmod_class - the type of an IP block
456 * @name: name of the hwmod_class
457 * @sysc: device SYSCONFIG/SYSSTATUS register data
458 * @rev: revision of the IP class
459 * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown
460 * @reset: ptr to fn to be executed in place of the standard hwmod reset fn
462 * Represent the class of a OMAP hardware "modules" (e.g. timer,
463 * smartreflex, gpio, uart...)
465 * @pre_shutdown is a function that will be run immediately before
466 * hwmod clocks are disabled, etc. It is intended for use for hwmods
467 * like the MPU watchdog, which cannot be disabled with the standard
468 * omap_hwmod_shutdown(). The function should return 0 upon success,
469 * or some negative error upon failure. Returning an error will cause
470 * omap_hwmod_shutdown() to abort the device shutdown and return an
473 * If @reset is defined, then the function it points to will be
474 * executed in place of the standard hwmod _reset() code in
475 * mach-omap2/omap_hwmod.c. This is needed for IP blocks which have
476 * unusual reset sequences - usually processor IP blocks like the IVA.
478 struct omap_hwmod_class {
480 struct omap_hwmod_class_sysconfig *sysc;
482 int (*pre_shutdown)(struct omap_hwmod *oh);
483 int (*reset)(struct omap_hwmod *oh);
487 * struct omap_hwmod_link - internal structure linking hwmods with ocp_ifs
488 * @ocp_if: OCP interface structure record pointer
489 * @node: list_head pointing to next struct omap_hwmod_link in a list
491 struct omap_hwmod_link {
492 struct omap_hwmod_ocp_if *ocp_if;
493 struct list_head node;
497 * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
498 * @name: name of the hwmod
499 * @class: struct omap_hwmod_class * to the class of this hwmod
500 * @od: struct omap_device currently associated with this hwmod (internal use)
501 * @mpu_irqs: ptr to an array of MPU IRQs
502 * @sdma_reqs: ptr to an array of System DMA request IDs
503 * @prcm: PRCM data pertaining to this hwmod
504 * @main_clk: main clock: OMAP clock name
505 * @_clk: pointer to the main struct clk (filled in at runtime)
506 * @opt_clks: other device clocks that drivers can request (0..*)
507 * @voltdm: pointer to voltage domain (filled in at runtime)
508 * @dev_attr: arbitrary device attributes that can be passed to the driver
509 * @_sysc_cache: internal-use hwmod flags
510 * @_mpu_rt_va: cached register target start address (internal use)
511 * @_mpu_port: cached MPU register target slave (internal use)
512 * @opt_clks_cnt: number of @opt_clks
513 * @master_cnt: number of @master entries
514 * @slaves_cnt: number of @slave entries
515 * @response_lat: device OCP response latency (in interface clock cycles)
516 * @_int_flags: internal-use hwmod flags
517 * @_state: internal-use hwmod state
518 * @_postsetup_state: internal-use state to leave the hwmod in after _setup()
519 * @flags: hwmod flags (documented below)
520 * @_lock: spinlock serializing operations on this hwmod
521 * @node: list node for hwmod list (internal use)
523 * @main_clk refers to this module's "main clock," which for our
524 * purposes is defined as "the functional clock needed for register
525 * accesses to complete." Modules may not have a main clock if the
526 * interface clock also serves as a main clock.
528 * Parameter names beginning with an underscore are managed internally by
529 * the omap_hwmod code and should not be set during initialization.
531 * @masters and @slaves are now deprecated.
535 struct omap_hwmod_class *class;
536 struct omap_device *od;
537 struct omap_hwmod_mux_info *mux;
538 struct omap_hwmod_irq_info *mpu_irqs;
539 struct omap_hwmod_dma_info *sdma_reqs;
540 struct omap_hwmod_rst_info *rst_lines;
542 struct omap_hwmod_omap2_prcm omap2;
543 struct omap_hwmod_omap4_prcm omap4;
545 const char *main_clk;
547 struct omap_hwmod_opt_clk *opt_clks;
549 struct clockdomain *clkdm;
550 struct list_head master_ports; /* connect to *_IA */
551 struct list_head slave_ports; /* connect to *_TA */
554 void __iomem *_mpu_rt_va;
556 struct list_head node;
557 struct omap_hwmod_ocp_if *_mpu_port;
570 struct omap_hwmod *omap_hwmod_lookup(const char *name);
571 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
574 int __init omap_hwmod_setup_one(const char *name);
576 int omap_hwmod_enable(struct omap_hwmod *oh);
577 int _omap_hwmod_enable(struct omap_hwmod *oh);
578 int omap_hwmod_idle(struct omap_hwmod *oh);
579 int _omap_hwmod_idle(struct omap_hwmod *oh);
580 int omap_hwmod_shutdown(struct omap_hwmod *oh);
582 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name);
583 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name);
584 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
586 int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
587 int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
589 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
590 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle);
592 int omap_hwmod_reset(struct omap_hwmod *oh);
593 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
595 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
596 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
597 int omap_hwmod_softreset(struct omap_hwmod *oh);
599 int omap_hwmod_count_resources(struct omap_hwmod *oh);
600 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
601 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
602 const char *name, struct resource *res);
604 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
605 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);
607 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
608 struct omap_hwmod *init_oh);
609 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
610 struct omap_hwmod *init_oh);
612 int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
613 int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
614 int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
615 int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
617 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
618 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
620 int omap_hwmod_for_each_by_class(const char *classname,
621 int (*fn)(struct omap_hwmod *oh,
625 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
626 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
628 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
630 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
633 * Chip variant-specific hwmod init routines - XXX should be converted
634 * to use initcalls once the initial boot ordering is straightened out
636 extern int omap2420_hwmod_init(void);
637 extern int omap2430_hwmod_init(void);
638 extern int omap3xxx_hwmod_init(void);
639 extern int omap44xx_hwmod_init(void);
641 extern int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois);