Merge branch 'wimax-2.6.35.y' of git://git.kernel.org/pub/scm/linux/kernel/git/inaky...
[pandora-kernel.git] / arch / arm / plat-omap / i2c.c
1 /*
2  * linux/arch/arm/plat-omap/i2c.c
3  *
4  * Helper module for board specific I2C bus registration
5  *
6  * Copyright (C) 2007 Nokia Corporation.
7  *
8  * Contact: Jarkko Nikula <jhnikula@gmail.com>
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License
12  * version 2 as published by the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful, but
15  * WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17  * General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22  * 02110-1301 USA
23  *
24  */
25
26 #include <linux/kernel.h>
27 #include <linux/platform_device.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c-omap.h>
30
31 #include <mach/irqs.h>
32 #include <plat/mux.h>
33 #include <plat/i2c.h>
34 #include <plat/omap-pm.h>
35
36 #define OMAP_I2C_SIZE           0x3f
37 #define OMAP1_I2C_BASE          0xfffb3800
38 #define OMAP2_I2C_BASE1         0x48070000
39 #define OMAP2_I2C_BASE2         0x48072000
40 #define OMAP2_I2C_BASE3         0x48060000
41
42 static const char name[] = "i2c_omap";
43
44 #define I2C_RESOURCE_BUILDER(base, irq)                 \
45         {                                               \
46                 .start  = (base),                       \
47                 .end    = (base) + OMAP_I2C_SIZE,       \
48                 .flags  = IORESOURCE_MEM,               \
49         },                                              \
50         {                                               \
51                 .start  = (irq),                        \
52                 .flags  = IORESOURCE_IRQ,               \
53         },
54
55 static struct resource i2c_resources[][2] = {
56         { I2C_RESOURCE_BUILDER(0, 0) },
57 #if     defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
58         { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) },
59 #endif
60 #if     defined(CONFIG_ARCH_OMAP3)
61         { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_34XX_I2C3_IRQ) },
62 #endif
63 };
64
65 #define I2C_DEV_BUILDER(bus_id, res, data)              \
66         {                                               \
67                 .id     = (bus_id),                     \
68                 .name   = name,                         \
69                 .num_resources  = ARRAY_SIZE(res),      \
70                 .resource       = (res),                \
71                 .dev            = {                     \
72                         .platform_data  = (data),       \
73                 },                                      \
74         }
75
76 static struct omap_i2c_bus_platform_data i2c_pdata[ARRAY_SIZE(i2c_resources)];
77 static struct platform_device omap_i2c_devices[] = {
78         I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
79 #if     defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
80         I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_pdata[1]),
81 #endif
82 #if     defined(CONFIG_ARCH_OMAP3)
83         I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_pdata[2]),
84 #endif
85 };
86
87 #define OMAP_I2C_CMDLINE_SETUP  (BIT(31))
88
89 static int __init omap_i2c_nr_ports(void)
90 {
91         int ports = 0;
92
93         if (cpu_class_is_omap1())
94                 ports = 1;
95         else if (cpu_is_omap24xx())
96                 ports = 2;
97         else if (cpu_is_omap34xx())
98                 ports = 3;
99
100         return ports;
101 }
102
103 static int __init omap_i2c_add_bus(int bus_id)
104 {
105         struct platform_device *pdev;
106         struct omap_i2c_bus_platform_data *pd;
107         struct resource *res;
108         resource_size_t base, irq;
109
110         pdev = &omap_i2c_devices[bus_id - 1];
111         pd = pdev->dev.platform_data;
112         if (bus_id == 1) {
113                 res = pdev->resource;
114                 if (cpu_class_is_omap1()) {
115                         base = OMAP1_I2C_BASE;
116                         irq = INT_I2C;
117                 } else {
118                         base = OMAP2_I2C_BASE1;
119                         irq = INT_24XX_I2C1_IRQ;
120                 }
121                 res[0].start = base;
122                 res[0].end = base + OMAP_I2C_SIZE;
123                 res[1].start = irq;
124         }
125
126         if (cpu_class_is_omap1())
127                 omap1_i2c_mux_pins(bus_id);
128         if (cpu_class_is_omap2())
129                 omap2_i2c_mux_pins(bus_id);
130
131         /*
132          * When waiting for completion of a i2c transfer, we need to
133          * set a wake up latency constraint for the MPU. This is to
134          * ensure quick enough wakeup from idle, when transfer
135          * completes.
136          */
137         if (cpu_is_omap34xx())
138                 pd->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat;
139
140         return platform_device_register(pdev);
141 }
142
143 /**
144  * omap_i2c_bus_setup - Process command line options for the I2C bus speed
145  * @str: String of options
146  *
147  * This function allow to override the default I2C bus speed for given I2C
148  * bus with a command line option.
149  *
150  * Format: i2c_bus=bus_id,clkrate (in kHz)
151  *
152  * Returns 1 on success, 0 otherwise.
153  */
154 static int __init omap_i2c_bus_setup(char *str)
155 {
156         int ports;
157         int ints[3];
158
159         ports = omap_i2c_nr_ports();
160         get_options(str, 3, ints);
161         if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
162                 return 0;
163         i2c_pdata[ints[1] - 1].clkrate = ints[2];
164         i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
165
166         return 1;
167 }
168 __setup("i2c_bus=", omap_i2c_bus_setup);
169
170 /*
171  * Register busses defined in command line but that are not registered with
172  * omap_register_i2c_bus from board initialization code.
173  */
174 static int __init omap_register_i2c_bus_cmdline(void)
175 {
176         int i, err = 0;
177
178         for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
179                 if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
180                         i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
181                         err = omap_i2c_add_bus(i + 1);
182                         if (err)
183                                 goto out;
184                 }
185
186 out:
187         return err;
188 }
189 subsys_initcall(omap_register_i2c_bus_cmdline);
190
191 /**
192  * omap_register_i2c_bus - register I2C bus with device descriptors
193  * @bus_id: bus id counting from number 1
194  * @clkrate: clock rate of the bus in kHz
195  * @info: pointer into I2C device descriptor table or NULL
196  * @len: number of descriptors in the table
197  *
198  * Returns 0 on success or an error code.
199  */
200 int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
201                           struct i2c_board_info const *info,
202                           unsigned len)
203 {
204         int err;
205
206         BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
207
208         if (info) {
209                 err = i2c_register_board_info(bus_id, info, len);
210                 if (err)
211                         return err;
212         }
213
214         if (!i2c_pdata[bus_id - 1].clkrate)
215                 i2c_pdata[bus_id - 1].clkrate = clkrate;
216
217         i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
218
219         return omap_i2c_add_bus(bus_id);
220 }