2 * arch/arm/plat-iop/time.c
4 * Timer code for IOP32x and IOP33x based systems
6 * Author: Deepak Saxena <dsaxena@mvista.com>
8 * Copyright 2002-2003 MontaVista Software Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/kernel.h>
17 #include <linux/interrupt.h>
18 #include <linux/time.h>
19 #include <linux/init.h>
20 #include <linux/timex.h>
21 #include <linux/sched.h>
23 #include <linux/clocksource.h>
24 #include <linux/clockchips.h>
25 #include <mach/hardware.h>
27 #include <asm/sched_clock.h>
28 #include <asm/uaccess.h>
29 #include <asm/mach/irq.h>
30 #include <asm/mach/time.h>
31 #include <mach/time.h>
34 * Minimum clocksource/clockevent timer range in seconds
36 #define IOP_MIN_RANGE 4
39 * IOP clocksource (free-running timer 1).
41 static cycle_t notrace iop_clocksource_read(struct clocksource *unused)
43 return 0xffffffffu - read_tcr1();
46 static struct clocksource iop_clocksource = {
49 .read = iop_clocksource_read,
50 .mask = CLOCKSOURCE_MASK(32),
51 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
54 static DEFINE_CLOCK_DATA(cd);
57 * IOP sched_clock() implementation via its clocksource.
59 unsigned long long notrace sched_clock(void)
61 u32 cyc = 0xffffffffu - read_tcr1();
62 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
65 static void notrace iop_update_sched_clock(void)
67 u32 cyc = 0xffffffffu - read_tcr1();
68 update_sched_clock(&cd, cyc, (u32)~0);
72 * IOP clockevents (interrupting timer 0).
74 static int iop_set_next_event(unsigned long delta,
75 struct clock_event_device *unused)
77 u32 tmr = IOP_TMR_PRIVILEGED | IOP_TMR_RATIO_1_1;
80 write_tmr0(tmr & ~(IOP_TMR_EN | IOP_TMR_RELOAD));
82 write_tmr0((tmr & ~IOP_TMR_RELOAD) | IOP_TMR_EN);
87 static unsigned long ticks_per_jiffy;
89 static void iop_set_mode(enum clock_event_mode mode,
90 struct clock_event_device *unused)
92 u32 tmr = read_tmr0();
95 case CLOCK_EVT_MODE_PERIODIC:
96 write_tmr0(tmr & ~IOP_TMR_EN);
97 write_tcr0(ticks_per_jiffy - 1);
98 write_trr0(ticks_per_jiffy - 1);
99 tmr |= (IOP_TMR_RELOAD | IOP_TMR_EN);
101 case CLOCK_EVT_MODE_ONESHOT:
102 /* ->set_next_event sets period and enables timer */
103 tmr &= ~(IOP_TMR_RELOAD | IOP_TMR_EN);
105 case CLOCK_EVT_MODE_RESUME:
108 case CLOCK_EVT_MODE_SHUTDOWN:
109 case CLOCK_EVT_MODE_UNUSED:
118 static struct clock_event_device iop_clockevent = {
119 .name = "iop_timer0",
120 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
122 .set_next_event = iop_set_next_event,
123 .set_mode = iop_set_mode,
127 iop_timer_interrupt(int irq, void *dev_id)
129 struct clock_event_device *evt = dev_id;
132 evt->event_handler(evt);
136 static struct irqaction iop_timer_irq = {
137 .name = "IOP Timer Tick",
138 .handler = iop_timer_interrupt,
139 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
140 .dev_id = &iop_clockevent,
143 static unsigned long iop_tick_rate;
144 unsigned long get_iop_tick_rate(void)
146 return iop_tick_rate;
148 EXPORT_SYMBOL(get_iop_tick_rate);
150 void __init iop_init_time(unsigned long tick_rate)
154 init_sched_clock(&cd, iop_update_sched_clock, 32, tick_rate);
156 ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ);
157 iop_tick_rate = tick_rate;
159 timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED |
160 IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1;
163 * Set up interrupting clockevent timer 0.
165 write_tmr0(timer_ctl & ~IOP_TMR_EN);
167 setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq);
168 clockevents_calc_mult_shift(&iop_clockevent,
169 tick_rate, IOP_MIN_RANGE);
170 iop_clockevent.max_delta_ns =
171 clockevent_delta2ns(0xfffffffe, &iop_clockevent);
172 iop_clockevent.min_delta_ns =
173 clockevent_delta2ns(0xf, &iop_clockevent);
174 iop_clockevent.cpumask = cpumask_of(0);
175 clockevents_register_device(&iop_clockevent);
178 * Set up free-running clocksource timer 1.
180 write_trr1(0xffffffff);
181 write_tcr1(0xffffffff);
182 write_tmr1(timer_ctl);
183 clocksource_register_hz(&iop_clocksource, tick_rate);