2 * linux/arch/arm/mm/fault-armv.c
4 * Copyright (C) 1995 Linus Torvalds
5 * Modifications for ARM processor (c) 1995-2002 Russell King
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/sched.h>
13 #include <linux/kernel.h>
15 #include <linux/bitops.h>
16 #include <linux/vmalloc.h>
17 #include <linux/init.h>
18 #include <linux/pagemap.h>
19 #include <linux/gfp.h>
22 #include <asm/cacheflush.h>
23 #include <asm/cachetype.h>
24 #include <asm/pgtable.h>
25 #include <asm/tlbflush.h>
29 static pteval_t shared_pte_mask = L_PTE_MT_BUFFERABLE;
31 #if __LINUX_ARM_ARCH__ < 6
33 * We take the easy way out of this problem - we make the
34 * PTE uncacheable. However, we leave the write buffer on.
36 * Note that the pte lock held when calling update_mmu_cache must also
37 * guard the pte (somewhere else in the same mm) that we modify here.
38 * Therefore those configurations which might call adjust_pte (those
39 * without CONFIG_CPU_CACHE_VIPT) cannot support split page_table_lock.
41 static int do_adjust_pte(struct vm_area_struct *vma, unsigned long address,
42 unsigned long pfn, pte_t *ptep)
48 * If this page is present, it's actually being shared.
50 ret = pte_present(entry);
53 * If this page isn't present, or is already setup to
54 * fault (ie, is old), we can safely ignore any issues.
56 if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) {
57 flush_cache_page(vma, address, pfn);
58 outer_flush_range((pfn << PAGE_SHIFT),
59 (pfn << PAGE_SHIFT) + PAGE_SIZE);
60 pte_val(entry) &= ~L_PTE_MT_MASK;
61 pte_val(entry) |= shared_pte_mask;
62 set_pte_at(vma->vm_mm, address, ptep, entry);
63 flush_tlb_page(vma, address);
71 * If we are using split PTE locks, then we need to take the page
72 * lock here. Otherwise we are using shared mm->page_table_lock
73 * which is already locked, thus cannot take it.
75 static inline void do_pte_lock(spinlock_t *ptl)
78 * Use nested version here to indicate that we are already
79 * holding one similar spinlock.
81 spin_lock_nested(ptl, SINGLE_DEPTH_NESTING);
84 static inline void do_pte_unlock(spinlock_t *ptl)
88 #else /* !USE_SPLIT_PTLOCKS */
89 static inline void do_pte_lock(spinlock_t *ptl) {}
90 static inline void do_pte_unlock(spinlock_t *ptl) {}
91 #endif /* USE_SPLIT_PTLOCKS */
93 static int adjust_pte(struct vm_area_struct *vma, unsigned long address,
102 pgd = pgd_offset(vma->vm_mm, address);
103 if (pgd_none_or_clear_bad(pgd))
106 pmd = pmd_offset(pgd, address);
107 if (pmd_none_or_clear_bad(pmd))
111 * This is called while another page table is mapped, so we
112 * must use the nested version. This also means we need to
113 * open-code the spin-locking.
115 ptl = pte_lockptr(vma->vm_mm, pmd);
116 pte = pte_offset_map(pmd, address);
119 ret = do_adjust_pte(vma, address, pfn, pte);
128 make_coherent(struct address_space *mapping, struct vm_area_struct *vma,
129 unsigned long addr, pte_t *ptep, unsigned long pfn)
131 struct mm_struct *mm = vma->vm_mm;
132 struct vm_area_struct *mpnt;
133 struct prio_tree_iter iter;
134 unsigned long offset;
138 pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT);
141 * If we have any shared mappings that are in the same mm
142 * space, then we need to handle them specially to maintain
145 flush_dcache_mmap_lock(mapping);
146 vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
148 * If this VMA is not in our MM, we can ignore it.
149 * Note that we intentionally mask out the VMA
150 * that we are fixing up.
152 if (mpnt->vm_mm != mm || mpnt == vma)
154 if (!(mpnt->vm_flags & VM_MAYSHARE))
156 offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
157 aliases += adjust_pte(mpnt, mpnt->vm_start + offset, pfn);
159 flush_dcache_mmap_unlock(mapping);
161 do_adjust_pte(vma, addr, pfn, ptep);
165 * Take care of architecture specific things when placing a new PTE into
166 * a page table, or changing an existing PTE. Basically, there are two
167 * things that we need to take care of:
169 * 1. If PG_dcache_clean is not set for the page, we need to ensure
170 * that any cache entries for the kernels virtual memory
171 * range are written back to the page.
172 * 2. If we have multiple shared mappings of the same space in
173 * an object, we need to deal with the cache aliasing issues.
175 * Note that the pte lock will be held.
177 void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
180 unsigned long pfn = pte_pfn(*ptep);
181 struct address_space *mapping;
188 * The zero page is never written to, so never has any dirty
189 * cache lines, and therefore never needs to be flushed.
191 page = pfn_to_page(pfn);
192 if (page == ZERO_PAGE(0))
195 mapping = page_mapping(page);
196 if (!test_and_set_bit(PG_dcache_clean, &page->flags))
197 __flush_dcache_page(mapping, page);
200 make_coherent(mapping, vma, addr, ptep, pfn);
201 else if (vma->vm_flags & VM_EXEC)
202 __flush_icache_all();
205 #endif /* __LINUX_ARM_ARCH__ < 6 */
208 * Check whether the write buffer has physical address aliasing
209 * issues. If it has, we need to avoid them for the case where
210 * we have several shared mappings of the same object in user
213 static int __init check_writebuffer(unsigned long *p1, unsigned long *p2)
215 register unsigned long zero = 0, one = 1, val;
229 void __init check_writebuffer_bugs(void)
235 printk(KERN_INFO "CPU: Testing write buffer coherency: ");
237 page = alloc_page(GFP_KERNEL);
239 unsigned long *p1, *p2;
240 pgprot_t prot = __pgprot_modify(PAGE_KERNEL,
241 L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE);
243 p1 = vmap(&page, 1, VM_IOREMAP, prot);
244 p2 = vmap(&page, 1, VM_IOREMAP, prot);
247 v = check_writebuffer(p1, p2);
248 reason = "enabling work-around";
250 reason = "unable to map memory\n";
257 reason = "unable to grab page\n";
261 printk("failed, %s\n", reason);
262 shared_pte_mask = L_PTE_MT_UNCACHED;