2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/module.h>
14 #include <linux/gfp.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/init.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-contiguous.h>
21 #include <linux/highmem.h>
22 #include <linux/memblock.h>
23 #include <linux/slab.h>
24 #include <linux/iommu.h>
26 #include <linux/vmalloc.h>
28 #include <asm/memory.h>
29 #include <asm/highmem.h>
30 #include <asm/cacheflush.h>
31 #include <asm/tlbflush.h>
32 #include <asm/sizes.h>
33 #include <asm/mach/arch.h>
34 #include <asm/dma-iommu.h>
35 #include <asm/mach/map.h>
36 #include <asm/system.h>
37 #include <asm/dma-contiguous.h>
42 * The DMA API is built upon the notion of "buffer ownership". A buffer
43 * is either exclusively owned by the CPU (and therefore may be accessed
44 * by it) or exclusively owned by the DMA device. These helper functions
45 * represent the transitions between these two ownership states.
47 * Note, however, that on later ARMs, this notion does not work due to
48 * speculative prefetches. We model our approach on the assumption that
49 * the CPU does do speculative prefetches, which means we clean caches
50 * before transfers and delay cache invalidation until transfer completion.
53 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
54 size_t, enum dma_data_direction);
55 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
56 size_t, enum dma_data_direction);
59 * arm_dma_map_page - map a portion of a page for streaming DMA
60 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
61 * @page: page that buffer resides in
62 * @offset: offset into page for start of buffer
63 * @size: size of buffer to map
64 * @dir: DMA transfer direction
66 * Ensure that any data held in the cache is appropriately discarded
69 * The device owns this memory once this call has completed. The CPU
70 * can regain ownership by calling dma_unmap_page().
72 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
73 unsigned long offset, size_t size, enum dma_data_direction dir,
74 struct dma_attrs *attrs)
76 if (!arch_is_coherent())
77 __dma_page_cpu_to_dev(page, offset, size, dir);
78 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
82 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
83 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
84 * @handle: DMA address of buffer
85 * @size: size of buffer (same as passed to dma_map_page)
86 * @dir: DMA transfer direction (same as passed to dma_map_page)
88 * Unmap a page streaming mode DMA translation. The handle and size
89 * must match what was provided in the previous dma_map_page() call.
90 * All other usages are undefined.
92 * After this call, reads by the CPU to the buffer are guaranteed to see
93 * whatever the device wrote there.
95 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
96 size_t size, enum dma_data_direction dir,
97 struct dma_attrs *attrs)
99 if (!arch_is_coherent())
100 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
101 handle & ~PAGE_MASK, size, dir);
104 static void arm_dma_sync_single_for_cpu(struct device *dev,
105 dma_addr_t handle, size_t size, enum dma_data_direction dir)
107 unsigned int offset = handle & (PAGE_SIZE - 1);
108 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
109 if (!arch_is_coherent())
110 __dma_page_dev_to_cpu(page, offset, size, dir);
113 static void arm_dma_sync_single_for_device(struct device *dev,
114 dma_addr_t handle, size_t size, enum dma_data_direction dir)
116 unsigned int offset = handle & (PAGE_SIZE - 1);
117 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
118 if (!arch_is_coherent())
119 __dma_page_cpu_to_dev(page, offset, size, dir);
122 static int arm_dma_set_mask(struct device *dev, u64 dma_mask);
124 struct dma_map_ops arm_dma_ops = {
125 .alloc = arm_dma_alloc,
126 .free = arm_dma_free,
127 .mmap = arm_dma_mmap,
128 .map_page = arm_dma_map_page,
129 .unmap_page = arm_dma_unmap_page,
130 .map_sg = arm_dma_map_sg,
131 .unmap_sg = arm_dma_unmap_sg,
132 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
133 .sync_single_for_device = arm_dma_sync_single_for_device,
134 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
135 .sync_sg_for_device = arm_dma_sync_sg_for_device,
136 .set_dma_mask = arm_dma_set_mask,
138 EXPORT_SYMBOL(arm_dma_ops);
140 static u64 get_coherent_dma_mask(struct device *dev)
142 u64 mask = (u64)arm_dma_limit;
145 mask = dev->coherent_dma_mask;
148 * Sanity check the DMA mask - it must be non-zero, and
149 * must be able to be satisfied by a DMA allocation.
152 dev_warn(dev, "coherent DMA mask is unset\n");
156 if ((~mask) & (u64)arm_dma_limit) {
157 dev_warn(dev, "coherent DMA mask %#llx is smaller "
158 "than system GFP_DMA mask %#llx\n",
159 mask, (u64)arm_dma_limit);
167 static void __dma_clear_buffer(struct page *page, size_t size)
171 * Ensure that the allocated pages are zeroed, and that any data
172 * lurking in the kernel direct-mapped region is invalidated.
174 ptr = page_address(page);
176 memset(ptr, 0, size);
177 dmac_flush_range(ptr, ptr + size);
178 outer_flush_range(__pa(ptr), __pa(ptr) + size);
183 * Allocate a DMA buffer for 'dev' of size 'size' using the
184 * specified gfp mask. Note that 'size' must be page aligned.
186 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
188 unsigned long order = get_order(size);
189 struct page *page, *p, *e;
191 page = alloc_pages(gfp, order);
196 * Now split the huge page and free the excess pages
198 split_page(page, order);
199 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
202 __dma_clear_buffer(page, size);
208 * Free a DMA buffer. 'size' must be page aligned.
210 static void __dma_free_buffer(struct page *page, size_t size)
212 struct page *e = page + (size >> PAGE_SHIFT);
222 static void *__alloc_from_contiguous(struct device *dev, size_t size,
223 pgprot_t prot, struct page **ret_page);
225 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
226 pgprot_t prot, struct page **ret_page,
230 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
233 struct vm_struct *area;
237 * DMA allocation can be mapped to user space, so lets
238 * set VM_USERMAP flags too.
240 area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
244 addr = (unsigned long)area->addr;
245 area->phys_addr = __pfn_to_phys(page_to_pfn(page));
247 if (ioremap_page_range(addr, addr + size, area->phys_addr, prot)) {
248 vunmap((void *)addr);
254 static void __dma_free_remap(void *cpu_addr, size_t size)
256 unsigned int flags = VM_ARM_DMA_CONSISTENT | VM_USERMAP;
257 struct vm_struct *area = find_vm_area(cpu_addr);
258 if (!area || (area->flags & flags) != flags) {
259 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
262 unmap_kernel_range((unsigned long)cpu_addr, size);
269 unsigned long *bitmap;
270 unsigned long nr_pages;
275 static struct dma_pool atomic_pool = {
279 static int __init early_coherent_pool(char *p)
281 atomic_pool.size = memparse(p, &p);
284 early_param("coherent_pool", early_coherent_pool);
287 * Initialise the coherent pool for atomic allocations.
289 static int __init atomic_pool_init(void)
291 struct dma_pool *pool = &atomic_pool;
292 pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
293 unsigned long nr_pages = pool->size >> PAGE_SHIFT;
294 unsigned long *bitmap;
297 int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long);
299 bitmap = kzalloc(bitmap_size, GFP_KERNEL);
303 if (IS_ENABLED(CONFIG_CMA))
304 ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page);
306 ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot,
309 spin_lock_init(&pool->lock);
312 pool->bitmap = bitmap;
313 pool->nr_pages = nr_pages;
314 pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
315 (unsigned)pool->size / 1024);
320 pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
321 (unsigned)pool->size / 1024);
325 * CMA is activated by core_initcall, so we must be called after it.
327 postcore_initcall(atomic_pool_init);
329 struct dma_contig_early_reserve {
334 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
336 static int dma_mmu_remap_num __initdata;
338 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
340 dma_mmu_remap[dma_mmu_remap_num].base = base;
341 dma_mmu_remap[dma_mmu_remap_num].size = size;
345 void __init dma_contiguous_remap(void)
348 for (i = 0; i < dma_mmu_remap_num; i++) {
349 phys_addr_t start = dma_mmu_remap[i].base;
350 phys_addr_t end = start + dma_mmu_remap[i].size;
354 if (end > arm_lowmem_limit)
355 end = arm_lowmem_limit;
359 map.pfn = __phys_to_pfn(start);
360 map.virtual = __phys_to_virt(start);
361 map.length = end - start;
362 map.type = MT_MEMORY_DMA_READY;
365 * Clear previous low-memory mapping
367 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
369 pmd_clear(pmd_off_k(addr));
371 iotable_init(&map, 1);
375 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
378 struct page *page = virt_to_page(addr);
379 pgprot_t prot = *(pgprot_t *)data;
381 set_pte_ext(pte, mk_pte(page, prot), 0);
385 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
387 unsigned long start = (unsigned long) page_address(page);
388 unsigned end = start + size;
390 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
392 flush_tlb_kernel_range(start, end);
395 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
396 pgprot_t prot, struct page **ret_page,
401 page = __dma_alloc_buffer(dev, size, gfp);
405 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
407 __dma_free_buffer(page, size);
415 static void *__alloc_from_pool(size_t size, struct page **ret_page)
417 struct dma_pool *pool = &atomic_pool;
418 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
422 unsigned long align_mask;
425 WARN(1, "coherent pool not initialised!\n");
430 * Align the region allocation - allocations from pool are rather
431 * small, so align them to their order in pages, minimum is a page
432 * size. This helps reduce fragmentation of the DMA space.
434 align_mask = (1 << get_order(size)) - 1;
436 spin_lock_irqsave(&pool->lock, flags);
437 pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages,
438 0, count, align_mask);
439 if (pageno < pool->nr_pages) {
440 bitmap_set(pool->bitmap, pageno, count);
441 ptr = pool->vaddr + PAGE_SIZE * pageno;
442 *ret_page = pool->page + pageno;
444 pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
445 "Please increase it with coherent_pool= kernel parameter!\n",
446 (unsigned)pool->size / 1024);
448 spin_unlock_irqrestore(&pool->lock, flags);
453 static int __free_from_pool(void *start, size_t size)
455 struct dma_pool *pool = &atomic_pool;
456 unsigned long pageno, count;
459 if (start < pool->vaddr || start > pool->vaddr + pool->size)
462 if (start + size > pool->vaddr + pool->size) {
463 WARN(1, "freeing wrong coherent size from pool\n");
467 pageno = (start - pool->vaddr) >> PAGE_SHIFT;
468 count = size >> PAGE_SHIFT;
470 spin_lock_irqsave(&pool->lock, flags);
471 bitmap_clear(pool->bitmap, pageno, count);
472 spin_unlock_irqrestore(&pool->lock, flags);
477 static void *__alloc_from_contiguous(struct device *dev, size_t size,
478 pgprot_t prot, struct page **ret_page)
480 unsigned long order = get_order(size);
481 size_t count = size >> PAGE_SHIFT;
484 page = dma_alloc_from_contiguous(dev, count, order);
488 __dma_clear_buffer(page, size);
489 __dma_remap(page, size, prot);
492 return page_address(page);
495 static void __free_from_contiguous(struct device *dev, struct page *page,
498 __dma_remap(page, size, pgprot_kernel);
499 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
502 static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
504 prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
505 pgprot_writecombine(prot) :
506 pgprot_dmacoherent(prot);
512 #else /* !CONFIG_MMU */
516 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
517 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c) NULL
518 #define __alloc_from_pool(size, ret_page) NULL
519 #define __alloc_from_contiguous(dev, size, prot, ret) NULL
520 #define __free_from_pool(cpu_addr, size) 0
521 #define __free_from_contiguous(dev, page, size) do { } while (0)
522 #define __dma_free_remap(cpu_addr, size) do { } while (0)
524 #endif /* CONFIG_MMU */
526 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
527 struct page **ret_page)
530 page = __dma_alloc_buffer(dev, size, gfp);
535 return page_address(page);
540 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
541 gfp_t gfp, pgprot_t prot, const void *caller)
543 u64 mask = get_coherent_dma_mask(dev);
547 #ifdef CONFIG_DMA_API_DEBUG
548 u64 limit = (mask + 1) & ~mask;
549 if (limit && size >= limit) {
550 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
559 if (mask < 0xffffffffULL)
563 * Following is a work-around (a.k.a. hack) to prevent pages
564 * with __GFP_COMP being passed to split_page() which cannot
565 * handle them. The real problem is that this flag probably
566 * should be 0 on ARM as it is not supported on this
567 * platform; see CONFIG_HUGETLBFS.
569 gfp &= ~(__GFP_COMP);
571 *handle = DMA_ERROR_CODE;
572 size = PAGE_ALIGN(size);
574 if (arch_is_coherent() || nommu())
575 addr = __alloc_simple_buffer(dev, size, gfp, &page);
576 else if (gfp & GFP_ATOMIC)
577 addr = __alloc_from_pool(size, &page);
578 else if (!IS_ENABLED(CONFIG_CMA))
579 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);
581 addr = __alloc_from_contiguous(dev, size, prot, &page);
584 *handle = pfn_to_dma(dev, page_to_pfn(page));
590 * Allocate DMA-coherent memory space and return both the kernel remapped
591 * virtual and bus address for that space.
593 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
594 gfp_t gfp, struct dma_attrs *attrs)
596 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
599 if (dma_alloc_from_coherent(dev, size, handle, &memory))
602 return __dma_alloc(dev, size, handle, gfp, prot,
603 __builtin_return_address(0));
607 * Create userspace mapping for the DMA-coherent memory.
609 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
610 void *cpu_addr, dma_addr_t dma_addr, size_t size,
611 struct dma_attrs *attrs)
615 unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
616 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
617 unsigned long pfn = dma_to_pfn(dev, dma_addr);
618 unsigned long off = vma->vm_pgoff;
620 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
622 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
625 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
626 ret = remap_pfn_range(vma, vma->vm_start,
628 vma->vm_end - vma->vm_start,
631 #endif /* CONFIG_MMU */
637 * Free a buffer as defined by the above mapping.
639 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
640 dma_addr_t handle, struct dma_attrs *attrs)
642 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
644 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
647 size = PAGE_ALIGN(size);
649 if (arch_is_coherent() || nommu()) {
650 __dma_free_buffer(page, size);
651 } else if (__free_from_pool(cpu_addr, size)) {
653 } else if (!IS_ENABLED(CONFIG_CMA)) {
654 __dma_free_remap(cpu_addr, size);
655 __dma_free_buffer(page, size);
658 * Non-atomic allocations cannot be freed with IRQs disabled
660 WARN_ON(irqs_disabled());
661 __free_from_contiguous(dev, page, size);
665 static void dma_cache_maint_page(struct page *page, unsigned long offset,
666 size_t size, enum dma_data_direction dir,
667 void (*op)(const void *, size_t, int))
672 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
676 * A single sg entry may refer to multiple physically contiguous
677 * pages. But we still need to process highmem pages individually.
678 * If highmem is not configured then the bulk of this loop gets
685 page = pfn_to_page(pfn);
687 if (PageHighMem(page)) {
688 if (len + offset > PAGE_SIZE)
689 len = PAGE_SIZE - offset;
690 vaddr = kmap_high_get(page);
695 } else if (cache_is_vipt()) {
696 /* unmapped pages might still be cached */
697 vaddr = kmap_atomic(page);
698 op(vaddr + offset, len, dir);
699 kunmap_atomic(vaddr);
702 vaddr = page_address(page) + offset;
712 * Make an area consistent for devices.
713 * Note: Drivers should NOT use this function directly, as it will break
714 * platforms with CONFIG_DMABOUNCE.
715 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
717 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
718 size_t size, enum dma_data_direction dir)
722 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
724 paddr = page_to_phys(page) + off;
725 if (dir == DMA_FROM_DEVICE) {
726 outer_inv_range(paddr, paddr + size);
728 outer_clean_range(paddr, paddr + size);
730 /* FIXME: non-speculating: flush on bidirectional mappings? */
733 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
734 size_t size, enum dma_data_direction dir)
736 unsigned long paddr = page_to_phys(page) + off;
738 /* FIXME: non-speculating: not required */
739 /* don't bother invalidating if DMA to device */
740 if (dir != DMA_TO_DEVICE)
741 outer_inv_range(paddr, paddr + size);
743 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
746 * Mark the D-cache clean for these pages to avoid extra flushing.
748 if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
752 pfn = page_to_pfn(page) + off / PAGE_SIZE;
756 left -= PAGE_SIZE - off;
758 while (left >= PAGE_SIZE) {
759 page = pfn_to_page(pfn++);
760 set_bit(PG_dcache_clean, &page->flags);
767 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
768 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
769 * @sg: list of buffers
770 * @nents: number of buffers to map
771 * @dir: DMA transfer direction
773 * Map a set of buffers described by scatterlist in streaming mode for DMA.
774 * This is the scatter-gather version of the dma_map_single interface.
775 * Here the scatter gather list elements are each tagged with the
776 * appropriate dma address and length. They are obtained via
777 * sg_dma_{address,length}.
779 * Device ownership issues as mentioned for dma_map_single are the same
782 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
783 enum dma_data_direction dir, struct dma_attrs *attrs)
785 struct dma_map_ops *ops = get_dma_ops(dev);
786 struct scatterlist *s;
789 for_each_sg(sg, s, nents, i) {
790 #ifdef CONFIG_NEED_SG_DMA_LENGTH
791 s->dma_length = s->length;
793 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
794 s->length, dir, attrs);
795 if (dma_mapping_error(dev, s->dma_address))
801 for_each_sg(sg, s, i, j)
802 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
807 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
808 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
809 * @sg: list of buffers
810 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
811 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
813 * Unmap a set of streaming mode DMA translations. Again, CPU access
814 * rules concerning calls here are the same as for dma_unmap_single().
816 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
817 enum dma_data_direction dir, struct dma_attrs *attrs)
819 struct dma_map_ops *ops = get_dma_ops(dev);
820 struct scatterlist *s;
824 for_each_sg(sg, s, nents, i)
825 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
829 * arm_dma_sync_sg_for_cpu
830 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
831 * @sg: list of buffers
832 * @nents: number of buffers to map (returned from dma_map_sg)
833 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
835 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
836 int nents, enum dma_data_direction dir)
838 struct dma_map_ops *ops = get_dma_ops(dev);
839 struct scatterlist *s;
842 for_each_sg(sg, s, nents, i)
843 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
848 * arm_dma_sync_sg_for_device
849 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
850 * @sg: list of buffers
851 * @nents: number of buffers to map (returned from dma_map_sg)
852 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
854 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
855 int nents, enum dma_data_direction dir)
857 struct dma_map_ops *ops = get_dma_ops(dev);
858 struct scatterlist *s;
861 for_each_sg(sg, s, nents, i)
862 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
867 * Return whether the given device DMA address mask can be supported
868 * properly. For example, if your device can only drive the low 24-bits
869 * during bus mastering, then you would pass 0x00ffffff as the mask
872 int dma_supported(struct device *dev, u64 mask)
874 if (mask < (u64)arm_dma_limit)
878 EXPORT_SYMBOL(dma_supported);
880 static int arm_dma_set_mask(struct device *dev, u64 dma_mask)
882 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
885 *dev->dma_mask = dma_mask;
890 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
892 static int __init dma_debug_do_init(void)
894 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
897 fs_initcall(dma_debug_do_init);
899 #ifdef CONFIG_ARM_DMA_USE_IOMMU
903 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
906 unsigned int order = get_order(size);
907 unsigned int align = 0;
908 unsigned int count, start;
911 count = ((PAGE_ALIGN(size) >> PAGE_SHIFT) +
912 (1 << mapping->order) - 1) >> mapping->order;
914 if (order > mapping->order)
915 align = (1 << (order - mapping->order)) - 1;
917 spin_lock_irqsave(&mapping->lock, flags);
918 start = bitmap_find_next_zero_area(mapping->bitmap, mapping->bits, 0,
920 if (start > mapping->bits) {
921 spin_unlock_irqrestore(&mapping->lock, flags);
922 return DMA_ERROR_CODE;
925 bitmap_set(mapping->bitmap, start, count);
926 spin_unlock_irqrestore(&mapping->lock, flags);
928 return mapping->base + (start << (mapping->order + PAGE_SHIFT));
931 static inline void __free_iova(struct dma_iommu_mapping *mapping,
932 dma_addr_t addr, size_t size)
934 unsigned int start = (addr - mapping->base) >>
935 (mapping->order + PAGE_SHIFT);
936 unsigned int count = ((size >> PAGE_SHIFT) +
937 (1 << mapping->order) - 1) >> mapping->order;
940 spin_lock_irqsave(&mapping->lock, flags);
941 bitmap_clear(mapping->bitmap, start, count);
942 spin_unlock_irqrestore(&mapping->lock, flags);
945 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
948 int count = size >> PAGE_SHIFT;
949 int array_size = count * sizeof(struct page *);
952 if (array_size <= PAGE_SIZE)
953 pages = kzalloc(array_size, gfp);
955 pages = vzalloc(array_size);
960 int j, order = __fls(count);
962 pages[i] = alloc_pages(gfp | __GFP_NOWARN, order);
963 while (!pages[i] && order)
964 pages[i] = alloc_pages(gfp | __GFP_NOWARN, --order);
969 split_page(pages[i], order);
972 pages[i + j] = pages[i] + j;
974 __dma_clear_buffer(pages[i], PAGE_SIZE << order);
983 __free_pages(pages[i], 0);
984 if (array_size <= PAGE_SIZE)
991 static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t size)
993 int count = size >> PAGE_SHIFT;
994 int array_size = count * sizeof(struct page *);
996 for (i = 0; i < count; i++)
998 __free_pages(pages[i], 0);
999 if (array_size <= PAGE_SIZE)
1007 * Create a CPU mapping for a specified pages
1010 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1013 unsigned int i, nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1014 struct vm_struct *area;
1017 area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
1022 area->pages = pages;
1023 area->nr_pages = nr_pages;
1024 p = (unsigned long)area->addr;
1026 for (i = 0; i < nr_pages; i++) {
1027 phys_addr_t phys = __pfn_to_phys(page_to_pfn(pages[i]));
1028 if (ioremap_page_range(p, p + PAGE_SIZE, phys, prot))
1034 unmap_kernel_range((unsigned long)area->addr, size);
1040 * Create a mapping in device IO address space for specified pages
1043 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1045 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1046 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1047 dma_addr_t dma_addr, iova;
1048 int i, ret = DMA_ERROR_CODE;
1050 dma_addr = __alloc_iova(mapping, size);
1051 if (dma_addr == DMA_ERROR_CODE)
1055 for (i = 0; i < count; ) {
1056 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1057 phys_addr_t phys = page_to_phys(pages[i]);
1058 unsigned int len, j;
1060 for (j = i + 1; j < count; j++, next_pfn++)
1061 if (page_to_pfn(pages[j]) != next_pfn)
1064 len = (j - i) << PAGE_SHIFT;
1065 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1073 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1074 __free_iova(mapping, dma_addr, size);
1075 return DMA_ERROR_CODE;
1078 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1080 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1083 * add optional in-page offset from iova to size and align
1084 * result to page size
1086 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1089 iommu_unmap(mapping->domain, iova, size);
1090 __free_iova(mapping, iova, size);
1094 static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
1096 struct vm_struct *area;
1098 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1101 area = find_vm_area(cpu_addr);
1102 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1107 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1108 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
1110 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
1111 struct page **pages;
1114 *handle = DMA_ERROR_CODE;
1115 size = PAGE_ALIGN(size);
1117 pages = __iommu_alloc_buffer(dev, size, gfp);
1121 *handle = __iommu_create_mapping(dev, pages, size);
1122 if (*handle == DMA_ERROR_CODE)
1125 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1128 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1129 __builtin_return_address(0));
1136 __iommu_remove_mapping(dev, *handle, size);
1138 __iommu_free_buffer(dev, pages, size);
1142 static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1143 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1144 struct dma_attrs *attrs)
1146 unsigned long uaddr = vma->vm_start;
1147 unsigned long usize = vma->vm_end - vma->vm_start;
1148 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1150 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1156 int ret = vm_insert_page(vma, uaddr, *pages++);
1158 pr_err("Remapping memory failed: %d\n", ret);
1163 } while (usize > 0);
1169 * free a page as defined by the above mapping.
1170 * Must not be called with IRQs disabled.
1172 void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1173 dma_addr_t handle, struct dma_attrs *attrs)
1175 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1176 size = PAGE_ALIGN(size);
1179 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1183 if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
1184 unmap_kernel_range((unsigned long)cpu_addr, size);
1188 __iommu_remove_mapping(dev, handle, size);
1189 __iommu_free_buffer(dev, pages, size);
1193 * Map a part of the scatter-gather list into contiguous io address space
1195 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1196 size_t size, dma_addr_t *handle,
1197 enum dma_data_direction dir)
1199 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1200 dma_addr_t iova, iova_base;
1203 struct scatterlist *s;
1205 size = PAGE_ALIGN(size);
1206 *handle = DMA_ERROR_CODE;
1208 iova_base = iova = __alloc_iova(mapping, size);
1209 if (iova == DMA_ERROR_CODE)
1212 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1213 phys_addr_t phys = page_to_phys(sg_page(s));
1214 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1216 if (!arch_is_coherent())
1217 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1219 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1222 count += len >> PAGE_SHIFT;
1225 *handle = iova_base;
1229 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1230 __free_iova(mapping, iova_base, size);
1235 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1236 * @dev: valid struct device pointer
1237 * @sg: list of buffers
1238 * @nents: number of buffers to map
1239 * @dir: DMA transfer direction
1241 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1242 * The scatter gather list elements are merged together (if possible) and
1243 * tagged with the appropriate dma address and length. They are obtained via
1244 * sg_dma_{address,length}.
1246 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1247 enum dma_data_direction dir, struct dma_attrs *attrs)
1249 struct scatterlist *s = sg, *dma = sg, *start = sg;
1251 unsigned int offset = s->offset;
1252 unsigned int size = s->offset + s->length;
1253 unsigned int max = dma_get_max_seg_size(dev);
1255 for (i = 1; i < nents; i++) {
1258 s->dma_address = DMA_ERROR_CODE;
1261 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1262 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1266 dma->dma_address += offset;
1267 dma->dma_length = size - offset;
1269 size = offset = s->offset;
1276 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir) < 0)
1279 dma->dma_address += offset;
1280 dma->dma_length = size - offset;
1285 for_each_sg(sg, s, count, i)
1286 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1291 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1292 * @dev: valid struct device pointer
1293 * @sg: list of buffers
1294 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1295 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1297 * Unmap a set of streaming mode DMA translations. Again, CPU access
1298 * rules concerning calls here are the same as for dma_unmap_single().
1300 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1301 enum dma_data_direction dir, struct dma_attrs *attrs)
1303 struct scatterlist *s;
1306 for_each_sg(sg, s, nents, i) {
1308 __iommu_remove_mapping(dev, sg_dma_address(s),
1310 if (!arch_is_coherent())
1311 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1317 * arm_iommu_sync_sg_for_cpu
1318 * @dev: valid struct device pointer
1319 * @sg: list of buffers
1320 * @nents: number of buffers to map (returned from dma_map_sg)
1321 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1323 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1324 int nents, enum dma_data_direction dir)
1326 struct scatterlist *s;
1329 for_each_sg(sg, s, nents, i)
1330 if (!arch_is_coherent())
1331 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1336 * arm_iommu_sync_sg_for_device
1337 * @dev: valid struct device pointer
1338 * @sg: list of buffers
1339 * @nents: number of buffers to map (returned from dma_map_sg)
1340 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1342 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1343 int nents, enum dma_data_direction dir)
1345 struct scatterlist *s;
1348 for_each_sg(sg, s, nents, i)
1349 if (!arch_is_coherent())
1350 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1355 * arm_iommu_map_page
1356 * @dev: valid struct device pointer
1357 * @page: page that buffer resides in
1358 * @offset: offset into page for start of buffer
1359 * @size: size of buffer to map
1360 * @dir: DMA transfer direction
1362 * IOMMU aware version of arm_dma_map_page()
1364 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1365 unsigned long offset, size_t size, enum dma_data_direction dir,
1366 struct dma_attrs *attrs)
1368 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1369 dma_addr_t dma_addr;
1370 int ret, len = PAGE_ALIGN(size + offset);
1372 if (!arch_is_coherent())
1373 __dma_page_cpu_to_dev(page, offset, size, dir);
1375 dma_addr = __alloc_iova(mapping, len);
1376 if (dma_addr == DMA_ERROR_CODE)
1379 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, 0);
1383 return dma_addr + offset;
1385 __free_iova(mapping, dma_addr, len);
1386 return DMA_ERROR_CODE;
1390 * arm_iommu_unmap_page
1391 * @dev: valid struct device pointer
1392 * @handle: DMA address of buffer
1393 * @size: size of buffer (same as passed to dma_map_page)
1394 * @dir: DMA transfer direction (same as passed to dma_map_page)
1396 * IOMMU aware version of arm_dma_unmap_page()
1398 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1399 size_t size, enum dma_data_direction dir,
1400 struct dma_attrs *attrs)
1402 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1403 dma_addr_t iova = handle & PAGE_MASK;
1404 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1405 int offset = handle & ~PAGE_MASK;
1406 int len = PAGE_ALIGN(size + offset);
1411 if (!arch_is_coherent())
1412 __dma_page_dev_to_cpu(page, offset, size, dir);
1414 iommu_unmap(mapping->domain, iova, len);
1415 __free_iova(mapping, iova, len);
1418 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1419 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1421 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1422 dma_addr_t iova = handle & PAGE_MASK;
1423 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1424 unsigned int offset = handle & ~PAGE_MASK;
1429 if (!arch_is_coherent())
1430 __dma_page_dev_to_cpu(page, offset, size, dir);
1433 static void arm_iommu_sync_single_for_device(struct device *dev,
1434 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1436 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1437 dma_addr_t iova = handle & PAGE_MASK;
1438 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1439 unsigned int offset = handle & ~PAGE_MASK;
1444 __dma_page_cpu_to_dev(page, offset, size, dir);
1447 struct dma_map_ops iommu_ops = {
1448 .alloc = arm_iommu_alloc_attrs,
1449 .free = arm_iommu_free_attrs,
1450 .mmap = arm_iommu_mmap_attrs,
1452 .map_page = arm_iommu_map_page,
1453 .unmap_page = arm_iommu_unmap_page,
1454 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
1455 .sync_single_for_device = arm_iommu_sync_single_for_device,
1457 .map_sg = arm_iommu_map_sg,
1458 .unmap_sg = arm_iommu_unmap_sg,
1459 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
1460 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
1464 * arm_iommu_create_mapping
1465 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1466 * @base: start address of the valid IO address space
1467 * @size: size of the valid IO address space
1468 * @order: accuracy of the IO addresses allocations
1470 * Creates a mapping structure which holds information about used/unused
1471 * IO address ranges, which is required to perform memory allocation and
1472 * mapping with IOMMU aware functions.
1474 * The client device need to be attached to the mapping with
1475 * arm_iommu_attach_device function.
1477 struct dma_iommu_mapping *
1478 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size,
1481 unsigned int count = size >> (PAGE_SHIFT + order);
1482 unsigned int bitmap_size = BITS_TO_LONGS(count) * sizeof(long);
1483 struct dma_iommu_mapping *mapping;
1487 return ERR_PTR(-EINVAL);
1489 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
1493 mapping->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1494 if (!mapping->bitmap)
1497 mapping->base = base;
1498 mapping->bits = BITS_PER_BYTE * bitmap_size;
1499 mapping->order = order;
1500 spin_lock_init(&mapping->lock);
1502 mapping->domain = iommu_domain_alloc(bus);
1503 if (!mapping->domain)
1506 kref_init(&mapping->kref);
1509 kfree(mapping->bitmap);
1513 return ERR_PTR(err);
1516 static void release_iommu_mapping(struct kref *kref)
1518 struct dma_iommu_mapping *mapping =
1519 container_of(kref, struct dma_iommu_mapping, kref);
1521 iommu_domain_free(mapping->domain);
1522 kfree(mapping->bitmap);
1526 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
1529 kref_put(&mapping->kref, release_iommu_mapping);
1533 * arm_iommu_attach_device
1534 * @dev: valid struct device pointer
1535 * @mapping: io address space mapping structure (returned from
1536 * arm_iommu_create_mapping)
1538 * Attaches specified io address space mapping to the provided device,
1539 * this replaces the dma operations (dma_map_ops pointer) with the
1540 * IOMMU aware version. More than one client might be attached to
1541 * the same io address space mapping.
1543 int arm_iommu_attach_device(struct device *dev,
1544 struct dma_iommu_mapping *mapping)
1548 err = iommu_attach_device(mapping->domain, dev);
1552 kref_get(&mapping->kref);
1553 dev->archdata.mapping = mapping;
1554 set_dma_ops(dev, &iommu_ops);
1556 pr_info("Attached IOMMU controller to %s device.\n", dev_name(dev));