2 * Copyright (C) ST Ericsson SA 2010
4 * License Terms: GNU General Public License v2
5 * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/errno.h>
12 #include <linux/err.h>
14 #include <linux/mutex.h>
15 #include <linux/completion.h>
16 #include <linux/jiffies.h>
17 #include <linux/bitops.h>
18 #include <linux/interrupt.h>
20 #include <mach/hardware.h>
21 #include <mach/prcmu-regs.h>
23 /* Global var to runtime determine TCDM base for v2 or v1 */
24 static __iomem void *tcdm_base;
26 #define REQ_MB5 (tcdm_base + 0xE44)
27 #define ACK_MB5 (tcdm_base + 0xDF4)
29 #define REQ_MB5_I2C_SLAVE_OP (REQ_MB5)
30 #define REQ_MB5_I2C_HW_BITS (REQ_MB5 + 1)
31 #define REQ_MB5_I2C_REG (REQ_MB5 + 2)
32 #define REQ_MB5_I2C_VAL (REQ_MB5 + 3)
34 #define ACK_MB5_I2C_STATUS (ACK_MB5 + 1)
35 #define ACK_MB5_I2C_VAL (ACK_MB5 + 3)
37 #define I2C_WRITE(slave) \
38 (((slave) << 1) | (cpu_is_u8500v2() ? BIT(6) : 0))
39 #define I2C_READ(slave) \
40 (((slave) << 1) | (cpu_is_u8500v2() ? BIT(6) : 0) | BIT(0))
41 #define I2C_STOP_EN BIT(3)
53 struct completion work;
62 * prcmu_abb_read() - Read register value(s) from the ABB.
63 * @slave: The I2C slave address.
64 * @reg: The (start) register address.
65 * @value: The read out value(s).
66 * @size: The number of registers to read.
68 * Reads register value(s) from the ABB.
69 * @size has to be 1 for the current firmware version.
71 int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size)
78 r = mutex_lock_interruptible(&mb5_transfer.lock);
82 while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(5))
85 writeb(I2C_READ(slave), REQ_MB5_I2C_SLAVE_OP);
86 writeb(I2C_STOP_EN, REQ_MB5_I2C_HW_BITS);
87 writeb(reg, REQ_MB5_I2C_REG);
89 writel(MBOX_BIT(5), PRCM_MBOX_CPU_SET);
90 if (!wait_for_completion_timeout(&mb5_transfer.work,
91 msecs_to_jiffies(500))) {
92 pr_err("prcmu: prcmu_abb_read timed out.\n");
94 goto unlock_and_return;
96 r = ((mb5_transfer.ack.status == I2C_RD_OK) ? 0 : -EIO);
98 *value = mb5_transfer.ack.value;
101 mutex_unlock(&mb5_transfer.lock);
104 EXPORT_SYMBOL(prcmu_abb_read);
107 * prcmu_abb_write() - Write register value(s) to the ABB.
108 * @slave: The I2C slave address.
109 * @reg: The (start) register address.
110 * @value: The value(s) to write.
111 * @size: The number of registers to write.
113 * Reads register value(s) from the ABB.
114 * @size has to be 1 for the current firmware version.
116 int prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size)
123 r = mutex_lock_interruptible(&mb5_transfer.lock);
128 while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(5))
131 writeb(I2C_WRITE(slave), REQ_MB5_I2C_SLAVE_OP);
132 writeb(I2C_STOP_EN, REQ_MB5_I2C_HW_BITS);
133 writeb(reg, REQ_MB5_I2C_REG);
134 writeb(*value, REQ_MB5_I2C_VAL);
136 writel(MBOX_BIT(5), PRCM_MBOX_CPU_SET);
137 if (!wait_for_completion_timeout(&mb5_transfer.work,
138 msecs_to_jiffies(500))) {
139 pr_err("prcmu: prcmu_abb_write timed out.\n");
141 goto unlock_and_return;
143 r = ((mb5_transfer.ack.status == I2C_WR_OK) ? 0 : -EIO);
146 mutex_unlock(&mb5_transfer.lock);
149 EXPORT_SYMBOL(prcmu_abb_write);
151 static void read_mailbox_0(void)
153 writel(MBOX_BIT(0), PRCM_ARM_IT1_CLEAR);
156 static void read_mailbox_1(void)
158 writel(MBOX_BIT(1), PRCM_ARM_IT1_CLEAR);
161 static void read_mailbox_2(void)
163 writel(MBOX_BIT(2), PRCM_ARM_IT1_CLEAR);
166 static void read_mailbox_3(void)
168 writel(MBOX_BIT(3), PRCM_ARM_IT1_CLEAR);
171 static void read_mailbox_4(void)
173 writel(MBOX_BIT(4), PRCM_ARM_IT1_CLEAR);
176 static void read_mailbox_5(void)
178 mb5_transfer.ack.status = readb(ACK_MB5_I2C_STATUS);
179 mb5_transfer.ack.value = readb(ACK_MB5_I2C_VAL);
180 complete(&mb5_transfer.work);
181 writel(MBOX_BIT(5), PRCM_ARM_IT1_CLEAR);
184 static void read_mailbox_6(void)
186 writel(MBOX_BIT(6), PRCM_ARM_IT1_CLEAR);
189 static void read_mailbox_7(void)
191 writel(MBOX_BIT(7), PRCM_ARM_IT1_CLEAR);
194 static void (* const read_mailbox[NUM_MBOX])(void) = {
205 static irqreturn_t prcmu_irq_handler(int irq, void *data)
210 bits = (readl(PRCM_ARM_IT1_VAL) & (MBOX_BIT(NUM_MBOX) - 1));
214 for (n = 0; bits; n++) {
215 if (bits & MBOX_BIT(n)) {
223 void __init prcmu_early_init(void)
225 if (cpu_is_u8500v11() || cpu_is_u8500ed()) {
226 tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE_V1);
227 } else if (cpu_is_u8500v2()) {
228 tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE);
230 pr_err("prcmu: Unsupported chip version\n");
235 static int __init prcmu_init(void)
237 mutex_init(&mb5_transfer.lock);
238 init_completion(&mb5_transfer.work);
240 /* Clean up the mailbox interrupts after pre-kernel code. */
241 writel((MBOX_BIT(NUM_MBOX) - 1), PRCM_ARM_IT1_CLEAR);
243 return request_irq(IRQ_DB8500_PRCMU1, prcmu_irq_handler, 0,
247 arch_initcall(prcmu_init);