2 * linux/arch/arm/mach-tegra/include/mach/pinmux.h
4 * Copyright (C) 2010 Google, Inc.
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 #ifndef __MACH_TEGRA_PINMUX_H
18 #define __MACH_TEGRA_PINMUX_H
20 #if defined(CONFIG_ARCH_TEGRA_2x_SOC)
21 #include "pinmux-t2.h"
23 #error "Undefined Tegra architecture"
27 TEGRA_MUX_RSVD = 0x8000,
28 TEGRA_MUX_RSVD1 = 0x8000,
29 TEGRA_MUX_RSVD2 = 0x8001,
30 TEGRA_MUX_RSVD3 = 0x8002,
31 TEGRA_MUX_RSVD4 = 0x8003,
44 TEGRA_MUX_EMC_TEST0_DLL,
45 TEGRA_MUX_EMC_TEST1_DLL,
91 TEGRA_MUX_VI_SENSOR_CLK,
97 enum tegra_pullupdown {
98 TEGRA_PUPD_NORMAL = 0,
103 enum tegra_tristate {
104 TEGRA_TRI_NORMAL = 0,
105 TEGRA_TRI_TRISTATE = 1,
120 struct tegra_pingroup_config {
121 enum tegra_pingroup pingroup;
122 enum tegra_mux_func func;
123 enum tegra_pullupdown pupd;
124 enum tegra_tristate tristate;
128 TEGRA_SLEW_FASTEST = 0,
135 enum tegra_pull_strength {
172 TEGRA_DRIVE_DIV_8 = 0,
180 TEGRA_HSM_DISABLE = 0,
185 TEGRA_SCHMITT_DISABLE = 0,
186 TEGRA_SCHMITT_ENABLE,
189 struct tegra_drive_pingroup_config {
190 enum tegra_drive_pingroup pingroup;
192 enum tegra_schmitt schmitt;
193 enum tegra_drive drive;
194 enum tegra_pull_strength pull_down;
195 enum tegra_pull_strength pull_up;
196 enum tegra_slew slew_rising;
197 enum tegra_slew slew_falling;
200 struct tegra_drive_pingroup_desc {
205 struct tegra_pingroup_desc {
210 s16 tri_reg; /* offset into the TRISTATE_REG_* register bank */
211 s16 mux_reg; /* offset into the PIN_MUX_CTL_* register bank */
212 s16 pupd_reg; /* offset into the PULL_UPDOWN_REG_* register bank */
213 s8 tri_bit; /* offset into the TRISTATE_REG_* register bit */
214 s8 mux_bit; /* offset into the PIN_MUX_CTL_* register bit */
215 s8 pupd_bit; /* offset into the PULL_UPDOWN_REG_* register bit */
218 extern const struct tegra_pingroup_desc tegra_soc_pingroups[];
219 extern const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[];
221 int tegra_pinmux_set_tristate(enum tegra_pingroup pg,
222 enum tegra_tristate tristate);
223 int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg,
224 enum tegra_pullupdown pupd);
226 void tegra_pinmux_config_table(const struct tegra_pingroup_config *config,
229 void tegra_drive_pinmux_config_table(struct tegra_drive_pingroup_config *config,
231 void tegra_pinmux_set_safe_pinmux_table(const struct tegra_pingroup_config *config,
233 void tegra_pinmux_config_pinmux_table(const struct tegra_pingroup_config *config,
235 void tegra_pinmux_config_tristate_table(const struct tegra_pingroup_config *config,
236 int len, enum tegra_tristate tristate);
237 void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *config,
238 int len, enum tegra_pullupdown pupd);