2 * Device Tree support for Allwinner A1X SoCs
4 * Copyright (C) 2012 Maxime Ripard
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/delay.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/of_address.h>
17 #include <linux/of_irq.h>
18 #include <linux/of_platform.h>
20 #include <linux/reboot.h>
22 #include <asm/mach/arch.h>
23 #include <asm/mach/map.h>
24 #include <asm/system_misc.h>
26 #define SUN4I_WATCHDOG_CTRL_REG 0x00
27 #define SUN4I_WATCHDOG_CTRL_RESTART BIT(0)
28 #define SUN4I_WATCHDOG_MODE_REG 0x04
29 #define SUN4I_WATCHDOG_MODE_ENABLE BIT(0)
30 #define SUN4I_WATCHDOG_MODE_RESET_ENABLE BIT(1)
32 #define SUN6I_WATCHDOG1_IRQ_REG 0x00
33 #define SUN6I_WATCHDOG1_CTRL_REG 0x10
34 #define SUN6I_WATCHDOG1_CTRL_RESTART BIT(0)
35 #define SUN6I_WATCHDOG1_CONFIG_REG 0x14
36 #define SUN6I_WATCHDOG1_CONFIG_RESTART BIT(0)
37 #define SUN6I_WATCHDOG1_CONFIG_IRQ BIT(1)
38 #define SUN6I_WATCHDOG1_MODE_REG 0x18
39 #define SUN6I_WATCHDOG1_MODE_ENABLE BIT(0)
41 static void __iomem *wdt_base;
43 static void sun4i_restart(enum reboot_mode mode, const char *cmd)
48 /* Enable timer and set reset bit in the watchdog */
49 writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
50 wdt_base + SUN4I_WATCHDOG_MODE_REG);
53 * Restart the watchdog. The default (and lowest) interval
54 * value for the watchdog is 0.5s.
56 writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);
60 writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
61 wdt_base + SUN4I_WATCHDOG_MODE_REG);
65 static void sun6i_restart(enum reboot_mode mode, const char *cmd)
70 /* Disable interrupts */
71 writel(0, wdt_base + SUN6I_WATCHDOG1_IRQ_REG);
73 /* We want to disable the IRQ and just reset the whole system */
74 writel(SUN6I_WATCHDOG1_CONFIG_RESTART,
75 wdt_base + SUN6I_WATCHDOG1_CONFIG_REG);
77 /* Enable timer. The default and lowest interval value is 0.5s */
78 writel(SUN6I_WATCHDOG1_MODE_ENABLE,
79 wdt_base + SUN6I_WATCHDOG1_MODE_REG);
81 /* Restart the watchdog. */
82 writel(SUN6I_WATCHDOG1_CTRL_RESTART,
83 wdt_base + SUN6I_WATCHDOG1_CTRL_REG);
87 writel(SUN6I_WATCHDOG1_MODE_ENABLE,
88 wdt_base + SUN6I_WATCHDOG1_MODE_REG);
92 static struct of_device_id sunxi_restart_ids[] = {
93 { .compatible = "allwinner,sun4i-wdt" },
94 { .compatible = "allwinner,sun6i-wdt" },
98 static void sunxi_setup_restart(void)
100 struct device_node *np;
102 np = of_find_matching_node(NULL, sunxi_restart_ids);
103 if (WARN(!np, "unable to setup watchdog restart"))
106 wdt_base = of_iomap(np, 0);
107 WARN(!wdt_base, "failed to map watchdog base address");
110 static void __init sunxi_dt_init(void)
112 sunxi_setup_restart();
114 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
117 static const char * const sunxi_board_dt_compat[] = {
118 "allwinner,sun4i-a10",
119 "allwinner,sun5i-a10s",
120 "allwinner,sun5i-a13",
124 DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
125 .init_machine = sunxi_dt_init,
126 .dt_compat = sunxi_board_dt_compat,
127 .restart = sun4i_restart,
130 static const char * const sun6i_board_dt_compat[] = {
131 "allwinner,sun6i-a31",
135 DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family")
136 .init_machine = sunxi_dt_init,
137 .init_time = sunxi_timer_init,
138 .dt_compat = sun6i_board_dt_compat,
139 .restart = sun6i_restart,
142 static const char * const sun7i_board_dt_compat[] = {
143 "allwinner,sun7i-a20",
147 DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family")
148 .init_machine = sunxi_dt_init,
149 .init_time = sunxi_timer_init,
150 .dt_compat = sun7i_board_dt_compat,
151 .restart = sun4i_restart,