Merge branch 'spear/pinctrl' into spear/clock
[pandora-kernel.git] / arch / arm / mach-spear3xx / spear300.c
1 /*
2  * arch/arm/mach-spear3xx/spear300.c
3  *
4  * SPEAr300 machine source file
5  *
6  * Copyright (C) 2009-2012 ST Microelectronics
7  * Viresh Kumar <viresh.kumar@st.com>
8  *
9  * This file is licensed under the terms of the GNU General Public
10  * License version 2. This program is licensed "as is" without any
11  * warranty of any kind, whether express or implied.
12  */
13
14 #define pr_fmt(fmt) "SPEAr300: " fmt
15
16 #include <linux/amba/pl08x.h>
17 #include <linux/of_platform.h>
18 #include <asm/hardware/vic.h>
19 #include <asm/mach/arch.h>
20 #include <plat/shirq.h>
21 #include <mach/generic.h>
22 #include <mach/hardware.h>
23
24 /* spear3xx shared irq */
25 static struct shirq_dev_config shirq_ras1_config[] = {
26         {
27                 .virq = SPEAR300_VIRQ_IT_PERS_S,
28                 .enb_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
29                 .status_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
30         }, {
31                 .virq = SPEAR300_VIRQ_IT_CHANGE_S,
32                 .enb_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
33                 .status_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
34         }, {
35                 .virq = SPEAR300_VIRQ_I2S,
36                 .enb_mask = SPEAR300_I2S_IRQ_MASK,
37                 .status_mask = SPEAR300_I2S_IRQ_MASK,
38         }, {
39                 .virq = SPEAR300_VIRQ_TDM,
40                 .enb_mask = SPEAR300_TDM_IRQ_MASK,
41                 .status_mask = SPEAR300_TDM_IRQ_MASK,
42         }, {
43                 .virq = SPEAR300_VIRQ_CAMERA_L,
44                 .enb_mask = SPEAR300_CAMERA_L_IRQ_MASK,
45                 .status_mask = SPEAR300_CAMERA_L_IRQ_MASK,
46         }, {
47                 .virq = SPEAR300_VIRQ_CAMERA_F,
48                 .enb_mask = SPEAR300_CAMERA_F_IRQ_MASK,
49                 .status_mask = SPEAR300_CAMERA_F_IRQ_MASK,
50         }, {
51                 .virq = SPEAR300_VIRQ_CAMERA_V,
52                 .enb_mask = SPEAR300_CAMERA_V_IRQ_MASK,
53                 .status_mask = SPEAR300_CAMERA_V_IRQ_MASK,
54         }, {
55                 .virq = SPEAR300_VIRQ_KEYBOARD,
56                 .enb_mask = SPEAR300_KEYBOARD_IRQ_MASK,
57                 .status_mask = SPEAR300_KEYBOARD_IRQ_MASK,
58         }, {
59                 .virq = SPEAR300_VIRQ_GPIO1,
60                 .enb_mask = SPEAR300_GPIO1_IRQ_MASK,
61                 .status_mask = SPEAR300_GPIO1_IRQ_MASK,
62         },
63 };
64
65 static struct spear_shirq shirq_ras1 = {
66         .irq = SPEAR3XX_IRQ_GEN_RAS_1,
67         .dev_config = shirq_ras1_config,
68         .dev_count = ARRAY_SIZE(shirq_ras1_config),
69         .regs = {
70                 .enb_reg = SPEAR300_INT_ENB_MASK_REG,
71                 .status_reg = SPEAR300_INT_STS_MASK_REG,
72                 .status_reg_mask = SPEAR300_SHIRQ_RAS1_MASK,
73                 .clear_reg = -1,
74         },
75 };
76
77 /* DMAC platform data's slave info */
78 struct pl08x_channel_data spear300_dma_info[] = {
79         {
80                 .bus_id = "uart0_rx",
81                 .min_signal = 2,
82                 .max_signal = 2,
83                 .muxval = 0,
84                 .cctl = 0,
85                 .periph_buses = PL08X_AHB1,
86         }, {
87                 .bus_id = "uart0_tx",
88                 .min_signal = 3,
89                 .max_signal = 3,
90                 .muxval = 0,
91                 .cctl = 0,
92                 .periph_buses = PL08X_AHB1,
93         }, {
94                 .bus_id = "ssp0_rx",
95                 .min_signal = 8,
96                 .max_signal = 8,
97                 .muxval = 0,
98                 .cctl = 0,
99                 .periph_buses = PL08X_AHB1,
100         }, {
101                 .bus_id = "ssp0_tx",
102                 .min_signal = 9,
103                 .max_signal = 9,
104                 .muxval = 0,
105                 .cctl = 0,
106                 .periph_buses = PL08X_AHB1,
107         }, {
108                 .bus_id = "i2c_rx",
109                 .min_signal = 10,
110                 .max_signal = 10,
111                 .muxval = 0,
112                 .cctl = 0,
113                 .periph_buses = PL08X_AHB1,
114         }, {
115                 .bus_id = "i2c_tx",
116                 .min_signal = 11,
117                 .max_signal = 11,
118                 .muxval = 0,
119                 .cctl = 0,
120                 .periph_buses = PL08X_AHB1,
121         }, {
122                 .bus_id = "irda",
123                 .min_signal = 12,
124                 .max_signal = 12,
125                 .muxval = 0,
126                 .cctl = 0,
127                 .periph_buses = PL08X_AHB1,
128         }, {
129                 .bus_id = "adc",
130                 .min_signal = 13,
131                 .max_signal = 13,
132                 .muxval = 0,
133                 .cctl = 0,
134                 .periph_buses = PL08X_AHB1,
135         }, {
136                 .bus_id = "to_jpeg",
137                 .min_signal = 14,
138                 .max_signal = 14,
139                 .muxval = 0,
140                 .cctl = 0,
141                 .periph_buses = PL08X_AHB1,
142         }, {
143                 .bus_id = "from_jpeg",
144                 .min_signal = 15,
145                 .max_signal = 15,
146                 .muxval = 0,
147                 .cctl = 0,
148                 .periph_buses = PL08X_AHB1,
149         }, {
150                 .bus_id = "ras0_rx",
151                 .min_signal = 0,
152                 .max_signal = 0,
153                 .muxval = 1,
154                 .cctl = 0,
155                 .periph_buses = PL08X_AHB1,
156         }, {
157                 .bus_id = "ras0_tx",
158                 .min_signal = 1,
159                 .max_signal = 1,
160                 .muxval = 1,
161                 .cctl = 0,
162                 .periph_buses = PL08X_AHB1,
163         }, {
164                 .bus_id = "ras1_rx",
165                 .min_signal = 2,
166                 .max_signal = 2,
167                 .muxval = 1,
168                 .cctl = 0,
169                 .periph_buses = PL08X_AHB1,
170         }, {
171                 .bus_id = "ras1_tx",
172                 .min_signal = 3,
173                 .max_signal = 3,
174                 .muxval = 1,
175                 .cctl = 0,
176                 .periph_buses = PL08X_AHB1,
177         }, {
178                 .bus_id = "ras2_rx",
179                 .min_signal = 4,
180                 .max_signal = 4,
181                 .muxval = 1,
182                 .cctl = 0,
183                 .periph_buses = PL08X_AHB1,
184         }, {
185                 .bus_id = "ras2_tx",
186                 .min_signal = 5,
187                 .max_signal = 5,
188                 .muxval = 1,
189                 .cctl = 0,
190                 .periph_buses = PL08X_AHB1,
191         }, {
192                 .bus_id = "ras3_rx",
193                 .min_signal = 6,
194                 .max_signal = 6,
195                 .muxval = 1,
196                 .cctl = 0,
197                 .periph_buses = PL08X_AHB1,
198         }, {
199                 .bus_id = "ras3_tx",
200                 .min_signal = 7,
201                 .max_signal = 7,
202                 .muxval = 1,
203                 .cctl = 0,
204                 .periph_buses = PL08X_AHB1,
205         }, {
206                 .bus_id = "ras4_rx",
207                 .min_signal = 8,
208                 .max_signal = 8,
209                 .muxval = 1,
210                 .cctl = 0,
211                 .periph_buses = PL08X_AHB1,
212         }, {
213                 .bus_id = "ras4_tx",
214                 .min_signal = 9,
215                 .max_signal = 9,
216                 .muxval = 1,
217                 .cctl = 0,
218                 .periph_buses = PL08X_AHB1,
219         }, {
220                 .bus_id = "ras5_rx",
221                 .min_signal = 10,
222                 .max_signal = 10,
223                 .muxval = 1,
224                 .cctl = 0,
225                 .periph_buses = PL08X_AHB1,
226         }, {
227                 .bus_id = "ras5_tx",
228                 .min_signal = 11,
229                 .max_signal = 11,
230                 .muxval = 1,
231                 .cctl = 0,
232                 .periph_buses = PL08X_AHB1,
233         }, {
234                 .bus_id = "ras6_rx",
235                 .min_signal = 12,
236                 .max_signal = 12,
237                 .muxval = 1,
238                 .cctl = 0,
239                 .periph_buses = PL08X_AHB1,
240         }, {
241                 .bus_id = "ras6_tx",
242                 .min_signal = 13,
243                 .max_signal = 13,
244                 .muxval = 1,
245                 .cctl = 0,
246                 .periph_buses = PL08X_AHB1,
247         }, {
248                 .bus_id = "ras7_rx",
249                 .min_signal = 14,
250                 .max_signal = 14,
251                 .muxval = 1,
252                 .cctl = 0,
253                 .periph_buses = PL08X_AHB1,
254         }, {
255                 .bus_id = "ras7_tx",
256                 .min_signal = 15,
257                 .max_signal = 15,
258                 .muxval = 1,
259                 .cctl = 0,
260                 .periph_buses = PL08X_AHB1,
261         },
262 };
263
264 /* Add SPEAr300 auxdata to pass platform data */
265 static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {
266         OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
267                         &pl022_plat_data),
268         OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
269                         &pl080_plat_data),
270         {}
271 };
272
273 static void __init spear300_dt_init(void)
274 {
275         int ret;
276
277         pl080_plat_data.slave_channels = spear300_dma_info;
278         pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info);
279
280         of_platform_populate(NULL, of_default_bus_match_table,
281                         spear300_auxdata_lookup, NULL);
282
283         /* shared irq registration */
284         shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K);
285         if (shirq_ras1.regs.base) {
286                 ret = spear_shirq_register(&shirq_ras1);
287                 if (ret)
288                         pr_err("Error registering Shared IRQ\n");
289         }
290 }
291
292 static const char * const spear300_dt_board_compat[] = {
293         "st,spear300",
294         "st,spear300-evb",
295         NULL,
296 };
297
298 static void __init spear300_map_io(void)
299 {
300         spear3xx_map_io();
301         spear300_clk_init();
302 }
303
304 DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")
305         .map_io         =       spear300_map_io,
306         .init_irq       =       spear3xx_dt_init_irq,
307         .handle_irq     =       vic_handle_irq,
308         .timer          =       &spear3xx_timer,
309         .init_machine   =       spear300_dt_init,
310         .restart        =       spear_restart,
311         .dt_compat      =       spear300_dt_board_compat,
312 MACHINE_END