2 * r8a7779 clock framework support
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/init.h>
21 #include <linux/kernel.h>
23 #include <linux/sh_clk.h>
24 #include <linux/clkdev.h>
25 #include <mach/common.h>
27 #define FRQMR 0xffc80014
28 #define MSTPCR0 0xffc80030
29 #define MSTPCR1 0xffc80034
30 #define MSTPCR3 0xffc8003c
31 #define MSTPSR1 0xffc80044
32 #define MSTPSR4 0xffc80048
33 #define MSTPSR6 0xffc8004c
34 #define MSTPCR4 0xffc80050
35 #define MSTPCR5 0xffc80054
36 #define MSTPCR6 0xffc80058
37 #define MSTPCR7 0xffc80040
39 /* ioremap() through clock mapping mandatory to avoid
40 * collision with ARM coherent DMA virtual memory range.
43 static struct clk_mapping cpg_mapping = {
48 static struct clk clkp = {
49 .rate = 62500000, /* FIXME: shortcut */
50 .flags = CLK_ENABLE_ON_INIT,
51 .mapping = &cpg_mapping,
54 static struct clk *main_clks[] = {
58 enum { MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
59 MSTP016, MSTP015, MSTP014,
62 #define MSTP(_parent, _reg, _bit, _flags) \
63 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
65 static struct clk mstp_clks[MSTP_NR] = {
66 [MSTP026] = MSTP(&clkp, MSTPCR0, 26, 0), /* SCIF0 */
67 [MSTP025] = MSTP(&clkp, MSTPCR0, 25, 0), /* SCIF1 */
68 [MSTP024] = MSTP(&clkp, MSTPCR0, 24, 0), /* SCIF2 */
69 [MSTP023] = MSTP(&clkp, MSTPCR0, 23, 0), /* SCIF3 */
70 [MSTP022] = MSTP(&clkp, MSTPCR0, 22, 0), /* SCIF4 */
71 [MSTP021] = MSTP(&clkp, MSTPCR0, 21, 0), /* SCIF5 */
72 [MSTP016] = MSTP(&clkp, MSTPCR0, 16, 0), /* TMU0 */
73 [MSTP015] = MSTP(&clkp, MSTPCR0, 15, 0), /* TMU1 */
74 [MSTP014] = MSTP(&clkp, MSTPCR0, 14, 0), /* TMU2 */
77 static struct clk_lookup lookups[] = {
79 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
80 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
81 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
82 CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
83 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
84 CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */
85 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
86 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
89 void __init r8a7779_clock_init(void)
93 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
94 ret = clk_register(main_clks[k]);
97 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
99 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
104 panic("failed to setup r8a7779 clocks\n");