2 * linux/arch/arm/mach-sa1100/generic.c
4 * Author: Nicolas Pitre
6 * Code common to all SA11x0 machines.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/gpio.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
19 #include <linux/cpufreq.h>
20 #include <linux/ioport.h>
21 #include <linux/platform_device.h>
23 #include <video/sa1100fb.h>
25 #include <asm/div64.h>
26 #include <mach/hardware.h>
27 #include <asm/system.h>
28 #include <asm/mach/map.h>
29 #include <asm/mach/flash.h>
34 unsigned int reset_status;
35 EXPORT_SYMBOL(reset_status);
40 * This table is setup for a 3.6864MHz Crystal.
42 static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
62 unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
68 for (i = 0; i < NR_FREQS; i++)
69 if (cclk_frequency_100khz[i] >= khz)
75 unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
77 unsigned int freq = 0;
79 freq = cclk_frequency_100khz[idx] * 100;
84 /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
85 * this platform, anyway.
87 int sa11x0_verify_speed(struct cpufreq_policy *policy)
93 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
95 /* make sure that at least one frequency is within the policy */
96 tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
97 if (tmp > policy->max)
100 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
105 unsigned int sa11x0_getspeed(unsigned int cpu)
109 return cclk_frequency_100khz[PPCR & 0xf] * 100;
113 * Default power-off for SA1100
115 static void sa1100_power_off(void)
119 /* disable internal oscillator, float CS lines */
120 PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
121 /* enable wake-up on GPIO0 (Assabet...) */
122 PWER = GFER = GRER = 1;
124 * set scratchpad to zero, just in case it is used as a
125 * restart address by the bootloader.
128 /* enter sleep mode */
132 void sa11x0_restart(char mode, const char *cmd)
135 /* Jump into ROM at address 0 */
138 /* Use on-chip reset capability */
143 static void sa11x0_register_device(struct platform_device *dev, void *data)
146 dev->dev.platform_data = data;
147 err = platform_device_register(dev);
149 printk(KERN_ERR "Unable to register device %s: %d\n",
154 static struct resource sa11x0udc_resources[] = {
155 [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
156 [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
159 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
161 static struct platform_device sa11x0udc_device = {
162 .name = "sa11x0-udc",
165 .dma_mask = &sa11x0udc_dma_mask,
166 .coherent_dma_mask = 0xffffffff,
168 .num_resources = ARRAY_SIZE(sa11x0udc_resources),
169 .resource = sa11x0udc_resources,
172 static struct resource sa11x0uart1_resources[] = {
173 [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
174 [1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
177 static struct platform_device sa11x0uart1_device = {
178 .name = "sa11x0-uart",
180 .num_resources = ARRAY_SIZE(sa11x0uart1_resources),
181 .resource = sa11x0uart1_resources,
184 static struct resource sa11x0uart3_resources[] = {
185 [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
186 [1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
189 static struct platform_device sa11x0uart3_device = {
190 .name = "sa11x0-uart",
192 .num_resources = ARRAY_SIZE(sa11x0uart3_resources),
193 .resource = sa11x0uart3_resources,
196 static struct resource sa11x0mcp_resources[] = {
197 [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
198 [1] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
201 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
203 static struct platform_device sa11x0mcp_device = {
204 .name = "sa11x0-mcp",
207 .dma_mask = &sa11x0mcp_dma_mask,
208 .coherent_dma_mask = 0xffffffff,
210 .num_resources = ARRAY_SIZE(sa11x0mcp_resources),
211 .resource = sa11x0mcp_resources,
214 void sa11x0_register_mcp(struct mcp_plat_data *data)
216 sa11x0_register_device(&sa11x0mcp_device, data);
219 static struct resource sa11x0ssp_resources[] = {
220 [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
221 [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
224 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
226 static struct platform_device sa11x0ssp_device = {
227 .name = "sa11x0-ssp",
230 .dma_mask = &sa11x0ssp_dma_mask,
231 .coherent_dma_mask = 0xffffffff,
233 .num_resources = ARRAY_SIZE(sa11x0ssp_resources),
234 .resource = sa11x0ssp_resources,
237 static struct resource sa11x0fb_resources[] = {
238 [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
239 [1] = DEFINE_RES_IRQ(IRQ_LCD),
242 static struct platform_device sa11x0fb_device = {
246 .coherent_dma_mask = 0xffffffff,
248 .num_resources = ARRAY_SIZE(sa11x0fb_resources),
249 .resource = sa11x0fb_resources,
252 void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
254 sa11x0_register_device(&sa11x0fb_device, inf);
257 static struct platform_device sa11x0pcmcia_device = {
258 .name = "sa11x0-pcmcia",
262 static struct platform_device sa11x0mtd_device = {
263 .name = "sa1100-mtd",
267 void sa11x0_register_mtd(struct flash_platform_data *flash,
268 struct resource *res, int nr)
270 flash->name = "sa1100";
271 sa11x0mtd_device.resource = res;
272 sa11x0mtd_device.num_resources = nr;
273 sa11x0_register_device(&sa11x0mtd_device, flash);
276 static struct resource sa11x0ir_resources[] = {
277 DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
278 DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
279 DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
280 DEFINE_RES_IRQ(IRQ_Ser2ICP),
283 static struct platform_device sa11x0ir_device = {
286 .num_resources = ARRAY_SIZE(sa11x0ir_resources),
287 .resource = sa11x0ir_resources,
290 void sa11x0_register_irda(struct irda_platform_data *irda)
292 sa11x0_register_device(&sa11x0ir_device, irda);
295 static struct platform_device sa11x0rtc_device = {
296 .name = "sa1100-rtc",
300 static struct resource sa11x0dma_resources[] = {
301 DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
302 DEFINE_RES_IRQ(IRQ_DMA0),
303 DEFINE_RES_IRQ(IRQ_DMA1),
304 DEFINE_RES_IRQ(IRQ_DMA2),
305 DEFINE_RES_IRQ(IRQ_DMA3),
306 DEFINE_RES_IRQ(IRQ_DMA4),
307 DEFINE_RES_IRQ(IRQ_DMA5),
310 static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
312 static struct platform_device sa11x0dma_device = {
313 .name = "sa11x0-dma",
316 .dma_mask = &sa11x0dma_dma_mask,
317 .coherent_dma_mask = 0xffffffff,
319 .num_resources = ARRAY_SIZE(sa11x0dma_resources),
320 .resource = sa11x0dma_resources,
323 static struct platform_device *sa11x0_devices[] __initdata = {
328 &sa11x0pcmcia_device,
333 static int __init sa1100_init(void)
335 pm_power_off = sa1100_power_off;
336 return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
339 arch_initcall(sa1100_init);
343 * Common I/O mapping:
345 * Typically, static virtual address mappings are as follow:
347 * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
348 * 0xf4000000-0xf4ffffff: SA-1111
349 * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
350 * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
351 * 0xffff0000-0xffff0fff: SA1100 exception vectors
352 * 0xffff2000-0xffff2fff: Minicache copy_user_page area
354 * Below 0xe8000000 is reserved for vm allocation.
356 * The machine specific code must provide the extra mapping beside the
357 * default mapping provided here.
360 static struct map_desc standard_io_desc[] __initdata = {
362 .virtual = 0xf8000000,
363 .pfn = __phys_to_pfn(0x80000000),
364 .length = 0x00100000,
367 .virtual = 0xfa000000,
368 .pfn = __phys_to_pfn(0x90000000),
369 .length = 0x00100000,
372 .virtual = 0xfc000000,
373 .pfn = __phys_to_pfn(0xa0000000),
374 .length = 0x00100000,
377 .virtual = 0xfe000000,
378 .pfn = __phys_to_pfn(0xb0000000),
379 .length = 0x00200000,
384 void __init sa1100_map_io(void)
386 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
390 * Disable the memory bus request/grant signals on the SA1110 to
391 * ensure that we don't receive spurious memory requests. We set
392 * the MBGNT signal false to ensure the SA1111 doesn't own the
395 void sa1110_mb_disable(void)
399 local_irq_save(flags);
403 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
405 GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
407 local_irq_restore(flags);
411 * If the system is going to use the SA-1111 DMA engines, set up
412 * the memory bus request/grant pins.
414 void sa1110_mb_enable(void)
418 local_irq_save(flags);
422 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
424 GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
427 local_irq_restore(flags);