arch/arm/mach-s5pv310/mach-smdkc210.c

   1 /* linux/arch/arm/mach-s5pv310/mach-smdkc210.c
   2  *
   3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com/
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/serial_core.h>
  12 #include <linux/gpio.h>
  13 #include <linux/mmc/host.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/smsc911x.h>
  16 #include <linux/io.h>
  17
  18 #include <asm/mach/arch.h>
  19 #include <asm/mach-types.h>
  20
  21 #include <plat/regs-serial.h>
  22 #include <plat/s5pv310.h>
  23 #include <plat/cpu.h>
  24 #include <plat/devs.h>
  25 #include <plat/sdhci.h>
  26 #include <plat/pd.h>
  27
  28 #include <mach/map.h>
  29 #include <mach/regs-srom.h>
  30
  31 /* Following are default values for UCON, ULCON and UFCON UART registers */
  32 #define SMDKC210_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  33                                  S3C2410_UCON_RXILEVEL |        \
  34                                  S3C2410_UCON_TXIRQMODE |       \
  35                                  S3C2410_UCON_RXIRQMODE |       \
  36                                  S3C2410_UCON_RXFIFO_TOI |      \
  37                                  S3C2443_UCON_RXERR_IRQEN)
  38
  39 #define SMDKC210_ULCON_DEFAULT  S3C2410_LCON_CS8
  40
  41 #define SMDKC210_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  42                                  S5PV210_UFCON_TXTRIG4 |        \
  43                                  S5PV210_UFCON_RXTRIG4)
  44
  45 static struct s3c2410_uartcfg smdkc210_uartcfgs[] __initdata = {
  46         [0] = {
  47                 .hwport         = 0,
  48                 .flags          = 0,
  49                 .ucon           = SMDKC210_UCON_DEFAULT,
  50                 .ulcon          = SMDKC210_ULCON_DEFAULT,
  51                 .ufcon          = SMDKC210_UFCON_DEFAULT,
  52         },
  53         [1] = {
  54                 .hwport         = 1,
  55                 .flags          = 0,
  56                 .ucon           = SMDKC210_UCON_DEFAULT,
  57                 .ulcon          = SMDKC210_ULCON_DEFAULT,
  58                 .ufcon          = SMDKC210_UFCON_DEFAULT,
  59         },
  60         [2] = {
  61                 .hwport         = 2,
  62                 .flags          = 0,
  63                 .ucon           = SMDKC210_UCON_DEFAULT,
  64                 .ulcon          = SMDKC210_ULCON_DEFAULT,
  65                 .ufcon          = SMDKC210_UFCON_DEFAULT,
  66         },
  67         [3] = {
  68                 .hwport         = 3,
  69                 .flags          = 0,
  70                 .ucon           = SMDKC210_UCON_DEFAULT,
  71                 .ulcon          = SMDKC210_ULCON_DEFAULT,
  72                 .ufcon          = SMDKC210_UFCON_DEFAULT,
  73         },
  74 };
  75
  76 static struct s3c_sdhci_platdata smdkc210_hsmmc0_pdata __initdata = {
  77         .cd_type                = S3C_SDHCI_CD_GPIO,
  78         .ext_cd_gpio            = S5PV310_GPK0(2),
  79         .ext_cd_gpio_invert     = 1,
  80         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  81 #ifdef CONFIG_S5PV310_SDHCI_CH0_8BIT
  82         .max_width              = 8,
  83         .host_caps              = MMC_CAP_8_BIT_DATA,
  84 #endif
  85 };
  86
  87 static struct s3c_sdhci_platdata smdkc210_hsmmc1_pdata __initdata = {
  88         .cd_type                = S3C_SDHCI_CD_GPIO,
  89         .ext_cd_gpio            = S5PV310_GPK0(2),
  90         .ext_cd_gpio_invert     = 1,
  91         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  92 };
  93
  94 static struct s3c_sdhci_platdata smdkc210_hsmmc2_pdata __initdata = {
  95         .cd_type                = S3C_SDHCI_CD_GPIO,
  96         .ext_cd_gpio            = S5PV310_GPK2(2),
  97         .ext_cd_gpio_invert     = 1,
  98         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  99 #ifdef CONFIG_S5PV310_SDHCI_CH2_8BIT
 100         .max_width              = 8,
 101         .host_caps              = MMC_CAP_8_BIT_DATA,
 102 #endif
 103 };
 104
 105 static struct s3c_sdhci_platdata smdkc210_hsmmc3_pdata __initdata = {
 106         .cd_type                = S3C_SDHCI_CD_GPIO,
 107         .ext_cd_gpio            = S5PV310_GPK2(2),
 108         .ext_cd_gpio_invert     = 1,
 109         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 110 };
 111
 112 static struct resource smdkc210_smsc911x_resources[] = {
 113         [0] = {
 114                 .start  = S5PV310_PA_SROM_BANK(1),
 115                 .end    = S5PV310_PA_SROM_BANK(1) + SZ_64K - 1,
 116                 .flags  = IORESOURCE_MEM,
 117         },
 118         [1] = {
 119                 .start  = IRQ_EINT(5),
 120                 .end    = IRQ_EINT(5),
 121                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 122         },
 123 };
 124
 125 static struct smsc911x_platform_config smsc9215_config = {
 126         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
 127         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 128         .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
 129         .phy_interface  = PHY_INTERFACE_MODE_MII,
 130         .mac            = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
 131 };
 132
 133 static struct platform_device smdkc210_smsc911x = {
 134         .name           = "smsc911x",
 135         .id             = -1,
 136         .num_resources  = ARRAY_SIZE(smdkc210_smsc911x_resources),
 137         .resource       = smdkc210_smsc911x_resources,
 138         .dev            = {
 139                 .platform_data  = &smsc9215_config,
 140         },
 141 };
 142
 143 static struct platform_device *smdkc210_devices[] __initdata = {
 144         &s3c_device_hsmmc0,
 145         &s3c_device_hsmmc1,
 146         &s3c_device_hsmmc2,
 147         &s3c_device_hsmmc3,
 148         &s3c_device_rtc,
 149         &s3c_device_wdt,
 150         &smdkc210_smsc911x,
 151         &s5pv310_device_pd[PD_MFC],
 152         &s5pv310_device_pd[PD_G3D],
 153         &s5pv310_device_pd[PD_LCD0],
 154         &s5pv310_device_pd[PD_LCD1],
 155         &s5pv310_device_pd[PD_CAM],
 156         &s5pv310_device_pd[PD_TV],
 157         &s5pv310_device_pd[PD_GPS],
 158 };
 159
 160 static void __init smdkc210_smsc911x_init(void)
 161 {
 162         u32 cs1;
 163
 164         /* configure nCS1 width to 16 bits */
 165         cs1 = __raw_readl(S5PV310_SROM_BW) &
 166                     ~(S5PV310_SROM_BW__CS_MASK <<
 167                                     S5PV310_SROM_BW__NCS1__SHIFT);
 168         cs1 |= ((1 << S5PV310_SROM_BW__DATAWIDTH__SHIFT) |
 169                 (1 << S5PV310_SROM_BW__WAITENABLE__SHIFT) |
 170                 (1 << S5PV310_SROM_BW__BYTEENABLE__SHIFT)) <<
 171                 S5PV310_SROM_BW__NCS1__SHIFT;
 172         __raw_writel(cs1, S5PV310_SROM_BW);
 173
 174         /* set timing for nCS1 suitable for ethernet chip */
 175         __raw_writel((0x1 << S5PV310_SROM_BCX__PMC__SHIFT) |
 176                      (0x9 << S5PV310_SROM_BCX__TACP__SHIFT) |
 177                      (0xc << S5PV310_SROM_BCX__TCAH__SHIFT) |
 178                      (0x1 << S5PV310_SROM_BCX__TCOH__SHIFT) |
 179                      (0x6 << S5PV310_SROM_BCX__TACC__SHIFT) |
 180                      (0x1 << S5PV310_SROM_BCX__TCOS__SHIFT) |
 181                      (0x1 << S5PV310_SROM_BCX__TACS__SHIFT), S5PV310_SROM_BC1);
 182 }
 183
 184 static void __init smdkc210_map_io(void)
 185 {
 186         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 187         s3c24xx_init_clocks(24000000);
 188         s3c24xx_init_uarts(smdkc210_uartcfgs, ARRAY_SIZE(smdkc210_uartcfgs));
 189 }
 190
 191 static void __init smdkc210_machine_init(void)
 192 {
 193         smdkc210_smsc911x_init();
 194
 195         s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata);
 196         s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata);
 197         s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata);
 198         s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata);
 199
 200         platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices));
 201 }
 202
 203 MACHINE_START(SMDKC210, "SMDKC210")
 204         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 205         .boot_params    = S5P_PA_SDRAM + 0x100,
 206         .init_irq       = s5pv310_init_irq,
 207         .map_io         = smdkc210_map_io,
 208         .init_machine   = smdkc210_machine_init,
 209         .timer          = &s5pv310_timer,
 210 MACHINE_END