arch/arm/mach-s5pv310/mach-smdkc210.c

   1 /* linux/arch/arm/mach-s5pv310/mach-smdkc210.c
   2  *
   3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com/
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/serial_core.h>
  12 #include <linux/gpio.h>
  13 #include <linux/mmc/host.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/smsc911x.h>
  16 #include <linux/io.h>
  17 #include <linux/i2c.h>
  18
  19 #include <asm/mach/arch.h>
  20 #include <asm/mach-types.h>
  21
  22 #include <plat/regs-serial.h>
  23 #include <plat/regs-srom.h>
  24 #include <plat/s5pv310.h>
  25 #include <plat/cpu.h>
  26 #include <plat/devs.h>
  27 #include <plat/sdhci.h>
  28 #include <plat/iic.h>
  29
  30 #include <mach/map.h>
  31
  32 /* Following are default values for UCON, ULCON and UFCON UART registers */
  33 #define SMDKC210_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  34                                  S3C2410_UCON_RXILEVEL |        \
  35                                  S3C2410_UCON_TXIRQMODE |       \
  36                                  S3C2410_UCON_RXIRQMODE |       \
  37                                  S3C2410_UCON_RXFIFO_TOI |      \
  38                                  S3C2443_UCON_RXERR_IRQEN)
  39
  40 #define SMDKC210_ULCON_DEFAULT  S3C2410_LCON_CS8
  41
  42 #define SMDKC210_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  43                                  S5PV210_UFCON_TXTRIG4 |        \
  44                                  S5PV210_UFCON_RXTRIG4)
  45
  46 static struct s3c2410_uartcfg smdkc210_uartcfgs[] __initdata = {
  47         [0] = {
  48                 .hwport         = 0,
  49                 .flags          = 0,
  50                 .ucon           = SMDKC210_UCON_DEFAULT,
  51                 .ulcon          = SMDKC210_ULCON_DEFAULT,
  52                 .ufcon          = SMDKC210_UFCON_DEFAULT,
  53         },
  54         [1] = {
  55                 .hwport         = 1,
  56                 .flags          = 0,
  57                 .ucon           = SMDKC210_UCON_DEFAULT,
  58                 .ulcon          = SMDKC210_ULCON_DEFAULT,
  59                 .ufcon          = SMDKC210_UFCON_DEFAULT,
  60         },
  61         [2] = {
  62                 .hwport         = 2,
  63                 .flags          = 0,
  64                 .ucon           = SMDKC210_UCON_DEFAULT,
  65                 .ulcon          = SMDKC210_ULCON_DEFAULT,
  66                 .ufcon          = SMDKC210_UFCON_DEFAULT,
  67         },
  68         [3] = {
  69                 .hwport         = 3,
  70                 .flags          = 0,
  71                 .ucon           = SMDKC210_UCON_DEFAULT,
  72                 .ulcon          = SMDKC210_ULCON_DEFAULT,
  73                 .ufcon          = SMDKC210_UFCON_DEFAULT,
  74         },
  75 };
  76
  77 static struct s3c_sdhci_platdata smdkc210_hsmmc0_pdata __initdata = {
  78         .cd_type                = S3C_SDHCI_CD_GPIO,
  79         .ext_cd_gpio            = S5PV310_GPK0(2),
  80         .ext_cd_gpio_invert     = 1,
  81         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  82 #ifdef CONFIG_S5PV310_SDHCI_CH0_8BIT
  83         .max_width              = 8,
  84         .host_caps              = MMC_CAP_8_BIT_DATA,
  85 #endif
  86 };
  87
  88 static struct s3c_sdhci_platdata smdkc210_hsmmc1_pdata __initdata = {
  89         .cd_type                = S3C_SDHCI_CD_GPIO,
  90         .ext_cd_gpio            = S5PV310_GPK0(2),
  91         .ext_cd_gpio_invert     = 1,
  92         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  93 };
  94
  95 static struct s3c_sdhci_platdata smdkc210_hsmmc2_pdata __initdata = {
  96         .cd_type                = S3C_SDHCI_CD_GPIO,
  97         .ext_cd_gpio            = S5PV310_GPK2(2),
  98         .ext_cd_gpio_invert     = 1,
  99         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 100 #ifdef CONFIG_S5PV310_SDHCI_CH2_8BIT
 101         .max_width              = 8,
 102         .host_caps              = MMC_CAP_8_BIT_DATA,
 103 #endif
 104 };
 105
 106 static struct s3c_sdhci_platdata smdkc210_hsmmc3_pdata __initdata = {
 107         .cd_type                = S3C_SDHCI_CD_GPIO,
 108         .ext_cd_gpio            = S5PV310_GPK2(2),
 109         .ext_cd_gpio_invert     = 1,
 110         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 111 };
 112
 113 static struct resource smdkc210_smsc911x_resources[] = {
 114         [0] = {
 115                 .start  = S5PV310_PA_SROM_BANK(1),
 116                 .end    = S5PV310_PA_SROM_BANK(1) + SZ_64K - 1,
 117                 .flags  = IORESOURCE_MEM,
 118         },
 119         [1] = {
 120                 .start  = IRQ_EINT(5),
 121                 .end    = IRQ_EINT(5),
 122                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 123         },
 124 };
 125
 126 static struct smsc911x_platform_config smsc9215_config = {
 127         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
 128         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 129         .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
 130         .phy_interface  = PHY_INTERFACE_MODE_MII,
 131         .mac            = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
 132 };
 133
 134 static struct platform_device smdkc210_smsc911x = {
 135         .name           = "smsc911x",
 136         .id             = -1,
 137         .num_resources  = ARRAY_SIZE(smdkc210_smsc911x_resources),
 138         .resource       = smdkc210_smsc911x_resources,
 139         .dev            = {
 140                 .platform_data  = &smsc9215_config,
 141         },
 142 };
 143
 144 static struct i2c_board_info i2c_devs1[] __initdata = {
 145         {I2C_BOARD_INFO("wm8994", 0x1a),},
 146 };
 147
 148 static struct platform_device *smdkc210_devices[] __initdata = {
 149         &s3c_device_i2c1,
 150         &s3c_device_hsmmc0,
 151         &s3c_device_hsmmc1,
 152         &s3c_device_hsmmc2,
 153         &s3c_device_hsmmc3,
 154         &s3c_device_rtc,
 155         &s3c_device_wdt,
 156         &smdkc210_smsc911x,
 157         &s5pv310_device_ac97,
 158         &s5pv310_device_i2s0,
 159 };
 160
 161 static void __init smdkc210_smsc911x_init(void)
 162 {
 163         u32 cs1;
 164
 165         /* configure nCS1 width to 16 bits */
 166         cs1 = __raw_readl(S5P_SROM_BW) &
 167                 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
 168         cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
 169                 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
 170                 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
 171                 S5P_SROM_BW__NCS1__SHIFT;
 172         __raw_writel(cs1, S5P_SROM_BW);
 173
 174         /* set timing for nCS1 suitable for ethernet chip */
 175         __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
 176                      (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
 177                      (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
 178                      (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
 179                      (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
 180                      (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
 181                      (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
 182 }
 183
 184 static void __init smdkc210_map_io(void)
 185 {
 186         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 187         s3c24xx_init_clocks(24000000);
 188         s3c24xx_init_uarts(smdkc210_uartcfgs, ARRAY_SIZE(smdkc210_uartcfgs));
 189 }
 190
 191 static void __init smdkc210_machine_init(void)
 192 {
 193         s3c_i2c1_set_platdata(NULL);
 194         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 195
 196         smdkc210_smsc911x_init();
 197
 198         s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata);
 199         s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata);
 200         s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata);
 201         s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata);
 202
 203         platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices));
 204 }
 205
 206 MACHINE_START(SMDKC210, "SMDKC210")
 207         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 208         .boot_params    = S5P_PA_SDRAM + 0x100,
 209         .init_irq       = s5pv310_init_irq,
 210         .map_io         = smdkc210_map_io,
 211         .init_machine   = smdkc210_machine_init,
 212         .timer          = &s5pv310_timer,
 213 MACHINE_END