Merge branch 'for-next' of git://git.samba.org/sfrench/cifs-2.6
[pandora-kernel.git] / arch / arm / mach-s5p64x0 / mach-smdk6450.c
1 /* linux/arch/arm/mach-s5p64x0/mach-smdk6450.c
2  *
3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4  *              http://www.samsung.com
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/interrupt.h>
14 #include <linux/list.h>
15 #include <linux/timer.h>
16 #include <linux/delay.h>
17 #include <linux/init.h>
18 #include <linux/i2c.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/module.h>
23 #include <linux/clk.h>
24 #include <linux/gpio.h>
25 #include <linux/pwm_backlight.h>
26 #include <linux/fb.h>
27 #include <linux/mmc/host.h>
28
29 #include <video/platform_lcd.h>
30
31 #include <asm/hardware/vic.h>
32 #include <asm/mach/arch.h>
33 #include <asm/mach/map.h>
34 #include <asm/irq.h>
35 #include <asm/mach-types.h>
36
37 #include <mach/hardware.h>
38 #include <mach/map.h>
39 #include <mach/regs-clock.h>
40 #include <mach/i2c.h>
41 #include <mach/regs-gpio.h>
42
43 #include <plat/regs-serial.h>
44 #include <plat/gpio-cfg.h>
45 #include <plat/clock.h>
46 #include <plat/devs.h>
47 #include <plat/cpu.h>
48 #include <plat/iic.h>
49 #include <plat/pll.h>
50 #include <plat/adc.h>
51 #include <plat/ts.h>
52 #include <plat/s5p-time.h>
53 #include <plat/backlight.h>
54 #include <plat/fb.h>
55 #include <plat/regs-fb.h>
56 #include <plat/sdhci.h>
57
58 #include "common.h"
59
60 #define SMDK6450_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
61                                 S3C2410_UCON_RXILEVEL |         \
62                                 S3C2410_UCON_TXIRQMODE |        \
63                                 S3C2410_UCON_RXIRQMODE |        \
64                                 S3C2410_UCON_RXFIFO_TOI |       \
65                                 S3C2443_UCON_RXERR_IRQEN)
66
67 #define SMDK6450_ULCON_DEFAULT  S3C2410_LCON_CS8
68
69 #define SMDK6450_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
70                                 S3C2440_UFCON_TXTRIG16 |        \
71                                 S3C2410_UFCON_RXTRIG8)
72
73 static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = {
74         [0] = {
75                 .hwport         = 0,
76                 .flags          = 0,
77                 .ucon           = SMDK6450_UCON_DEFAULT,
78                 .ulcon          = SMDK6450_ULCON_DEFAULT,
79                 .ufcon          = SMDK6450_UFCON_DEFAULT,
80         },
81         [1] = {
82                 .hwport         = 1,
83                 .flags          = 0,
84                 .ucon           = SMDK6450_UCON_DEFAULT,
85                 .ulcon          = SMDK6450_ULCON_DEFAULT,
86                 .ufcon          = SMDK6450_UFCON_DEFAULT,
87         },
88         [2] = {
89                 .hwport         = 2,
90                 .flags          = 0,
91                 .ucon           = SMDK6450_UCON_DEFAULT,
92                 .ulcon          = SMDK6450_ULCON_DEFAULT,
93                 .ufcon          = SMDK6450_UFCON_DEFAULT,
94         },
95         [3] = {
96                 .hwport         = 3,
97                 .flags          = 0,
98                 .ucon           = SMDK6450_UCON_DEFAULT,
99                 .ulcon          = SMDK6450_ULCON_DEFAULT,
100                 .ufcon          = SMDK6450_UFCON_DEFAULT,
101         },
102 #if CONFIG_SERIAL_SAMSUNG_UARTS > 4
103         [4] = {
104                 .hwport         = 4,
105                 .flags          = 0,
106                 .ucon           = SMDK6450_UCON_DEFAULT,
107                 .ulcon          = SMDK6450_ULCON_DEFAULT,
108                 .ufcon          = SMDK6450_UFCON_DEFAULT,
109         },
110 #endif
111 #if CONFIG_SERIAL_SAMSUNG_UARTS > 5
112         [5] = {
113                 .hwport         = 5,
114                 .flags          = 0,
115                 .ucon           = SMDK6450_UCON_DEFAULT,
116                 .ulcon          = SMDK6450_ULCON_DEFAULT,
117                 .ufcon          = SMDK6450_UFCON_DEFAULT,
118         },
119 #endif
120 };
121
122 /* Frame Buffer */
123 static struct s3c_fb_pd_win smdk6450_fb_win0 = {
124         .max_bpp        = 32,
125         .default_bpp    = 24,
126         .xres           = 800,
127         .yres           = 480,
128 };
129
130 static struct fb_videomode smdk6450_lcd_timing = {
131         .left_margin    = 8,
132         .right_margin   = 13,
133         .upper_margin   = 7,
134         .lower_margin   = 5,
135         .hsync_len      = 3,
136         .vsync_len      = 1,
137         .xres           = 800,
138         .yres           = 480,
139 };
140
141 static struct s3c_fb_platdata smdk6450_lcd_pdata __initdata = {
142         .win[0]         = &smdk6450_fb_win0,
143         .vtiming        = &smdk6450_lcd_timing,
144         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
145         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
146         .setup_gpio     = s5p64x0_fb_gpio_setup_24bpp,
147 };
148
149 /* LCD power controller */
150 static void smdk6450_lte480_reset_power(struct plat_lcd_data *pd,
151                                          unsigned int power)
152 {
153         int err;
154
155         if (power) {
156                 err = gpio_request(S5P6450_GPN(5), "GPN");
157                 if (err) {
158                         printk(KERN_ERR "failed to request GPN for lcd reset\n");
159                         return;
160                 }
161
162                 gpio_direction_output(S5P6450_GPN(5), 1);
163                 gpio_set_value(S5P6450_GPN(5), 0);
164                 gpio_set_value(S5P6450_GPN(5), 1);
165                 gpio_free(S5P6450_GPN(5));
166         }
167 }
168
169 static struct plat_lcd_data smdk6450_lcd_power_data = {
170         .set_power      = smdk6450_lte480_reset_power,
171 };
172
173 static struct platform_device smdk6450_lcd_lte480wv = {
174         .name                   = "platform-lcd",
175         .dev.parent             = &s3c_device_fb.dev,
176         .dev.platform_data      = &smdk6450_lcd_power_data,
177 };
178
179 static struct platform_device *smdk6450_devices[] __initdata = {
180         &s3c_device_adc,
181         &s3c_device_rtc,
182         &s3c_device_i2c0,
183         &s3c_device_i2c1,
184         &s3c_device_ts,
185         &s3c_device_wdt,
186         &samsung_asoc_dma,
187         &s5p6450_device_iis0,
188         &s3c_device_fb,
189         &smdk6450_lcd_lte480wv,
190         &s3c_device_hsmmc0,
191         &s3c_device_hsmmc1,
192         &s3c_device_hsmmc2,
193         /* s5p6450_device_spi0 will be added */
194 };
195
196 static struct s3c_sdhci_platdata smdk6450_hsmmc0_pdata __initdata = {
197         .cd_type        = S3C_SDHCI_CD_NONE,
198 };
199
200 static struct s3c_sdhci_platdata smdk6450_hsmmc1_pdata __initdata = {
201         .cd_type        = S3C_SDHCI_CD_NONE,
202 #if defined(CONFIG_S5P64X0_SD_CH1_8BIT)
203         .max_width      = 8,
204         .host_caps      = MMC_CAP_8_BIT_DATA,
205 #endif
206 };
207
208 static struct s3c_sdhci_platdata smdk6450_hsmmc2_pdata __initdata = {
209         .cd_type        = S3C_SDHCI_CD_NONE,
210 };
211
212 static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = {
213         .flags          = 0,
214         .slave_addr     = 0x10,
215         .frequency      = 100*1000,
216         .sda_delay      = 100,
217         .cfg_gpio       = s5p6450_i2c0_cfg_gpio,
218 };
219
220 static struct s3c2410_platform_i2c s5p6450_i2c1_data __initdata = {
221         .flags          = 0,
222         .bus_num        = 1,
223         .slave_addr     = 0x10,
224         .frequency      = 100*1000,
225         .sda_delay      = 100,
226         .cfg_gpio       = s5p6450_i2c1_cfg_gpio,
227 };
228
229 static struct i2c_board_info smdk6450_i2c_devs0[] __initdata = {
230         { I2C_BOARD_INFO("wm8580", 0x1b), },
231         { I2C_BOARD_INFO("24c08", 0x50), },     /* Samsung KS24C080C EEPROM */
232 };
233
234 static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = {
235         { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */
236 };
237
238 /* LCD Backlight data */
239 static struct samsung_bl_gpio_info smdk6450_bl_gpio_info = {
240         .no = S5P6450_GPF(15),
241         .func = S3C_GPIO_SFN(2),
242 };
243
244 static struct platform_pwm_backlight_data smdk6450_bl_data = {
245         .pwm_id = 1,
246 };
247
248 static void __init smdk6450_map_io(void)
249 {
250         s5p64x0_init_io(NULL, 0);
251         s3c24xx_init_clocks(19200000);
252         s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
253         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
254 }
255
256 static void s5p6450_set_lcd_interface(void)
257 {
258         unsigned int cfg;
259
260         /* select TFT LCD type (RGB I/F) */
261         cfg = __raw_readl(S5P64X0_SPCON0);
262         cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK;
263         cfg |= S5P64X0_SPCON0_LCD_SEL_RGB;
264         __raw_writel(cfg, S5P64X0_SPCON0);
265 }
266
267 static void __init smdk6450_machine_init(void)
268 {
269         s3c24xx_ts_set_platdata(NULL);
270
271         s3c_i2c0_set_platdata(&s5p6450_i2c0_data);
272         s3c_i2c1_set_platdata(&s5p6450_i2c1_data);
273         i2c_register_board_info(0, smdk6450_i2c_devs0,
274                         ARRAY_SIZE(smdk6450_i2c_devs0));
275         i2c_register_board_info(1, smdk6450_i2c_devs1,
276                         ARRAY_SIZE(smdk6450_i2c_devs1));
277
278         samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
279
280         s5p6450_set_lcd_interface();
281         s3c_fb_set_platdata(&smdk6450_lcd_pdata);
282
283         s3c_sdhci0_set_platdata(&smdk6450_hsmmc0_pdata);
284         s3c_sdhci1_set_platdata(&smdk6450_hsmmc1_pdata);
285         s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata);
286
287         platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
288 }
289
290 MACHINE_START(SMDK6450, "SMDK6450")
291         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
292         .atag_offset    = 0x100,
293
294         .init_irq       = s5p6450_init_irq,
295         .handle_irq     = vic_handle_irq,
296         .map_io         = smdk6450_map_io,
297         .init_machine   = smdk6450_machine_init,
298         .timer          = &s5p_timer,
299         .restart        = s5p64x0_restart,
300 MACHINE_END