1 /* linux/arch/arm/mach-s5p64x0/cpu.c
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/interrupt.h>
14 #include <linux/list.h>
15 #include <linux/timer.h>
16 #include <linux/init.h>
17 #include <linux/clk.h>
19 #include <linux/sysdev.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
22 #include <linux/sched.h>
23 #include <linux/dma-mapping.h>
25 #include <asm/mach/arch.h>
26 #include <asm/mach/map.h>
27 #include <asm/mach/irq.h>
28 #include <asm/proc-fns.h>
31 #include <mach/hardware.h>
33 #include <mach/regs-clock.h>
35 #include <plat/regs-serial.h>
37 #include <plat/devs.h>
38 #include <plat/clock.h>
39 #include <plat/s5p6440.h>
40 #include <plat/s5p6450.h>
41 #include <plat/adc-core.h>
43 /* Initial IO mappings */
45 static struct map_desc s5p64x0_iodesc[] __initdata = {
47 .virtual = (unsigned long)S5P_VA_GPIO,
48 .pfn = __phys_to_pfn(S5P64X0_PA_GPIO),
52 .virtual = (unsigned long)VA_VIC0,
53 .pfn = __phys_to_pfn(S5P64X0_PA_VIC0),
57 .virtual = (unsigned long)VA_VIC1,
58 .pfn = __phys_to_pfn(S5P64X0_PA_VIC1),
64 static struct map_desc s5p6440_iodesc[] __initdata = {
66 .virtual = (unsigned long)S3C_VA_UART,
67 .pfn = __phys_to_pfn(S5P6440_PA_UART(0)),
73 static struct map_desc s5p6450_iodesc[] __initdata = {
75 .virtual = (unsigned long)S3C_VA_UART,
76 .pfn = __phys_to_pfn(S5P6450_PA_UART(0)),
80 .virtual = (unsigned long)S3C_VA_UART + SZ_512K,
81 .pfn = __phys_to_pfn(S5P6450_PA_UART(5)),
87 static void s5p64x0_idle(void)
91 if (!need_resched()) {
92 val = __raw_readl(S5P64X0_PWR_CFG);
95 __raw_writel(val, S5P64X0_PWR_CFG);
105 * register the standard CPU IO areas
108 void __init s5p6440_map_io(void)
110 /* initialize any device information early */
111 s3c_adc_setname("s3c64xx-adc");
113 iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
114 iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
115 init_consistent_dma_size(SZ_8M);
118 void __init s5p6450_map_io(void)
120 /* initialize any device information early */
121 s3c_adc_setname("s3c64xx-adc");
123 iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
124 iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
125 init_consistent_dma_size(SZ_8M);
129 * s5p64x0_init_clocks
131 * register and setup the CPU clocks
134 void __init s5p6440_init_clocks(int xtal)
136 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
138 s3c24xx_register_baseclocks(xtal);
139 s5p_register_clocks(xtal);
140 s5p6440_register_clocks();
141 s5p6440_setup_clocks();
144 void __init s5p6450_init_clocks(int xtal)
146 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
148 s3c24xx_register_baseclocks(xtal);
149 s5p_register_clocks(xtal);
150 s5p6450_register_clocks();
151 s5p6450_setup_clocks();
157 * register the CPU interrupts
160 void __init s5p6440_init_irq(void)
162 /* S5P6440 supports 2 VIC */
166 * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
167 * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
172 s5p_init_irq(vic, ARRAY_SIZE(vic));
175 void __init s5p6450_init_irq(void)
177 /* S5P6450 supports only 2 VIC */
181 * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
182 * VIC1 is missing IRQ VIC1[12, 14, 23]
187 s5p_init_irq(vic, ARRAY_SIZE(vic));
190 struct sysdev_class s5p64x0_sysclass = {
191 .name = "s5p64x0-core",
194 static struct sys_device s5p64x0_sysdev = {
195 .cls = &s5p64x0_sysclass,
198 static int __init s5p64x0_core_init(void)
200 return sysdev_class_register(&s5p64x0_sysclass);
202 core_initcall(s5p64x0_core_init);
204 int __init s5p64x0_init(void)
206 printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
208 /* set idle function */
209 pm_idle = s5p64x0_idle;
211 return sysdev_register(&s5p64x0_sysdev);