1 /* linux/arch/arm/plat-s3c64xx/sleep.S
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * S3C64XX CPU sleep code
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/linkage.h>
16 #include <asm/assembler.h>
19 #undef S3C64XX_VA_GPIO
20 #define S3C64XX_VA_GPIO (0x0)
22 #include <mach/regs-gpio.h>
24 #define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT))
30 * Save enough processor state to allow the restart of the pm.c
38 adr r3, BSYM(s3c64xx_finish_suspend)
41 s3c64xx_finish_suspend:
42 @@ call final suspend code
46 /* Sleep magic, the word before the resume entry point so that the
47 * bootloader can check for a resumeable image. */
53 * This is the entry point, stored by whatever method the bootloader
54 * requires to get the kernel runnign again. This code expects to be
55 * entered with no caches live and the MMU disabled. It will then
56 * restore the MMU and other basic CP registers saved and restart
57 * the kernel C code to finish the resume code.
61 msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
62 ldr r2, =LL_UART /* for debug */
64 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
66 #define S3C64XX_GPNCON (S3C64XX_GPN_BASE + 0x00)
67 #define S3C64XX_GPNDAT (S3C64XX_GPN_BASE + 0x04)
69 #define S3C64XX_GPN_CONMASK(__gpio) (0x3 << ((__gpio) * 2))
70 #define S3C64XX_GPN_OUTPUT(__gpio) (0x1 << ((__gpio) * 2))
72 /* Initialise the GPIO state if we are debugging via the SMDK LEDs,
73 * as the uboot version supplied resets these to inputs during the
77 ldr r3, =S3C64XX_PA_GPIO
78 ldr r0, [ r3, #S3C64XX_GPNCON ]
79 bic r0, r0, #(S3C64XX_GPN_CONMASK(12) | S3C64XX_GPN_CONMASK(13) | \
80 S3C64XX_GPN_CONMASK(14) | S3C64XX_GPN_CONMASK(15))
81 orr r0, r0, #(S3C64XX_GPN_OUTPUT(12) | S3C64XX_GPN_OUTPUT(13) | \
82 S3C64XX_GPN_OUTPUT(14) | S3C64XX_GPN_OUTPUT(15))
83 str r0, [ r3, #S3C64XX_GPNCON ]
85 ldr r0, [ r3, #S3C64XX_GPNDAT ]
86 bic r0, r0, #0xf << 12 @ GPN12..15
87 orr r0, r0, #1 << 15 @ GPN15
88 str r0, [ r3, #S3C64XX_GPNDAT ]