1 /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
3 * Copyright (C) 2006 by OpenMoko, Inc.
4 * Author: Harald Welte <laforge@openmoko.org>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <linux/kernel.h>
25 #include <linux/types.h>
26 #include <linux/interrupt.h>
27 #include <linux/list.h>
28 #include <linux/timer.h>
29 #include <linux/init.h>
30 #include <linux/gpio.h>
31 #include <linux/sysdev.h>
32 #include <linux/platform_device.h>
33 #include <linux/serial_core.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/spi_gpio.h>
37 #include <linux/mtd/mtd.h>
38 #include <linux/mtd/nand.h>
39 #include <linux/mtd/nand_ecc.h>
40 #include <linux/mtd/partitions.h>
42 #include <asm/mach/arch.h>
43 #include <asm/mach/map.h>
44 #include <asm/mach/irq.h>
46 #include <mach/hardware.h>
48 #include <asm/mach-types.h>
50 #include <mach/regs-gpio.h>
51 #include <mach/leds-gpio.h>
52 #include <plat/regs-serial.h>
54 #include <plat/nand.h>
58 #include <plat/common-smdk.h>
59 #include <plat/gpio-cfg.h>
60 #include <plat/devs.h>
64 static struct map_desc qt2410_iodesc[] __initdata = {
65 { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
68 #define UCON S3C2410_UCON_DEFAULT
69 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
70 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
72 static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
98 static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
100 /* Configuration for 640x480 SHARP LQ080V3DG01 */
101 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
102 S3C2410_LCDCON5_INVVLINE |
103 S3C2410_LCDCON5_INVVFRAME |
104 S3C2410_LCDCON5_PWREN |
105 S3C2410_LCDCON5_HWSWP,
107 .type = S3C2410_LCDCON1_TFT,
111 .pixclock = 40000, /* HCLK/4 */
123 /* Configuration for 480x640 toppoly TD028TTEC1 */
124 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
125 S3C2410_LCDCON5_INVVLINE |
126 S3C2410_LCDCON5_INVVFRAME |
127 S3C2410_LCDCON5_PWREN |
128 S3C2410_LCDCON5_HWSWP,
130 .type = S3C2410_LCDCON1_TFT,
133 .pixclock = 40000, /* HCLK/4 */
145 /* Config for 240x320 LCD */
146 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
147 S3C2410_LCDCON5_INVVLINE |
148 S3C2410_LCDCON5_INVVFRAME |
149 S3C2410_LCDCON5_PWREN |
150 S3C2410_LCDCON5_HWSWP,
152 .type = S3C2410_LCDCON1_TFT,
155 .pixclock = 100000, /* HCLK/10 */
169 static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {
170 .displays = qt2410_lcd_cfg,
171 .num_displays = ARRAY_SIZE(qt2410_lcd_cfg),
172 .default_display = 0,
174 .lpcsel = ((0xCE6) & ~7) | 1<<4,
179 static struct resource qt2410_cs89x0_resources[] = {
182 .end = 0x19000000 + 16,
183 .flags = IORESOURCE_MEM,
188 .flags = IORESOURCE_IRQ,
192 static struct platform_device qt2410_cs89x0 = {
193 .name = "cirrus-cs89x0",
194 .num_resources = ARRAY_SIZE(qt2410_cs89x0_resources),
195 .resource = qt2410_cs89x0_resources,
200 static struct s3c24xx_led_platdata qt2410_pdata_led = {
201 .gpio = S3C2410_GPB(0),
202 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
204 .def_trigger = "timer",
207 static struct platform_device qt2410_led = {
208 .name = "s3c24xx_led",
211 .platform_data = &qt2410_pdata_led,
217 static struct spi_gpio_platform_data spi_gpio_cfg = {
218 .sck = S3C2410_GPG(7),
219 .mosi = S3C2410_GPG(6),
220 .miso = S3C2410_GPG(5),
223 static struct platform_device qt2410_spi = {
226 .dev.platform_data = &spi_gpio_cfg,
231 static struct platform_device *qt2410_devices[] __initdata = {
238 &s3c_device_usbgadget,
244 static struct mtd_partition __initdata qt2410_nand_part[] = {
251 .name = "U-Boot environment",
272 static struct s3c2410_nand_set __initdata qt2410_nand_sets[] = {
276 .nr_partitions = ARRAY_SIZE(qt2410_nand_part),
277 .partitions = qt2410_nand_part,
281 /* choose a set of timings which should suit most 512Mbit
285 static struct s3c2410_platform_nand __initdata qt2410_nand_info = {
289 .nr_sets = ARRAY_SIZE(qt2410_nand_sets),
290 .sets = qt2410_nand_sets,
295 static struct s3c2410_udc_mach_info qt2410_udc_cfg = {
298 static char tft_type = 's';
300 static int __init qt2410_tft_setup(char *str)
306 __setup("tft=", qt2410_tft_setup);
308 static void __init qt2410_map_io(void)
310 s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
311 s3c24xx_init_clocks(12*1000*1000);
312 s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
315 static void __init qt2410_machine_init(void)
317 s3c_nand_set_platdata(&qt2410_nand_info);
320 case 'p': /* production */
321 qt2410_fb_info.default_display = 1;
324 qt2410_fb_info.default_display = 0;
326 case 's': /* small */
328 qt2410_fb_info.default_display = 2;
331 s3c24xx_fb_set_platdata(&qt2410_fb_info);
333 s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPIO_OUTPUT);
334 s3c2410_gpio_setpin(S3C2410_GPB(0), 1);
336 s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
337 s3c_i2c0_set_platdata(NULL);
339 WARN_ON(gpio_request(S3C2410_GPB(5), "spi cs"));
340 gpio_direction_output(S3C2410_GPB(5), 1);
342 platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
346 MACHINE_START(QT2410, "QT2410")
347 .boot_params = S3C2410_SDRAM_PA + 0x100,
348 .map_io = qt2410_map_io,
349 .init_irq = s3c24xx_init_irq,
350 .init_machine = qt2410_machine_init,
351 .timer = &s3c24xx_timer,