1 /* arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
3 * Copyright (c) 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
7 * S3C2410 - GPIO bank numbering
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #ifndef __MACH_GPIONRS_H
15 #define __MACH_GPIONRS_H
17 #define S3C2410_GPIONO(bank,offset) ((bank) + (offset))
19 #define S3C2410_GPIO_BANKG (32*6)
20 #define S3C2410_GPIO_BANKH (32*7)
23 #define S3C2410_GPIO_A_NR (32)
24 #define S3C2410_GPIO_B_NR (32)
25 #define S3C2410_GPIO_C_NR (32)
26 #define S3C2410_GPIO_D_NR (32)
27 #define S3C2410_GPIO_E_NR (32)
28 #define S3C2410_GPIO_F_NR (32)
29 #define S3C2410_GPIO_G_NR (32)
30 #define S3C2410_GPIO_H_NR (32)
31 #define S3C2410_GPIO_J_NR (32) /* technically 16. */
32 #define S3C2410_GPIO_K_NR (32) /* technically 16. */
33 #define S3C2410_GPIO_L_NR (32) /* technically 15. */
34 #define S3C2410_GPIO_M_NR (32) /* technically 2. */
36 #if CONFIG_S3C_GPIO_SPACE != 0
37 #error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment
40 #define S3C2410_GPIO_NEXT(__gpio) \
41 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0)
45 enum s3c_gpio_number {
46 S3C2410_GPIO_A_START = 0,
47 S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A),
48 S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B),
49 S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C),
50 S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D),
51 S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
52 S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
53 S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
54 S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H),
55 S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J),
56 S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K),
57 S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L),
60 #endif /* __ASSEMBLY__ */
62 /* S3C2410 GPIO number definitions. */
64 #define S3C2410_GPA(_nr) (S3C2410_GPIO_A_START + (_nr))
65 #define S3C2410_GPB(_nr) (S3C2410_GPIO_B_START + (_nr))
66 #define S3C2410_GPC(_nr) (S3C2410_GPIO_C_START + (_nr))
67 #define S3C2410_GPD(_nr) (S3C2410_GPIO_D_START + (_nr))
68 #define S3C2410_GPE(_nr) (S3C2410_GPIO_E_START + (_nr))
69 #define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr))
70 #define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr))
71 #define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr))
72 #define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr))
73 #define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr))
74 #define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr))
75 #define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr))
77 /* compatibility until drivers can be modified */
79 #define S3C2410_GPA0 S3C2410_GPA(0)
80 #define S3C2410_GPA1 S3C2410_GPA(1)
81 #define S3C2410_GPA3 S3C2410_GPA(3)
82 #define S3C2410_GPA7 S3C2410_GPA(7)
84 #define S3C2410_GPE0 S3C2410_GPE(0)
85 #define S3C2410_GPE1 S3C2410_GPE(1)
86 #define S3C2410_GPE2 S3C2410_GPE(2)
87 #define S3C2410_GPE3 S3C2410_GPE(3)
88 #define S3C2410_GPE4 S3C2410_GPE(4)
89 #define S3C2410_GPE5 S3C2410_GPE(5)
90 #define S3C2410_GPE6 S3C2410_GPE(6)
91 #define S3C2410_GPE7 S3C2410_GPE(7)
92 #define S3C2410_GPE8 S3C2410_GPE(8)
93 #define S3C2410_GPE9 S3C2410_GPE(9)
94 #define S3C2410_GPE10 S3C2410_GPE(10)
96 #define S3C2410_GPH10 S3C2410_GPH(10)
98 #endif /* __MACH_GPIONRS_H */