2 * linux/arch/arm/mach-realview/realview_pb11mp.c
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/device.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/pl061.h>
27 #include <linux/amba/mmci.h>
28 #include <linux/amba/pl022.h>
31 #include <mach/hardware.h>
34 #include <asm/mach-types.h>
36 #include <asm/pgtable.h>
37 #include <asm/hardware/gic.h>
38 #include <asm/hardware/cache-l2x0.h>
39 #include <asm/localtimer.h>
41 #include <asm/mach/arch.h>
42 #include <asm/mach/flash.h>
43 #include <asm/mach/map.h>
44 #include <asm/mach/time.h>
46 #include <mach/board-pb11mp.h>
47 #include <mach/irqs.h>
51 static struct map_desc realview_pb11mp_io_desc[] __initdata = {
53 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
54 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
58 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
59 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE),
63 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
64 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
68 .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_CPU_BASE),
69 .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_CPU_BASE),
73 .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_DIST_BASE),
74 .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_DIST_BASE),
78 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
79 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
83 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
84 .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE),
88 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
89 .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE),
93 .virtual = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
94 .pfn = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE),
98 #ifdef CONFIG_DEBUG_LL
100 .virtual = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
101 .pfn = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE),
108 static void __init realview_pb11mp_map_io(void)
110 iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc));
113 static struct pl061_platform_data gpio0_plat_data = {
117 static struct pl061_platform_data gpio1_plat_data = {
121 static struct pl061_platform_data gpio2_plat_data = {
125 static struct pl022_ssp_controller ssp0_plat_data = {
132 * RealView PB11MPCore AMBA devices
135 #define GPIO2_IRQ { IRQ_PB11MP_GPIO2 }
136 #define GPIO3_IRQ { IRQ_PB11MP_GPIO3 }
137 #define AACI_IRQ { IRQ_TC11MP_AACI }
138 #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
139 #define KMI0_IRQ { IRQ_TC11MP_KMI0 }
140 #define KMI1_IRQ { IRQ_TC11MP_KMI1 }
141 #define PB11MP_SMC_IRQ { }
143 #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD }
144 #define DMAC_IRQ { IRQ_PB11MP_DMAC }
146 #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG }
147 #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 }
148 #define GPIO1_IRQ { IRQ_PB11MP_GPIO1 }
149 #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC }
150 #define SCI_IRQ { IRQ_PB11MP_SCI }
151 #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 }
152 #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 }
153 #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 }
154 #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 }
155 #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP }
157 /* FPGA Primecells */
158 APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
159 APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
160 APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
161 APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
162 APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL);
164 /* DevChip Primecells */
165 AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL);
166 AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
167 APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL);
168 APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data);
169 APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
170 APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
171 APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL);
172 APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
173 APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL);
174 APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL);
175 APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL);
176 APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data);
178 /* Primecells on the NEC ISSP chip */
179 AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data);
180 AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
182 static struct amba_device *amba_devs[] __initdata = {
205 * RealView PB11MPCore platform devices
207 static struct resource realview_pb11mp_flash_resource[] = {
209 .start = REALVIEW_PB11MP_FLASH0_BASE,
210 .end = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1,
211 .flags = IORESOURCE_MEM,
214 .start = REALVIEW_PB11MP_FLASH1_BASE,
215 .end = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1,
216 .flags = IORESOURCE_MEM,
220 static struct resource realview_pb11mp_smsc911x_resources[] = {
222 .start = REALVIEW_PB11MP_ETH_BASE,
223 .end = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1,
224 .flags = IORESOURCE_MEM,
227 .start = IRQ_TC11MP_ETH,
228 .end = IRQ_TC11MP_ETH,
229 .flags = IORESOURCE_IRQ,
233 static struct resource realview_pb11mp_isp1761_resources[] = {
235 .start = REALVIEW_PB11MP_USB_BASE,
236 .end = REALVIEW_PB11MP_USB_BASE + SZ_128K - 1,
237 .flags = IORESOURCE_MEM,
240 .start = IRQ_TC11MP_USB,
241 .end = IRQ_TC11MP_USB,
242 .flags = IORESOURCE_IRQ,
246 static struct resource pmu_resources[] = {
248 .start = IRQ_TC11MP_PMU_CPU0,
249 .end = IRQ_TC11MP_PMU_CPU0,
250 .flags = IORESOURCE_IRQ,
253 .start = IRQ_TC11MP_PMU_CPU1,
254 .end = IRQ_TC11MP_PMU_CPU1,
255 .flags = IORESOURCE_IRQ,
258 .start = IRQ_TC11MP_PMU_CPU2,
259 .end = IRQ_TC11MP_PMU_CPU2,
260 .flags = IORESOURCE_IRQ,
263 .start = IRQ_TC11MP_PMU_CPU3,
264 .end = IRQ_TC11MP_PMU_CPU3,
265 .flags = IORESOURCE_IRQ,
269 static struct platform_device pmu_device = {
271 .id = ARM_PMU_DEVICE_CPU,
272 .num_resources = ARRAY_SIZE(pmu_resources),
273 .resource = pmu_resources,
276 static void __init gic_init_irq(void)
278 unsigned int pldctrl;
280 /* new irq mode with no DCC */
281 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
282 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
284 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
285 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
287 /* ARM11MPCore test chip GIC, primary */
288 gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE),
289 __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
291 /* board GIC, secondary */
292 gic_init(1, IRQ_PB11MP_GIC_START,
293 __io_address(REALVIEW_PB11MP_GIC_DIST_BASE),
294 __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
295 gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
298 static void __init realview_pb11mp_timer_init(void)
300 timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
301 timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20;
302 timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
303 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
305 #ifdef CONFIG_LOCAL_TIMERS
306 twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
308 realview_timer_init(IRQ_TC11MP_TIMER0_1);
311 static struct sys_timer realview_pb11mp_timer = {
312 .init = realview_pb11mp_timer_init,
315 static void realview_pb11mp_restart(char mode, const char *cmd)
317 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
318 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
321 * To reset, we hit the on-board reset register
324 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
325 __raw_writel(0x0000, reset_ctrl);
326 __raw_writel(0x0004, reset_ctrl);
330 static void __init realview_pb11mp_init(void)
334 #ifdef CONFIG_CACHE_L2X0
335 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
336 * Bits: .... ...0 0111 1001 0000 .... .... .... */
337 l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
340 realview_flash_register(realview_pb11mp_flash_resource,
341 ARRAY_SIZE(realview_pb11mp_flash_resource));
342 realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
343 platform_device_register(&realview_i2c_device);
344 platform_device_register(&realview_cf_device);
345 realview_usb_register(realview_pb11mp_isp1761_resources);
346 platform_device_register(&pmu_device);
348 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
349 struct amba_device *d = amba_devs[i];
350 amba_device_register(d, &iomem_resource);
354 leds_event = realview_leds_event;
358 MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
359 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
360 .atag_offset = 0x100,
361 .fixup = realview_fixup,
362 .map_io = realview_pb11mp_map_io,
363 .init_early = realview_init_early,
364 .init_irq = gic_init_irq,
365 .timer = &realview_pb11mp_timer,
366 .handle_irq = gic_handle_irq,
367 .init_machine = realview_pb11mp_init,
368 #ifdef CONFIG_ZONE_DMA
369 .dma_zone_size = SZ_256M,
371 .restart = realview_pb11mp_restart,