2 * linux/arch/arm/mach-realview/platsmp.c
4 * Copyright (C) 2002 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/init.h>
12 #include <linux/errno.h>
13 #include <linux/delay.h>
14 #include <linux/device.h>
15 #include <linux/jiffies.h>
16 #include <linux/smp.h>
19 #include <asm/cacheflush.h>
20 #include <mach/hardware.h>
21 #include <asm/mach-types.h>
22 #include <asm/localtimer.h>
23 #include <asm/unified.h>
25 #include <mach/board-eb.h>
26 #include <mach/board-pb11mp.h>
27 #include <mach/board-pbx.h>
28 #include <asm/smp_scu.h>
32 extern void realview_secondary_startup(void);
35 * control for which core is the next to come out of the secondary
38 volatile int __cpuinitdata pen_release = -1;
40 static void __iomem *scu_base_addr(void)
42 if (machine_is_realview_eb_mp())
43 return __io_address(REALVIEW_EB11MP_SCU_BASE);
44 else if (machine_is_realview_pb11mp())
45 return __io_address(REALVIEW_TC11MP_SCU_BASE);
46 else if (machine_is_realview_pbx() &&
47 (core_tile_pbx11mp() || core_tile_pbxa9mp()))
48 return __io_address(REALVIEW_PBX_TILE_SCU_BASE);
50 return (void __iomem *)0;
53 static DEFINE_SPINLOCK(boot_lock);
55 void __cpuinit platform_secondary_init(unsigned int cpu)
60 * if any interrupts are already enabled for the primary
61 * core (e.g. timer irq), then they will not have been enabled
64 gic_cpu_init(0, gic_cpu_base_addr);
67 * let the primary processor know we're out of the
68 * pen, then head off into the C entry point
74 * Synchronise with the boot thread.
76 spin_lock(&boot_lock);
77 spin_unlock(&boot_lock);
80 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
82 unsigned long timeout;
85 * set synchronisation state between this boot processor
86 * and the secondary one
88 spin_lock(&boot_lock);
91 * The secondary processor is waiting to be released from
92 * the holding pen - release it, then wait for it to flag
93 * that it has been released by resetting pen_release.
95 * Note that "pen_release" is the hardware CPU ID, whereas
96 * "cpu" is Linux's internal ID.
104 * This is a later addition to the booting protocol: the
105 * bootMonitor now puts secondary cores into WFI, so
106 * poke_milo() no longer gets the cores moving; we need
107 * to send a soft interrupt to wake the secondary core.
108 * Use smp_cross_call() for this, since there's little
109 * point duplicating the code here
111 smp_cross_call(cpumask_of(cpu), 1);
113 timeout = jiffies + (1 * HZ);
114 while (time_before(jiffies, timeout)) {
116 if (pen_release == -1)
123 * now the secondary core is starting up let it run its
124 * calibrations, then wait for it to finish
126 spin_unlock(&boot_lock);
128 return pen_release != -1 ? -ENOSYS : 0;
131 static void __init poke_milo(void)
133 /* nobody is to be released from the pen yet */
137 * Write the address of secondary startup into the system-wide flags
138 * register. The BootMonitor waits for this register to become
141 __raw_writel(BSYM(virt_to_phys(realview_secondary_startup)),
142 __io_address(REALVIEW_SYS_FLAGSSET));
148 * Initialise the CPU possible map early - this describes the CPUs
149 * which may be present or become present in the system.
151 void __init smp_init_cpus(void)
153 void __iomem *scu_base = scu_base_addr();
154 unsigned int i, ncores;
156 ncores = scu_base ? scu_get_core_count(scu_base) : 1;
159 if (ncores > NR_CPUS) {
161 "Realview: no. of cores (%d) greater than configured "
162 "maximum of %d - clipping\n",
167 for (i = 0; i < ncores; i++)
168 set_cpu_possible(i, true);
171 void __init smp_prepare_cpus(unsigned int max_cpus)
173 unsigned int ncores = num_possible_cpus();
174 unsigned int cpu = smp_processor_id();
177 smp_store_cpu_info(cpu);
180 * are we trying to boot more cores than exist?
182 if (max_cpus > ncores)
186 * Initialise the present map, which describes the set of CPUs
187 * actually populated at the present time.
189 for (i = 0; i < max_cpus; i++)
190 set_cpu_present(i, true);
193 * Initialise the SCU if there are more than one CPU and let
194 * them know where to start. Note that, on modern versions of
195 * MILO, the "poke" doesn't actually do anything until each
196 * individual core is sent a soft interrupt to get it out of
201 * Enable the local timer or broadcast device for the
202 * boot CPU, but only if we have more than one CPU.
204 percpu_timer_setup();
206 scu_enable(scu_base_addr());