2 * linux/arch/arm/mach-pxa/lpd270.c
4 * Support for the LogicPD PXA270 Card Engine.
5 * Derived from the mainstone code, which carries these notices:
7 * Author: Nicolas Pitre
8 * Created: Nov 05, 2002
9 * Copyright: MontaVista Software Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/sysdev.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
23 #include <linux/ioport.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/pwm_backlight.h>
28 #include <asm/types.h>
29 #include <asm/setup.h>
30 #include <asm/memory.h>
31 #include <asm/mach-types.h>
32 #include <asm/hardware.h>
34 #include <asm/sizes.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39 #include <asm/mach/flash.h>
41 #include <asm/arch/pxa-regs.h>
42 #include <asm/arch/pxa2xx-regs.h>
43 #include <asm/arch/pxa2xx-gpio.h>
44 #include <asm/arch/lpd270.h>
45 #include <asm/arch/audio.h>
46 #include <asm/arch/pxafb.h>
47 #include <asm/arch/mmc.h>
48 #include <asm/arch/irda.h>
49 #include <asm/arch/ohci.h>
55 static unsigned int lpd270_irq_enabled;
57 static void lpd270_mask_irq(unsigned int irq)
59 int lpd270_irq = irq - LPD270_IRQ(0);
61 __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
63 lpd270_irq_enabled &= ~(1 << lpd270_irq);
64 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
67 static void lpd270_unmask_irq(unsigned int irq)
69 int lpd270_irq = irq - LPD270_IRQ(0);
71 lpd270_irq_enabled |= 1 << lpd270_irq;
72 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
75 static struct irq_chip lpd270_irq_chip = {
77 .ack = lpd270_mask_irq,
78 .mask = lpd270_mask_irq,
79 .unmask = lpd270_unmask_irq,
82 static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
84 unsigned long pending;
86 pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
88 GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
89 if (likely(pending)) {
90 irq = LPD270_IRQ(0) + __ffs(pending);
91 desc = irq_desc + irq;
92 desc_handle_irq(irq, desc);
94 pending = __raw_readw(LPD270_INT_STATUS) &
100 static void __init lpd270_init_irq(void)
106 __raw_writew(0, LPD270_INT_MASK);
107 __raw_writew(0, LPD270_INT_STATUS);
109 /* setup extra LogicPD PXA270 irqs */
110 for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
111 set_irq_chip(irq, &lpd270_irq_chip);
112 set_irq_handler(irq, handle_level_irq);
113 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
115 set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
116 set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
121 static int lpd270_irq_resume(struct sys_device *dev)
123 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
127 static struct sysdev_class lpd270_irq_sysclass = {
129 .resume = lpd270_irq_resume,
132 static struct sys_device lpd270_irq_device = {
133 .cls = &lpd270_irq_sysclass,
136 static int __init lpd270_irq_device_init(void)
138 int ret = sysdev_class_register(&lpd270_irq_sysclass);
140 ret = sysdev_register(&lpd270_irq_device);
144 device_initcall(lpd270_irq_device_init);
148 static struct resource smc91x_resources[] = {
150 .start = LPD270_ETH_PHYS,
151 .end = (LPD270_ETH_PHYS + 0xfffff),
152 .flags = IORESOURCE_MEM,
155 .start = LPD270_ETHERNET_IRQ,
156 .end = LPD270_ETHERNET_IRQ,
157 .flags = IORESOURCE_IRQ,
161 static struct platform_device smc91x_device = {
164 .num_resources = ARRAY_SIZE(smc91x_resources),
165 .resource = smc91x_resources,
168 static struct platform_device lpd270_audio_device = {
169 .name = "pxa2xx-ac97",
173 static struct resource lpd270_flash_resources[] = {
175 .start = PXA_CS0_PHYS,
176 .end = PXA_CS0_PHYS + SZ_64M - 1,
177 .flags = IORESOURCE_MEM,
180 .start = PXA_CS1_PHYS,
181 .end = PXA_CS1_PHYS + SZ_64M - 1,
182 .flags = IORESOURCE_MEM,
186 static struct mtd_partition lpd270_flash0_partitions[] = {
188 .name = "Bootloader",
191 .mask_flags = MTD_WRITEABLE /* force read-only */
195 .offset = 0x00040000,
197 .name = "Filesystem",
198 .size = MTDPART_SIZ_FULL,
203 static struct flash_platform_data lpd270_flash_data[2] = {
205 .name = "processor-flash",
206 .map_name = "cfi_probe",
207 .parts = lpd270_flash0_partitions,
208 .nr_parts = ARRAY_SIZE(lpd270_flash0_partitions),
210 .name = "mainboard-flash",
211 .map_name = "cfi_probe",
217 static struct platform_device lpd270_flash_device[2] = {
219 .name = "pxa2xx-flash",
222 .platform_data = &lpd270_flash_data[0],
224 .resource = &lpd270_flash_resources[0],
227 .name = "pxa2xx-flash",
230 .platform_data = &lpd270_flash_data[1],
232 .resource = &lpd270_flash_resources[1],
237 static struct platform_pwm_backlight_data lpd270_backlight_data = {
241 .pwm_period_ns = 78770,
244 static struct platform_device lpd270_backlight_device = {
245 .name = "pwm-backlight",
247 .parent = &pxa27x_device_pwm0.dev,
248 .platform_data = &lpd270_backlight_data,
252 /* 5.7" TFT QVGA (LoLo display number 1) */
253 static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
260 .right_margin = 0x0a,
262 .upper_margin = 0x08,
263 .lower_margin = 0x14,
264 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
267 static struct pxafb_mach_info sharp_lq057q3dc02 = {
268 .modes = &sharp_lq057q3dc02_mode,
274 /* 12.1" TFT SVGA (LoLo display number 2) */
275 static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
282 .right_margin = 0x05,
284 .upper_margin = 0x14,
285 .lower_margin = 0x0a,
286 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
289 static struct pxafb_mach_info sharp_lq121s1dg31 = {
290 .modes = &sharp_lq121s1dg31_mode,
296 /* 3.6" TFT QVGA (LoLo display number 3) */
297 static struct pxafb_mode_info sharp_lq036q1da01_mode = {
304 .right_margin = 0x0a,
306 .upper_margin = 0x03,
307 .lower_margin = 0x03,
308 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
311 static struct pxafb_mach_info sharp_lq036q1da01 = {
312 .modes = &sharp_lq036q1da01_mode,
318 /* 6.4" TFT VGA (LoLo display number 5) */
319 static struct pxafb_mode_info sharp_lq64d343_mode = {
326 .right_margin = 0x19,
328 .upper_margin = 0x22,
329 .lower_margin = 0x00,
330 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
333 static struct pxafb_mach_info sharp_lq64d343 = {
334 .modes = &sharp_lq64d343_mode,
340 /* 10.4" TFT VGA (LoLo display number 7) */
341 static struct pxafb_mode_info sharp_lq10d368_mode = {
348 .right_margin = 0x19,
350 .upper_margin = 0x22,
351 .lower_margin = 0x00,
352 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
355 static struct pxafb_mach_info sharp_lq10d368 = {
356 .modes = &sharp_lq10d368_mode,
362 /* 3.5" TFT QVGA (LoLo display number 8) */
363 static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
370 .right_margin = 0x0a,
372 .upper_margin = 0x05,
373 .lower_margin = 0x14,
374 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
377 static struct pxafb_mach_info sharp_lq035q7db02_20 = {
378 .modes = &sharp_lq035q7db02_20_mode,
384 static struct pxafb_mach_info *lpd270_lcd_to_use;
386 static int __init lpd270_set_lcd(char *str)
388 if (!strnicmp(str, "lq057q3dc02", 11)) {
389 lpd270_lcd_to_use = &sharp_lq057q3dc02;
390 } else if (!strnicmp(str, "lq121s1dg31", 11)) {
391 lpd270_lcd_to_use = &sharp_lq121s1dg31;
392 } else if (!strnicmp(str, "lq036q1da01", 11)) {
393 lpd270_lcd_to_use = &sharp_lq036q1da01;
394 } else if (!strnicmp(str, "lq64d343", 8)) {
395 lpd270_lcd_to_use = &sharp_lq64d343;
396 } else if (!strnicmp(str, "lq10d368", 8)) {
397 lpd270_lcd_to_use = &sharp_lq10d368;
398 } else if (!strnicmp(str, "lq035q7db02-20", 14)) {
399 lpd270_lcd_to_use = &sharp_lq035q7db02_20;
401 printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
407 __setup("lcd=", lpd270_set_lcd);
409 static struct platform_device *platform_devices[] __initdata = {
411 &lpd270_backlight_device,
412 &lpd270_audio_device,
413 &lpd270_flash_device[0],
414 &lpd270_flash_device[1],
417 static int lpd270_ohci_init(struct device *dev)
419 /* setup Port1 GPIO pin. */
420 pxa_gpio_mode(88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
421 pxa_gpio_mode(89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
423 /* Set the Power Control Polarity Low and Power Sense
424 Polarity Low to active low. */
425 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
426 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
431 static struct pxaohci_platform_data lpd270_ohci_platform_data = {
432 .port_mode = PMM_PERPORT_MODE,
433 .init = lpd270_ohci_init,
436 static void __init lpd270_init(void)
438 lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
439 lpd270_flash_data[1].width = 4;
442 * System bus arbiter setting:
444 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
446 ARB_CNTRL = ARB_CORE_PARK | 0x234;
449 * On LogicPD PXA270, we route AC97_SYSCLK via GPIO45.
451 pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
452 pxa_gpio_mode(GPIO16_PWM0_MD);
454 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
456 if (lpd270_lcd_to_use != NULL)
457 set_pxa_fb_info(lpd270_lcd_to_use);
459 pxa_set_ohci_info(&lpd270_ohci_platform_data);
463 static struct map_desc lpd270_io_desc[] __initdata = {
465 .virtual = LPD270_CPLD_VIRT,
466 .pfn = __phys_to_pfn(LPD270_CPLD_PHYS),
467 .length = LPD270_CPLD_SIZE,
472 static void __init lpd270_map_io(void)
475 iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
477 /* initialize sleep mode regs (wake-up sources, etc) */
486 /* for use I SRAM as framebuffer. */
491 MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
492 /* Maintainer: Peter Barada */
493 .phys_io = 0x40000000,
494 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
495 .boot_params = 0xa0000100,
496 .map_io = lpd270_map_io,
497 .init_irq = lpd270_init_irq,
499 .init_machine = lpd270_init,