2 * Hardware specific definitions for SL-Cx000 series of PDAs
4 * Copyright (c) 2005 Alexander Wykes
5 * Copyright (c) 2005 Richard Purdie
7 * Based on Sharp's 2.4 kernel patches
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #ifndef __ASM_ARCH_SPITZ_H
15 #define __ASM_ARCH_SPITZ_H 1
19 #include <linux/gpio.h>
21 /* Spitz/Akita GPIOs */
23 #define SPITZ_GPIO_KEY_INT (0) /* Key Interrupt */
24 #define SPITZ_GPIO_RESET (1)
25 #define SPITZ_GPIO_nSD_DETECT (9)
26 #define SPITZ_GPIO_TP_INT (11) /* Touch Panel interrupt */
27 #define SPITZ_GPIO_AK_INT (13) /* Remote Control */
28 #define SPITZ_GPIO_ADS7846_CS (14)
29 #define SPITZ_GPIO_SYNC (16)
30 #define SPITZ_GPIO_MAX1111_CS (20)
31 #define SPITZ_GPIO_FATAL_BAT (21)
32 #define SPITZ_GPIO_HSYNC (22)
33 #define SPITZ_GPIO_nSD_CLK (32)
34 #define SPITZ_GPIO_USB_DEVICE (35)
35 #define SPITZ_GPIO_USB_HOST (37)
36 #define SPITZ_GPIO_USB_CONNECT (41)
37 #define SPITZ_GPIO_LCDCON_CS (53)
38 #define SPITZ_GPIO_nPCE (54)
39 #define SPITZ_GPIO_nSD_WP (81)
40 #define SPITZ_GPIO_ON_RESET (89)
41 #define SPITZ_GPIO_BAT_COVER (90)
42 #define SPITZ_GPIO_CF_CD (94)
43 #define SPITZ_GPIO_ON_KEY (95)
44 #define SPITZ_GPIO_SWA (97)
45 #define SPITZ_GPIO_SWB (96)
46 #define SPITZ_GPIO_CHRG_FULL (101)
47 #define SPITZ_GPIO_CO (101)
48 #define SPITZ_GPIO_CF_IRQ (105)
49 #define SPITZ_GPIO_AC_IN (115)
50 #define SPITZ_GPIO_HP_IN (116)
52 /* Spitz Only GPIOs */
54 #define SPITZ_GPIO_CF2_IRQ (106) /* CF slot1 Ready */
55 #define SPITZ_GPIO_CF2_CD (93)
58 /* Spitz/Akita Keyboard Definitions */
60 #define SPITZ_KEY_STROBE_NUM (11)
61 #define SPITZ_KEY_SENSE_NUM (7)
62 #define SPITZ_GPIO_G0_STROBE_BIT 0x0f800000
63 #define SPITZ_GPIO_G1_STROBE_BIT 0x00100000
64 #define SPITZ_GPIO_G2_STROBE_BIT 0x01000000
65 #define SPITZ_GPIO_G3_STROBE_BIT 0x00041880
66 #define SPITZ_GPIO_G0_SENSE_BIT 0x00021000
67 #define SPITZ_GPIO_G1_SENSE_BIT 0x000000d4
68 #define SPITZ_GPIO_G2_SENSE_BIT 0x08000000
69 #define SPITZ_GPIO_G3_SENSE_BIT 0x00000000
71 #define SPITZ_GPIO_KEY_STROBE0 88
72 #define SPITZ_GPIO_KEY_STROBE1 23
73 #define SPITZ_GPIO_KEY_STROBE2 24
74 #define SPITZ_GPIO_KEY_STROBE3 25
75 #define SPITZ_GPIO_KEY_STROBE4 26
76 #define SPITZ_GPIO_KEY_STROBE5 27
77 #define SPITZ_GPIO_KEY_STROBE6 52
78 #define SPITZ_GPIO_KEY_STROBE7 103
79 #define SPITZ_GPIO_KEY_STROBE8 107
80 #define SPITZ_GPIO_KEY_STROBE9 108
81 #define SPITZ_GPIO_KEY_STROBE10 114
83 #define SPITZ_GPIO_KEY_SENSE0 12
84 #define SPITZ_GPIO_KEY_SENSE1 17
85 #define SPITZ_GPIO_KEY_SENSE2 91
86 #define SPITZ_GPIO_KEY_SENSE3 34
87 #define SPITZ_GPIO_KEY_SENSE4 36
88 #define SPITZ_GPIO_KEY_SENSE5 38
89 #define SPITZ_GPIO_KEY_SENSE6 39
92 /* Spitz Scoop Device (No. 1) GPIOs */
93 /* Suspend States in comments */
94 #define SPITZ_SCP_LED_GREEN SCOOP_GPCR_PA11 /* Keep */
95 #define SPITZ_SCP_JK_B SCOOP_GPCR_PA12 /* Keep */
96 #define SPITZ_SCP_CHRG_ON SCOOP_GPCR_PA13 /* Keep */
97 #define SPITZ_SCP_MUTE_L SCOOP_GPCR_PA14 /* Low */
98 #define SPITZ_SCP_MUTE_R SCOOP_GPCR_PA15 /* Low */
99 #define SPITZ_SCP_CF_POWER SCOOP_GPCR_PA16 /* Keep */
100 #define SPITZ_SCP_LED_ORANGE SCOOP_GPCR_PA17 /* Keep */
101 #define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */
102 #define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */
104 #define SPITZ_SCP_IO_DIR (SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \
105 SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | \
106 SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
107 #define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R)
108 #define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
109 #define SPITZ_SCP_SUS_SET 0
111 #define SPITZ_SCP_GPIO_BASE (NR_BUILTIN_GPIO)
112 #define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0)
113 #define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1)
114 #define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2)
115 #define SPITZ_GPIO_MUTE_L (SPITZ_SCP_GPIO_BASE + 3)
116 #define SPITZ_GPIO_MUTE_R (SPITZ_SCP_GPIO_BASE + 4)
117 #define SPITZ_GPIO_CF_POWER (SPITZ_SCP_GPIO_BASE + 5)
118 #define SPITZ_GPIO_LED_ORANGE (SPITZ_SCP_GPIO_BASE + 6)
119 #define SPITZ_GPIO_JK_A (SPITZ_SCP_GPIO_BASE + 7)
120 #define SPITZ_GPIO_ADC_TEMP_ON (SPITZ_SCP_GPIO_BASE + 8)
122 /* Spitz Scoop Device (No. 2) GPIOs */
123 /* Suspend States in comments */
124 #define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */
125 #define SPITZ_SCP2_AKIN_PULLUP SCOOP_GPCR_PA12 /* Keep */
126 #define SPITZ_SCP2_RESERVED_1 SCOOP_GPCR_PA13 /* High */
127 #define SPITZ_SCP2_RESERVED_2 SCOOP_GPCR_PA14 /* Low */
128 #define SPITZ_SCP2_RESERVED_3 SCOOP_GPCR_PA15 /* Low */
129 #define SPITZ_SCP2_RESERVED_4 SCOOP_GPCR_PA16 /* Low */
130 #define SPITZ_SCP2_BACKLIGHT_CONT SCOOP_GPCR_PA17 /* Low */
131 #define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */
132 #define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */
134 #define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \
135 SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \
136 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
138 #define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1)
139 #define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \
140 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
141 #define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1)
143 #define SPITZ_SCP2_GPIO_BASE (NR_BUILTIN_GPIO + 12)
144 #define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0)
145 #define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1)
146 #define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2)
147 #define SPITZ_GPIO_RESERVED_2 (SPITZ_SCP2_GPIO_BASE + 3)
148 #define SPITZ_GPIO_RESERVED_3 (SPITZ_SCP2_GPIO_BASE + 4)
149 #define SPITZ_GPIO_RESERVED_4 (SPITZ_SCP2_GPIO_BASE + 5)
150 #define SPITZ_GPIO_BACKLIGHT_CONT (SPITZ_SCP2_GPIO_BASE + 6)
151 #define SPITZ_GPIO_BACKLIGHT_ON (SPITZ_SCP2_GPIO_BASE + 7)
152 #define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8)
154 /* Akita IO Expander GPIOs */
155 #define AKITA_IOEXP_GPIO_BASE (NR_BUILTIN_GPIO + 12)
156 #define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0)
157 #define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1)
158 #define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2)
159 #define AKITA_GPIO_BACKLIGHT_ON (AKITA_IOEXP_GPIO_BASE + 3)
160 #define AKITA_GPIO_BACKLIGHT_CONT (AKITA_IOEXP_GPIO_BASE + 4)
161 #define AKITA_GPIO_AKIN_PULLUP (AKITA_IOEXP_GPIO_BASE + 5)
162 #define AKITA_GPIO_IR_ON (AKITA_IOEXP_GPIO_BASE + 6)
163 #define AKITA_GPIO_RESERVED_7 (AKITA_IOEXP_GPIO_BASE + 7)
165 /* Spitz IRQ Definitions */
167 #define SPITZ_IRQ_GPIO_KEY_INT IRQ_GPIO(SPITZ_GPIO_KEY_INT)
168 #define SPITZ_IRQ_GPIO_AC_IN IRQ_GPIO(SPITZ_GPIO_AC_IN)
169 #define SPITZ_IRQ_GPIO_AK_INT IRQ_GPIO(SPITZ_GPIO_AK_INT)
170 #define SPITZ_IRQ_GPIO_HP_IN IRQ_GPIO(SPITZ_GPIO_HP_IN)
171 #define SPITZ_IRQ_GPIO_TP_INT IRQ_GPIO(SPITZ_GPIO_TP_INT)
172 #define SPITZ_IRQ_GPIO_SYNC IRQ_GPIO(SPITZ_GPIO_SYNC)
173 #define SPITZ_IRQ_GPIO_ON_KEY IRQ_GPIO(SPITZ_GPIO_ON_KEY)
174 #define SPITZ_IRQ_GPIO_SWA IRQ_GPIO(SPITZ_GPIO_SWA)
175 #define SPITZ_IRQ_GPIO_SWB IRQ_GPIO(SPITZ_GPIO_SWB)
176 #define SPITZ_IRQ_GPIO_BAT_COVER IRQ_GPIO(SPITZ_GPIO_BAT_COVER)
177 #define SPITZ_IRQ_GPIO_FATAL_BAT IRQ_GPIO(SPITZ_GPIO_FATAL_BAT)
178 #define SPITZ_IRQ_GPIO_CO IRQ_GPIO(SPITZ_GPIO_CO)
179 #define SPITZ_IRQ_GPIO_CF_IRQ IRQ_GPIO(SPITZ_GPIO_CF_IRQ)
180 #define SPITZ_IRQ_GPIO_CF_CD IRQ_GPIO(SPITZ_GPIO_CF_CD)
181 #define SPITZ_IRQ_GPIO_CF2_IRQ IRQ_GPIO(SPITZ_GPIO_CF2_IRQ)
182 #define SPITZ_IRQ_GPIO_nSD_INT IRQ_GPIO(SPITZ_GPIO_nSD_INT)
183 #define SPITZ_IRQ_GPIO_nSD_DETECT IRQ_GPIO(SPITZ_GPIO_nSD_DETECT)
186 * Shared data structures
188 extern struct platform_device spitzscoop_device;
189 extern struct platform_device spitzscoop2_device;
190 extern struct sharpsl_charger_machinfo spitz_pm_machinfo;