2 * l2 cache initialization for CSR SiRFprimaII
4 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 #include <linux/init.h>
10 #include <linux/kernel.h>
12 #include <linux/errno.h>
14 #include <linux/of_address.h>
15 #include <asm/hardware/cache-l2x0.h>
17 #define L2X0_ADDR_FILTERING_START 0xC00
18 #define L2X0_ADDR_FILTERING_END 0xC04
20 static struct of_device_id l2x_ids[] = {
21 { .compatible = "arm,pl310-cache" },
24 static int __init sirfsoc_of_l2x_init(void)
26 struct device_node *np;
27 void __iomem *sirfsoc_l2x_base;
29 np = of_find_matching_node(NULL, l2x_ids);
31 panic("unable to find compatible l2x node in dtb\n");
33 sirfsoc_l2x_base = of_iomap(np, 0);
34 if (!sirfsoc_l2x_base)
35 panic("unable to map l2x cpu registers\n");
39 if (!(readl_relaxed(sirfsoc_l2x_base + L2X0_CTRL) & 1)) {
41 * set the physical memory windows L2 cache will cover
43 writel_relaxed(PHYS_OFFSET + 1024 * 1024 * 1024,
44 sirfsoc_l2x_base + L2X0_ADDR_FILTERING_END);
45 writel_relaxed(PHYS_OFFSET | 0x1,
46 sirfsoc_l2x_base + L2X0_ADDR_FILTERING_START);
49 sirfsoc_l2x_base + L2X0_TAG_LATENCY_CTRL);
51 sirfsoc_l2x_base + L2X0_DATA_LATENCY_CTRL);
53 l2x0_init((void __iomem *)sirfsoc_l2x_base, 0x00040000,
58 early_initcall(sirfsoc_of_l2x_init);