2 * arch/arm/mach-orion5x/common.c
4 * Core functions for Marvell Orion 5x SoCs
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/serial_8250.h>
17 #include <linux/mbus.h>
18 #include <linux/mv643xx_eth.h>
19 #include <linux/mv643xx_i2c.h>
20 #include <linux/ata_platform.h>
21 #include <linux/spi/orion_spi.h>
24 #include <asm/setup.h>
25 #include <asm/timex.h>
26 #include <asm/mach/arch.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/time.h>
29 #include <mach/hardware.h>
30 #include <mach/orion5x.h>
31 #include <plat/ehci-orion.h>
32 #include <plat/mv_xor.h>
33 #include <plat/orion_nand.h>
34 #include <plat/time.h>
37 /*****************************************************************************
39 ****************************************************************************/
40 static struct map_desc orion5x_io_desc[] __initdata = {
42 .virtual = ORION5X_REGS_VIRT_BASE,
43 .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
44 .length = ORION5X_REGS_SIZE,
47 .virtual = ORION5X_PCIE_IO_VIRT_BASE,
48 .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
49 .length = ORION5X_PCIE_IO_SIZE,
52 .virtual = ORION5X_PCI_IO_VIRT_BASE,
53 .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
54 .length = ORION5X_PCI_IO_SIZE,
57 .virtual = ORION5X_PCIE_WA_VIRT_BASE,
58 .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
59 .length = ORION5X_PCIE_WA_SIZE,
64 void __init orion5x_map_io(void)
66 iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
70 /*****************************************************************************
72 ****************************************************************************/
73 static struct orion_ehci_data orion5x_ehci_data = {
74 .dram = &orion5x_mbus_dram_info,
77 static u64 ehci_dmamask = 0xffffffffUL;
80 /*****************************************************************************
82 ****************************************************************************/
83 static struct resource orion5x_ehci0_resources[] = {
85 .start = ORION5X_USB0_PHYS_BASE,
86 .end = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
87 .flags = IORESOURCE_MEM,
89 .start = IRQ_ORION5X_USB0_CTRL,
90 .end = IRQ_ORION5X_USB0_CTRL,
91 .flags = IORESOURCE_IRQ,
95 static struct platform_device orion5x_ehci0 = {
99 .dma_mask = &ehci_dmamask,
100 .coherent_dma_mask = 0xffffffff,
101 .platform_data = &orion5x_ehci_data,
103 .resource = orion5x_ehci0_resources,
104 .num_resources = ARRAY_SIZE(orion5x_ehci0_resources),
107 void __init orion5x_ehci0_init(void)
109 platform_device_register(&orion5x_ehci0);
113 /*****************************************************************************
115 ****************************************************************************/
116 static struct resource orion5x_ehci1_resources[] = {
118 .start = ORION5X_USB1_PHYS_BASE,
119 .end = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
120 .flags = IORESOURCE_MEM,
122 .start = IRQ_ORION5X_USB1_CTRL,
123 .end = IRQ_ORION5X_USB1_CTRL,
124 .flags = IORESOURCE_IRQ,
128 static struct platform_device orion5x_ehci1 = {
129 .name = "orion-ehci",
132 .dma_mask = &ehci_dmamask,
133 .coherent_dma_mask = 0xffffffff,
134 .platform_data = &orion5x_ehci_data,
136 .resource = orion5x_ehci1_resources,
137 .num_resources = ARRAY_SIZE(orion5x_ehci1_resources),
140 void __init orion5x_ehci1_init(void)
142 platform_device_register(&orion5x_ehci1);
146 /*****************************************************************************
148 ****************************************************************************/
149 struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
150 .dram = &orion5x_mbus_dram_info,
153 static struct resource orion5x_eth_shared_resources[] = {
155 .start = ORION5X_ETH_PHYS_BASE + 0x2000,
156 .end = ORION5X_ETH_PHYS_BASE + 0x3fff,
157 .flags = IORESOURCE_MEM,
159 .start = IRQ_ORION5X_ETH_ERR,
160 .end = IRQ_ORION5X_ETH_ERR,
161 .flags = IORESOURCE_IRQ,
165 static struct platform_device orion5x_eth_shared = {
166 .name = MV643XX_ETH_SHARED_NAME,
169 .platform_data = &orion5x_eth_shared_data,
171 .num_resources = ARRAY_SIZE(orion5x_eth_shared_resources),
172 .resource = orion5x_eth_shared_resources,
175 static struct resource orion5x_eth_resources[] = {
178 .start = IRQ_ORION5X_ETH_SUM,
179 .end = IRQ_ORION5X_ETH_SUM,
180 .flags = IORESOURCE_IRQ,
184 static struct platform_device orion5x_eth = {
185 .name = MV643XX_ETH_NAME,
188 .resource = orion5x_eth_resources,
191 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
193 eth_data->shared = &orion5x_eth_shared;
194 orion5x_eth.dev.platform_data = eth_data;
196 platform_device_register(&orion5x_eth_shared);
197 platform_device_register(&orion5x_eth);
201 /*****************************************************************************
203 ****************************************************************************/
204 static struct resource orion5x_switch_resources[] = {
208 .flags = IORESOURCE_IRQ,
212 static struct platform_device orion5x_switch_device = {
216 .resource = orion5x_switch_resources,
219 void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
222 orion5x_switch_resources[0].start = irq;
223 orion5x_switch_resources[0].end = irq;
224 orion5x_switch_device.num_resources = 1;
227 d->mii_bus = &orion5x_eth_shared.dev;
228 d->netdev = &orion5x_eth.dev;
229 orion5x_switch_device.dev.platform_data = d;
231 platform_device_register(&orion5x_switch_device);
235 /*****************************************************************************
237 ****************************************************************************/
238 static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
239 .freq_m = 8, /* assumes 166 MHz TCLK */
241 .timeout = 1000, /* Default timeout of 1 second */
244 static struct resource orion5x_i2c_resources[] = {
247 .start = I2C_PHYS_BASE,
248 .end = I2C_PHYS_BASE + 0x1f,
249 .flags = IORESOURCE_MEM,
252 .start = IRQ_ORION5X_I2C,
253 .end = IRQ_ORION5X_I2C,
254 .flags = IORESOURCE_IRQ,
258 static struct platform_device orion5x_i2c = {
259 .name = MV64XXX_I2C_CTLR_NAME,
261 .num_resources = ARRAY_SIZE(orion5x_i2c_resources),
262 .resource = orion5x_i2c_resources,
264 .platform_data = &orion5x_i2c_pdata,
268 void __init orion5x_i2c_init(void)
270 platform_device_register(&orion5x_i2c);
274 /*****************************************************************************
276 ****************************************************************************/
277 static struct resource orion5x_sata_resources[] = {
280 .start = ORION5X_SATA_PHYS_BASE,
281 .end = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
282 .flags = IORESOURCE_MEM,
285 .start = IRQ_ORION5X_SATA,
286 .end = IRQ_ORION5X_SATA,
287 .flags = IORESOURCE_IRQ,
291 static struct platform_device orion5x_sata = {
295 .coherent_dma_mask = 0xffffffff,
297 .num_resources = ARRAY_SIZE(orion5x_sata_resources),
298 .resource = orion5x_sata_resources,
301 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
303 sata_data->dram = &orion5x_mbus_dram_info;
304 orion5x_sata.dev.platform_data = sata_data;
305 platform_device_register(&orion5x_sata);
309 /*****************************************************************************
311 ****************************************************************************/
312 static struct orion_spi_info orion5x_spi_plat_data = {
314 .enable_clock_fix = 1,
317 static struct resource orion5x_spi_resources[] = {
320 .start = SPI_PHYS_BASE,
321 .end = SPI_PHYS_BASE + 0x1f,
322 .flags = IORESOURCE_MEM,
326 static struct platform_device orion5x_spi = {
330 .platform_data = &orion5x_spi_plat_data,
332 .num_resources = ARRAY_SIZE(orion5x_spi_resources),
333 .resource = orion5x_spi_resources,
336 void __init orion5x_spi_init()
338 platform_device_register(&orion5x_spi);
342 /*****************************************************************************
344 ****************************************************************************/
345 static struct plat_serial8250_port orion5x_uart0_data[] = {
347 .mapbase = UART0_PHYS_BASE,
348 .membase = (char *)UART0_VIRT_BASE,
349 .irq = IRQ_ORION5X_UART0,
350 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
358 static struct resource orion5x_uart0_resources[] = {
360 .start = UART0_PHYS_BASE,
361 .end = UART0_PHYS_BASE + 0xff,
362 .flags = IORESOURCE_MEM,
364 .start = IRQ_ORION5X_UART0,
365 .end = IRQ_ORION5X_UART0,
366 .flags = IORESOURCE_IRQ,
370 static struct platform_device orion5x_uart0 = {
371 .name = "serial8250",
372 .id = PLAT8250_DEV_PLATFORM,
374 .platform_data = orion5x_uart0_data,
376 .resource = orion5x_uart0_resources,
377 .num_resources = ARRAY_SIZE(orion5x_uart0_resources),
380 void __init orion5x_uart0_init(void)
382 platform_device_register(&orion5x_uart0);
386 /*****************************************************************************
388 ****************************************************************************/
389 static struct plat_serial8250_port orion5x_uart1_data[] = {
391 .mapbase = UART1_PHYS_BASE,
392 .membase = (char *)UART1_VIRT_BASE,
393 .irq = IRQ_ORION5X_UART1,
394 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
402 static struct resource orion5x_uart1_resources[] = {
404 .start = UART1_PHYS_BASE,
405 .end = UART1_PHYS_BASE + 0xff,
406 .flags = IORESOURCE_MEM,
408 .start = IRQ_ORION5X_UART1,
409 .end = IRQ_ORION5X_UART1,
410 .flags = IORESOURCE_IRQ,
414 static struct platform_device orion5x_uart1 = {
415 .name = "serial8250",
416 .id = PLAT8250_DEV_PLATFORM1,
418 .platform_data = orion5x_uart1_data,
420 .resource = orion5x_uart1_resources,
421 .num_resources = ARRAY_SIZE(orion5x_uart1_resources),
424 void __init orion5x_uart1_init(void)
426 platform_device_register(&orion5x_uart1);
430 /*****************************************************************************
432 ****************************************************************************/
433 static struct resource orion5x_xor_shared_resources[] = {
436 .start = ORION5X_XOR_PHYS_BASE,
437 .end = ORION5X_XOR_PHYS_BASE + 0xff,
438 .flags = IORESOURCE_MEM,
441 .start = ORION5X_XOR_PHYS_BASE + 0x200,
442 .end = ORION5X_XOR_PHYS_BASE + 0x2ff,
443 .flags = IORESOURCE_MEM,
447 static struct platform_device orion5x_xor_shared = {
448 .name = MV_XOR_SHARED_NAME,
450 .num_resources = ARRAY_SIZE(orion5x_xor_shared_resources),
451 .resource = orion5x_xor_shared_resources,
454 static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
456 static struct resource orion5x_xor0_resources[] = {
458 .start = IRQ_ORION5X_XOR0,
459 .end = IRQ_ORION5X_XOR0,
460 .flags = IORESOURCE_IRQ,
464 static struct mv_xor_platform_data orion5x_xor0_data = {
465 .shared = &orion5x_xor_shared,
467 .pool_size = PAGE_SIZE,
470 static struct platform_device orion5x_xor0_channel = {
473 .num_resources = ARRAY_SIZE(orion5x_xor0_resources),
474 .resource = orion5x_xor0_resources,
476 .dma_mask = &orion5x_xor_dmamask,
477 .coherent_dma_mask = DMA_64BIT_MASK,
478 .platform_data = (void *)&orion5x_xor0_data,
482 static struct resource orion5x_xor1_resources[] = {
484 .start = IRQ_ORION5X_XOR1,
485 .end = IRQ_ORION5X_XOR1,
486 .flags = IORESOURCE_IRQ,
490 static struct mv_xor_platform_data orion5x_xor1_data = {
491 .shared = &orion5x_xor_shared,
493 .pool_size = PAGE_SIZE,
496 static struct platform_device orion5x_xor1_channel = {
499 .num_resources = ARRAY_SIZE(orion5x_xor1_resources),
500 .resource = orion5x_xor1_resources,
502 .dma_mask = &orion5x_xor_dmamask,
503 .coherent_dma_mask = DMA_64BIT_MASK,
504 .platform_data = (void *)&orion5x_xor1_data,
508 void __init orion5x_xor_init(void)
510 platform_device_register(&orion5x_xor_shared);
513 * two engines can't do memset simultaneously, this limitation
514 * satisfied by removing memset support from one of the engines.
516 dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
517 dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
518 platform_device_register(&orion5x_xor0_channel);
520 dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
521 dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
522 dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
523 platform_device_register(&orion5x_xor1_channel);
527 /*****************************************************************************
529 ****************************************************************************/
532 int __init orion5x_find_tclk(void)
536 orion5x_pcie_id(&dev, &rev);
537 if (dev == MV88F6183_DEV_ID &&
538 (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
544 static void orion5x_timer_init(void)
546 orion5x_tclk = orion5x_find_tclk();
547 orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
550 struct sys_timer orion5x_timer = {
551 .init = orion5x_timer_init,
555 /*****************************************************************************
557 ****************************************************************************/
559 * Identify device ID and rev from PCIe configuration header space '0'.
561 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
563 orion5x_pcie_id(dev, rev);
565 if (*dev == MV88F5281_DEV_ID) {
566 if (*rev == MV88F5281_REV_D2) {
567 *dev_name = "MV88F5281-D2";
568 } else if (*rev == MV88F5281_REV_D1) {
569 *dev_name = "MV88F5281-D1";
570 } else if (*rev == MV88F5281_REV_D0) {
571 *dev_name = "MV88F5281-D0";
573 *dev_name = "MV88F5281-Rev-Unsupported";
575 } else if (*dev == MV88F5182_DEV_ID) {
576 if (*rev == MV88F5182_REV_A2) {
577 *dev_name = "MV88F5182-A2";
579 *dev_name = "MV88F5182-Rev-Unsupported";
581 } else if (*dev == MV88F5181_DEV_ID) {
582 if (*rev == MV88F5181_REV_B1) {
583 *dev_name = "MV88F5181-Rev-B1";
584 } else if (*rev == MV88F5181L_REV_A1) {
585 *dev_name = "MV88F5181L-Rev-A1";
587 *dev_name = "MV88F5181(L)-Rev-Unsupported";
589 } else if (*dev == MV88F6183_DEV_ID) {
590 if (*rev == MV88F6183_REV_B0) {
591 *dev_name = "MV88F6183-Rev-B0";
593 *dev_name = "MV88F6183-Rev-Unsupported";
596 *dev_name = "Device-Unknown";
600 void __init orion5x_init(void)
605 orion5x_id(&dev, &rev, &dev_name);
606 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
608 orion5x_eth_shared_data.t_clk = orion5x_tclk;
609 orion5x_spi_plat_data.tclk = orion5x_tclk;
610 orion5x_uart0_data[0].uartclk = orion5x_tclk;
611 orion5x_uart1_data[0].uartclk = orion5x_tclk;
614 * Setup Orion address map
616 orion5x_setup_cpu_mbus_bridge();
619 * Don't issue "Wait for Interrupt" instruction if we are
620 * running on D0 5281 silicon.
622 if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
623 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
629 * Many orion-based systems have buggy bootloader implementations.
630 * This is a common fixup for bogus memory tags.
632 void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
633 char **from, struct meminfo *meminfo)
635 for (; t->hdr.size; t = tag_next(t))
636 if (t->hdr.tag == ATAG_MEM &&
637 (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
638 t->u.mem.start & ~PAGE_MASK)) {
640 "Clearing invalid memory bank %dKB@0x%08x\n",
641 t->u.mem.size / 1024, t->u.mem.start);