2 * OMAP3/OMAP4 Voltage Management Routines
4 * Author: Thara Gopinath <thara@ti.com>
6 * Copyright (C) 2007 Texas Instruments, Inc.
7 * Rajendra Nayak <rnayak@ti.com>
8 * Lesly A M <x0080970@ti.com>
10 * Copyright (C) 2008 Nokia Corporation
13 * Copyright (C) 2010 Texas Instruments, Inc.
14 * Thara Gopinath <thara@ti.com>
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
21 #include <linux/delay.h>
23 #include <linux/clk.h>
24 #include <linux/err.h>
25 #include <linux/debugfs.h>
26 #include <linux/slab.h>
28 #include <plat/common.h>
29 #include <plat/voltage.h>
31 #include "prm-regbits-34xx.h"
32 #include "prm-regbits-44xx.h"
35 #include "prminst44xx.h"
38 #define VP_IDLE_TIMEOUT 200
39 #define VP_TRANXDONE_TIMEOUT 300
40 #define VOLTAGE_DIR_SIZE 16
42 /* Voltage processor register offsets */
52 /* Voltage Processor bit field values, shifts and masks */
57 u32 vpconfig_erroroffset;
58 u16 vpconfig_errorgain;
59 u32 vpconfig_errorgain_mask;
60 u8 vpconfig_errorgain_shift;
61 u32 vpconfig_initvoltage_mask;
62 u8 vpconfig_initvoltage_shift;
63 u32 vpconfig_timeouten;
65 u32 vpconfig_forceupdate;
66 u32 vpconfig_vpenable;
69 u16 vstepmin_smpswaittimemin;
70 u8 vstepmin_stepmin_shift;
71 u8 vstepmin_smpswaittimemin_shift;
74 u16 vstepmax_smpswaittimemax;
75 u8 vstepmax_stepmax_shift;
76 u8 vstepmax_smpswaittimemax_shift;
81 u8 vlimitto_vddmin_shift;
82 u8 vlimitto_vddmax_shift;
83 u8 vlimitto_timeout_shift;
88 /* Voltage controller registers and offsets */
92 /* VC register offsets */
121 * omap_vdd_info - Per Voltage Domain info
123 * @volt_data : voltage table having the distinct voltages supported
124 * by the domain and other associated per voltage data.
125 * @pmic_info : pmic specific parameters which should be populted by
127 * @vp_offs : structure containing the offsets for various
129 * @vp_reg : the register values, shifts, masks for various
131 * @vc_reg : structure containing various various vc registers,
133 * @voltdm : pointer to the voltage domain structure
134 * @debug_dir : debug directory for this voltage domain.
135 * @curr_volt : current voltage for this vdd.
136 * @ocp_mod : The prm module for accessing the prm irqstatus reg.
137 * @prm_irqst_reg : prm irqstatus register.
138 * @vp_enabled : flag to keep track of whether vp is enabled or not
139 * @volt_scale : API to scale the voltage of the vdd.
141 struct omap_vdd_info {
142 struct omap_volt_data *volt_data;
143 struct omap_volt_pmic_info *pmic_info;
144 struct vp_reg_offs vp_offs;
145 struct vp_reg_val vp_reg;
146 struct vc_reg_info vc_reg;
147 struct voltagedomain voltdm;
148 struct dentry *debug_dir;
153 u32 (*read_reg) (u16 mod, u8 offset);
154 void (*write_reg) (u32 val, u16 mod, u8 offset);
155 int (*volt_scale) (struct omap_vdd_info *vdd,
156 unsigned long target_volt);
159 static struct omap_vdd_info *vdd_info;
161 * Number of scalable voltage domains.
163 static int nr_scalable_vdd;
165 /* OMAP3 VDD sturctures */
166 static struct omap_vdd_info omap3_vdd_info[] = {
169 .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET,
170 .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET,
171 .vstepmax = OMAP3_PRM_VP1_VSTEPMAX_OFFSET,
172 .vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET,
173 .vstatus = OMAP3_PRM_VP1_STATUS_OFFSET,
174 .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET,
182 .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET,
183 .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET,
184 .vstepmax = OMAP3_PRM_VP2_VSTEPMAX_OFFSET,
185 .vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET,
186 .vstatus = OMAP3_PRM_VP2_STATUS_OFFSET,
187 .voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET,
195 #define OMAP3_NR_SCALABLE_VDD ARRAY_SIZE(omap3_vdd_info)
197 /* OMAP4 VDD sturctures */
198 static struct omap_vdd_info omap4_vdd_info[] = {
201 .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET,
202 .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET,
203 .vstepmax = OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET,
204 .vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET,
205 .vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET,
206 .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET,
214 .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET,
215 .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET,
216 .vstepmax = OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET,
217 .vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET,
218 .vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET,
219 .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET,
227 .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET,
228 .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET,
229 .vstepmax = OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET,
230 .vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET,
231 .vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET,
232 .voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET,
240 #define OMAP4_NR_SCALABLE_VDD ARRAY_SIZE(omap4_vdd_info)
243 * Structures containing OMAP3430/OMAP3630 voltage supported and various
244 * voltage dependent data for each VDD.
246 #define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain) \
248 .volt_nominal = _v_nom, \
249 .sr_efuse_offs = _efuse_offs, \
250 .sr_errminlimit = _errminlimit, \
251 .vp_errgain = _errgain \
255 static struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
256 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c),
257 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c),
258 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18),
259 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18),
260 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18),
261 VOLT_DATA_DEFINE(0, 0, 0, 0),
264 static struct omap_volt_data omap36xx_vddmpu_volt_data[] = {
265 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c),
266 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16),
267 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23),
268 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27),
269 VOLT_DATA_DEFINE(0, 0, 0, 0),
273 static struct omap_volt_data omap34xx_vddcore_volt_data[] = {
274 VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c),
275 VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c),
276 VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18),
277 VOLT_DATA_DEFINE(0, 0, 0, 0),
280 static struct omap_volt_data omap36xx_vddcore_volt_data[] = {
281 VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c),
282 VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16),
283 VOLT_DATA_DEFINE(0, 0, 0, 0),
287 * Structures containing OMAP4430 voltage supported and various
288 * voltage dependent data for each VDD.
290 static struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
291 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
292 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
293 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
294 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
295 VOLT_DATA_DEFINE(0, 0, 0, 0),
298 static struct omap_volt_data omap44xx_vdd_iva_volt_data[] = {
299 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
300 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
301 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
302 VOLT_DATA_DEFINE(0, 0, 0, 0),
305 static struct omap_volt_data omap44xx_vdd_core_volt_data[] = {
306 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
307 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
308 VOLT_DATA_DEFINE(0, 0, 0, 0),
311 static struct dentry *voltage_dir;
313 /* Init function pointers */
314 static void (*vc_init) (struct omap_vdd_info *vdd);
315 static int (*vdd_data_configure) (struct omap_vdd_info *vdd);
317 static u32 omap3_voltage_read_reg(u16 mod, u8 offset)
319 return omap2_prm_read_mod_reg(mod, offset);
322 static void omap3_voltage_write_reg(u32 val, u16 mod, u8 offset)
324 omap2_prm_write_mod_reg(val, mod, offset);
327 static u32 omap4_voltage_read_reg(u16 mod, u8 offset)
329 return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
333 static void omap4_voltage_write_reg(u32 val, u16 mod, u8 offset)
335 omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, mod, offset);
338 /* Voltage debugfs support */
339 static int vp_volt_debug_get(void *data, u64 *val)
341 struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
345 pr_warning("Wrong paramater passed\n");
349 vsel = vdd->read_reg(vdd->vp_reg.prm_mod, vdd->vp_offs.voltage);
350 pr_notice("curr_vsel = %x\n", vsel);
352 if (!vdd->pmic_info->vsel_to_uv) {
353 pr_warning("PMIC function to convert vsel to voltage"
354 "in uV not registerd\n");
358 *val = vdd->pmic_info->vsel_to_uv(vsel);
362 static int nom_volt_debug_get(void *data, u64 *val)
364 struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
367 pr_warning("Wrong paramater passed\n");
371 *val = omap_voltage_get_nom_volt(&vdd->voltdm);
376 DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n");
377 DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL,
379 static void vp_latch_vsel(struct omap_vdd_info *vdd)
386 uvdc = omap_voltage_get_nom_volt(&vdd->voltdm);
388 pr_warning("%s: unable to find current voltage for vdd_%s\n",
389 __func__, vdd->voltdm.name);
393 if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
394 pr_warning("%s: PMIC function to convert voltage in uV to"
395 " vsel not registered\n", __func__);
399 mod = vdd->vp_reg.prm_mod;
401 vsel = vdd->pmic_info->uv_to_vsel(uvdc);
403 vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
404 vpconfig &= ~(vdd->vp_reg.vpconfig_initvoltage_mask |
405 vdd->vp_reg.vpconfig_initvdd);
406 vpconfig |= vsel << vdd->vp_reg.vpconfig_initvoltage_shift;
408 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
410 /* Trigger initVDD value copy to voltage processor */
411 vdd->write_reg((vpconfig | vdd->vp_reg.vpconfig_initvdd), mod,
412 vdd->vp_offs.vpconfig);
414 /* Clear initVDD copy trigger bit */
415 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
418 /* Generic voltage init functions */
419 static void __init vp_init(struct omap_vdd_info *vdd)
424 if (!vdd->read_reg || !vdd->write_reg) {
425 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
426 __func__, vdd->voltdm.name);
430 mod = vdd->vp_reg.prm_mod;
432 vp_val = vdd->vp_reg.vpconfig_erroroffset |
433 (vdd->vp_reg.vpconfig_errorgain <<
434 vdd->vp_reg.vpconfig_errorgain_shift) |
435 vdd->vp_reg.vpconfig_timeouten;
436 vdd->write_reg(vp_val, mod, vdd->vp_offs.vpconfig);
438 vp_val = ((vdd->vp_reg.vstepmin_smpswaittimemin <<
439 vdd->vp_reg.vstepmin_smpswaittimemin_shift) |
440 (vdd->vp_reg.vstepmin_stepmin <<
441 vdd->vp_reg.vstepmin_stepmin_shift));
442 vdd->write_reg(vp_val, mod, vdd->vp_offs.vstepmin);
444 vp_val = ((vdd->vp_reg.vstepmax_smpswaittimemax <<
445 vdd->vp_reg.vstepmax_smpswaittimemax_shift) |
446 (vdd->vp_reg.vstepmax_stepmax <<
447 vdd->vp_reg.vstepmax_stepmax_shift));
448 vdd->write_reg(vp_val, mod, vdd->vp_offs.vstepmax);
450 vp_val = ((vdd->vp_reg.vlimitto_vddmax <<
451 vdd->vp_reg.vlimitto_vddmax_shift) |
452 (vdd->vp_reg.vlimitto_vddmin <<
453 vdd->vp_reg.vlimitto_vddmin_shift) |
454 (vdd->vp_reg.vlimitto_timeout <<
455 vdd->vp_reg.vlimitto_timeout_shift));
456 vdd->write_reg(vp_val, mod, vdd->vp_offs.vlimitto);
459 static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
463 name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL);
465 pr_warning("%s: Unable to allocate memory for debugfs"
466 " directory name for vdd_%s",
467 __func__, vdd->voltdm.name);
470 strcpy(name, "vdd_");
471 strcat(name, vdd->voltdm.name);
473 vdd->debug_dir = debugfs_create_dir(name, voltage_dir);
474 if (IS_ERR(vdd->debug_dir)) {
475 pr_warning("%s: Unable to create debugfs directory for"
476 " vdd_%s\n", __func__, vdd->voltdm.name);
477 vdd->debug_dir = NULL;
481 (void) debugfs_create_x16("vp_errorgain", S_IRUGO, vdd->debug_dir,
482 &(vdd->vp_reg.vpconfig_errorgain));
483 (void) debugfs_create_x16("vp_smpswaittimemin", S_IRUGO,
485 &(vdd->vp_reg.vstepmin_smpswaittimemin));
486 (void) debugfs_create_x8("vp_stepmin", S_IRUGO, vdd->debug_dir,
487 &(vdd->vp_reg.vstepmin_stepmin));
488 (void) debugfs_create_x16("vp_smpswaittimemax", S_IRUGO,
490 &(vdd->vp_reg.vstepmax_smpswaittimemax));
491 (void) debugfs_create_x8("vp_stepmax", S_IRUGO, vdd->debug_dir,
492 &(vdd->vp_reg.vstepmax_stepmax));
493 (void) debugfs_create_x8("vp_vddmax", S_IRUGO, vdd->debug_dir,
494 &(vdd->vp_reg.vlimitto_vddmax));
495 (void) debugfs_create_x8("vp_vddmin", S_IRUGO, vdd->debug_dir,
496 &(vdd->vp_reg.vlimitto_vddmin));
497 (void) debugfs_create_x16("vp_timeout", S_IRUGO, vdd->debug_dir,
498 &(vdd->vp_reg.vlimitto_timeout));
499 (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd->debug_dir,
500 (void *) vdd, &vp_volt_debug_fops);
501 (void) debugfs_create_file("curr_nominal_volt", S_IRUGO,
502 vdd->debug_dir, (void *) vdd,
503 &nom_volt_debug_fops);
506 /* Voltage scale and accessory APIs */
507 static int _pre_volt_scale(struct omap_vdd_info *vdd,
508 unsigned long target_volt, u8 *target_vsel, u8 *current_vsel)
510 struct omap_volt_data *volt_data;
511 u32 vc_cmdval, vp_errgain_val;
514 /* Check if suffiecient pmic info is available for this vdd */
515 if (!vdd->pmic_info) {
516 pr_err("%s: Insufficient pmic info to scale the vdd_%s\n",
517 __func__, vdd->voltdm.name);
521 if (!vdd->pmic_info->uv_to_vsel) {
522 pr_err("%s: PMIC function to convert voltage in uV to"
523 "vsel not registered. Hence unable to scale voltage"
524 "for vdd_%s\n", __func__, vdd->voltdm.name);
528 if (!vdd->read_reg || !vdd->write_reg) {
529 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
530 __func__, vdd->voltdm.name);
534 vp_mod = vdd->vp_reg.prm_mod;
535 vc_mod = vdd->vc_reg.prm_mod;
537 /* Get volt_data corresponding to target_volt */
538 volt_data = omap_voltage_get_voltdata(&vdd->voltdm, target_volt);
539 if (IS_ERR(volt_data))
542 *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt);
543 *current_vsel = vdd->read_reg(vp_mod, vdd->vp_offs.voltage);
545 /* Setting the ON voltage to the new target voltage */
546 vc_cmdval = vdd->read_reg(vc_mod, vdd->vc_reg.cmdval_reg);
547 vc_cmdval &= ~vdd->vc_reg.cmd_on_mask;
548 vc_cmdval |= (*target_vsel << vdd->vc_reg.cmd_on_shift);
549 vdd->write_reg(vc_cmdval, vc_mod, vdd->vc_reg.cmdval_reg);
551 /* Setting vp errorgain based on the voltage */
553 vp_errgain_val = vdd->read_reg(vp_mod,
554 vdd->vp_offs.vpconfig);
555 vdd->vp_reg.vpconfig_errorgain = volt_data->vp_errgain;
556 vp_errgain_val &= ~vdd->vp_reg.vpconfig_errorgain_mask;
557 vp_errgain_val |= vdd->vp_reg.vpconfig_errorgain <<
558 vdd->vp_reg.vpconfig_errorgain_shift;
559 vdd->write_reg(vp_errgain_val, vp_mod,
560 vdd->vp_offs.vpconfig);
566 static void _post_volt_scale(struct omap_vdd_info *vdd,
567 unsigned long target_volt, u8 target_vsel, u8 current_vsel)
569 u32 smps_steps = 0, smps_delay = 0;
571 smps_steps = abs(target_vsel - current_vsel);
572 /* SMPS slew rate / step size. 2us added as buffer. */
573 smps_delay = ((smps_steps * vdd->pmic_info->step_size) /
574 vdd->pmic_info->slew_rate) + 2;
577 vdd->curr_volt = target_volt;
580 /* vc_bypass_scale_voltage - VC bypass method of voltage scaling */
581 static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd,
582 unsigned long target_volt)
584 u32 loop_cnt = 0, retries_cnt = 0;
585 u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
587 u8 target_vsel, current_vsel;
590 ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel);
594 mod = vdd->vc_reg.prm_mod;
596 vc_valid = vdd->vc_reg.valid;
597 vc_bypass_val_reg = vdd->vc_reg.bypass_val_reg;
598 vc_bypass_value = (target_vsel << vdd->vc_reg.data_shift) |
599 (vdd->pmic_info->pmic_reg <<
600 vdd->vc_reg.regaddr_shift) |
601 (vdd->pmic_info->i2c_slave_addr <<
602 vdd->vc_reg.slaveaddr_shift);
604 vdd->write_reg(vc_bypass_value, mod, vc_bypass_val_reg);
605 vdd->write_reg(vc_bypass_value | vc_valid, mod, vc_bypass_val_reg);
607 vc_bypass_value = vdd->read_reg(mod, vc_bypass_val_reg);
609 * Loop till the bypass command is acknowledged from the SMPS.
610 * NOTE: This is legacy code. The loop count and retry count needs
613 while (!(vc_bypass_value & vc_valid)) {
616 if (retries_cnt > 10) {
617 pr_warning("%s: Retry count exceeded\n", __func__);
626 vc_bypass_value = vdd->read_reg(mod, vc_bypass_val_reg);
629 _post_volt_scale(vdd, target_volt, target_vsel, current_vsel);
633 /* VP force update method of voltage scaling */
634 static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
635 unsigned long target_volt)
639 u8 target_vsel, current_vsel, prm_irqst_reg;
640 int ret, timeout = 0;
642 ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel);
646 mod = vdd->vp_reg.prm_mod;
647 ocp_mod = vdd->ocp_mod;
648 prm_irqst_reg = vdd->prm_irqst_reg;
651 * Clear all pending TransactionDone interrupt/status. Typical latency
654 while (timeout++ < VP_TRANXDONE_TIMEOUT) {
655 vdd->write_reg(vdd->vp_reg.tranxdone_status,
656 ocp_mod, prm_irqst_reg);
657 if (!(vdd->read_reg(ocp_mod, prm_irqst_reg) &
658 vdd->vp_reg.tranxdone_status))
662 if (timeout >= VP_TRANXDONE_TIMEOUT) {
663 pr_warning("%s: vdd_%s TRANXDONE timeout exceeded."
664 "Voltage change aborted", __func__, vdd->voltdm.name);
668 /* Configure for VP-Force Update */
669 vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
670 vpconfig &= ~(vdd->vp_reg.vpconfig_initvdd |
671 vdd->vp_reg.vpconfig_forceupdate |
672 vdd->vp_reg.vpconfig_initvoltage_mask);
673 vpconfig |= ((target_vsel <<
674 vdd->vp_reg.vpconfig_initvoltage_shift));
675 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
677 /* Trigger initVDD value copy to voltage processor */
678 vpconfig |= vdd->vp_reg.vpconfig_initvdd;
679 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
681 /* Force update of voltage */
682 vpconfig |= vdd->vp_reg.vpconfig_forceupdate;
683 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
686 * Wait for TransactionDone. Typical latency is <200us.
687 * Depends on SMPSWAITTIMEMIN/MAX and voltage change
690 omap_test_timeout((vdd->read_reg(ocp_mod, prm_irqst_reg) &
691 vdd->vp_reg.tranxdone_status),
692 VP_TRANXDONE_TIMEOUT, timeout);
693 if (timeout >= VP_TRANXDONE_TIMEOUT)
694 pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
695 "TRANXDONE never got set after the voltage update\n",
696 __func__, vdd->voltdm.name);
698 _post_volt_scale(vdd, target_volt, target_vsel, current_vsel);
701 * Disable TransactionDone interrupt , clear all status, clear
705 while (timeout++ < VP_TRANXDONE_TIMEOUT) {
706 vdd->write_reg(vdd->vp_reg.tranxdone_status,
707 ocp_mod, prm_irqst_reg);
708 if (!(vdd->read_reg(ocp_mod, prm_irqst_reg) &
709 vdd->vp_reg.tranxdone_status))
714 if (timeout >= VP_TRANXDONE_TIMEOUT)
715 pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying"
716 "to clear the TRANXDONE status\n",
717 __func__, vdd->voltdm.name);
719 vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
720 /* Clear initVDD copy trigger bit */
721 vpconfig &= ~vdd->vp_reg.vpconfig_initvdd;;
722 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
723 /* Clear force bit */
724 vpconfig &= ~vdd->vp_reg.vpconfig_forceupdate;
725 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
730 /* OMAP3 specific voltage init functions */
733 * Intializes the voltage controller registers with the PMIC and board
734 * specific parameters and voltage setup times for OMAP3.
736 static void __init omap3_vc_init(struct omap_vdd_info *vdd)
740 u8 on_vsel, onlp_vsel, ret_vsel, off_vsel;
741 static bool is_initialized;
743 if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
744 pr_err("%s: PMIC info requried to configure vc for"
745 "vdd_%s not populated.Hence cannot initialize vc\n",
746 __func__, vdd->voltdm.name);
750 if (!vdd->read_reg || !vdd->write_reg) {
751 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
752 __func__, vdd->voltdm.name);
756 mod = vdd->vc_reg.prm_mod;
758 /* Set up the SMPS_SA(i2c slave address in VC */
759 vc_val = vdd->read_reg(mod, vdd->vc_reg.smps_sa_reg);
760 vc_val &= ~vdd->vc_reg.smps_sa_mask;
761 vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_reg.smps_sa_shift;
762 vdd->write_reg(vc_val, mod, vdd->vc_reg.smps_sa_reg);
764 /* Setup the VOLRA(pmic reg addr) in VC */
765 vc_val = vdd->read_reg(mod, vdd->vc_reg.smps_volra_reg);
766 vc_val &= ~vdd->vc_reg.smps_volra_mask;
767 vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_reg.smps_volra_shift;
768 vdd->write_reg(vc_val, mod, vdd->vc_reg.smps_volra_reg);
770 /*Configure the setup times */
771 vc_val = vdd->read_reg(mod, vdd->vc_reg.voltsetup_reg);
772 vc_val &= ~vdd->vc_reg.voltsetup_mask;
773 vc_val |= vdd->pmic_info->volt_setup_time <<
774 vdd->vc_reg.voltsetup_shift;
775 vdd->write_reg(vc_val, mod, vdd->vc_reg.voltsetup_reg);
777 /* Set up the on, inactive, retention and off voltage */
778 on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt);
779 onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt);
780 ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt);
781 off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt);
782 vc_val = ((on_vsel << vdd->vc_reg.cmd_on_shift) |
783 (onlp_vsel << vdd->vc_reg.cmd_onlp_shift) |
784 (ret_vsel << vdd->vc_reg.cmd_ret_shift) |
785 (off_vsel << vdd->vc_reg.cmd_off_shift));
786 vdd->write_reg(vc_val, mod, vdd->vc_reg.cmdval_reg);
791 /* Generic VC parameters init */
792 vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, mod,
793 OMAP3_PRM_VC_CH_CONF_OFFSET);
794 vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, mod,
795 OMAP3_PRM_VC_I2C_CFG_OFFSET);
796 vdd->write_reg(OMAP3_CLKSETUP, mod, OMAP3_PRM_CLKSETUP_OFFSET);
797 vdd->write_reg(OMAP3_VOLTOFFSET, mod, OMAP3_PRM_VOLTOFFSET_OFFSET);
798 vdd->write_reg(OMAP3_VOLTSETUP2, mod, OMAP3_PRM_VOLTSETUP2_OFFSET);
799 is_initialized = true;
802 /* Sets up all the VDD related info for OMAP3 */
803 static int __init omap3_vdd_data_configure(struct omap_vdd_info *vdd)
806 u32 sys_clk_speed, timeout_val, waittime;
808 if (!vdd->pmic_info) {
809 pr_err("%s: PMIC info requried to configure vdd_%s not"
810 "populated.Hence cannot initialize vdd_%s\n",
811 __func__, vdd->voltdm.name, vdd->voltdm.name);
815 if (!strcmp(vdd->voltdm.name, "mpu")) {
816 if (cpu_is_omap3630())
817 vdd->volt_data = omap36xx_vddmpu_volt_data;
819 vdd->volt_data = omap34xx_vddmpu_volt_data;
821 vdd->vp_reg.tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK;
822 vdd->vc_reg.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET;
823 vdd->vc_reg.smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT;
824 vdd->vc_reg.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK;
825 vdd->vc_reg.smps_volra_shift = OMAP3430_VOLRA0_SHIFT;
826 vdd->vc_reg.smps_volra_mask = OMAP3430_VOLRA0_MASK;
827 vdd->vc_reg.voltsetup_shift = OMAP3430_SETUP_TIME1_SHIFT;
828 vdd->vc_reg.voltsetup_mask = OMAP3430_SETUP_TIME1_MASK;
829 } else if (!strcmp(vdd->voltdm.name, "core")) {
830 if (cpu_is_omap3630())
831 vdd->volt_data = omap36xx_vddcore_volt_data;
833 vdd->volt_data = omap34xx_vddcore_volt_data;
835 vdd->vp_reg.tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK;
836 vdd->vc_reg.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET;
837 vdd->vc_reg.smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT;
838 vdd->vc_reg.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK;
839 vdd->vc_reg.smps_volra_shift = OMAP3430_VOLRA1_SHIFT;
840 vdd->vc_reg.smps_volra_mask = OMAP3430_VOLRA1_MASK;
841 vdd->vc_reg.voltsetup_shift = OMAP3430_SETUP_TIME2_SHIFT;
842 vdd->vc_reg.voltsetup_mask = OMAP3430_SETUP_TIME2_MASK;
844 pr_warning("%s: vdd_%s does not exisit in OMAP3\n",
845 __func__, vdd->voltdm.name);
850 * Sys clk rate is require to calculate vp timeout value and
851 * smpswaittimemin and smpswaittimemax.
853 sys_ck = clk_get(NULL, "sys_ck");
854 if (IS_ERR(sys_ck)) {
855 pr_warning("%s: Could not get the sys clk to calculate"
856 "various vdd_%s params\n", __func__, vdd->voltdm.name);
859 sys_clk_speed = clk_get_rate(sys_ck);
861 /* Divide to avoid overflow */
862 sys_clk_speed /= 1000;
864 /* Generic voltage parameters */
865 vdd->curr_volt = 1200000;
866 vdd->ocp_mod = OCP_MOD;
867 vdd->prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET;
868 vdd->read_reg = omap3_voltage_read_reg;
869 vdd->write_reg = omap3_voltage_write_reg;
870 vdd->volt_scale = vp_forceupdate_scale_voltage;
871 vdd->vp_enabled = false;
874 vdd->vc_reg.prm_mod = OMAP3430_GR_MOD;
875 vdd->vc_reg.smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET;
876 vdd->vc_reg.smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET;
877 vdd->vc_reg.bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET;
878 vdd->vc_reg.voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET;
879 vdd->vc_reg.data_shift = OMAP3430_DATA_SHIFT;
880 vdd->vc_reg.slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT;
881 vdd->vc_reg.regaddr_shift = OMAP3430_REGADDR_SHIFT;
882 vdd->vc_reg.valid = OMAP3430_VALID_MASK;
883 vdd->vc_reg.cmd_on_shift = OMAP3430_VC_CMD_ON_SHIFT;
884 vdd->vc_reg.cmd_on_mask = OMAP3430_VC_CMD_ON_MASK;
885 vdd->vc_reg.cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT;
886 vdd->vc_reg.cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT;
887 vdd->vc_reg.cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT;
889 vdd->vp_reg.prm_mod = OMAP3430_GR_MOD;
891 /* VPCONFIG bit fields */
892 vdd->vp_reg.vpconfig_erroroffset = (vdd->pmic_info->vp_erroroffset <<
893 OMAP3430_ERROROFFSET_SHIFT);
894 vdd->vp_reg.vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK;
895 vdd->vp_reg.vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT;
896 vdd->vp_reg.vpconfig_initvoltage_shift = OMAP3430_INITVOLTAGE_SHIFT;
897 vdd->vp_reg.vpconfig_initvoltage_mask = OMAP3430_INITVOLTAGE_MASK;
898 vdd->vp_reg.vpconfig_timeouten = OMAP3430_TIMEOUTEN_MASK;
899 vdd->vp_reg.vpconfig_initvdd = OMAP3430_INITVDD_MASK;
900 vdd->vp_reg.vpconfig_forceupdate = OMAP3430_FORCEUPDATE_MASK;
901 vdd->vp_reg.vpconfig_vpenable = OMAP3430_VPENABLE_MASK;
903 /* VSTEPMIN VSTEPMAX bit fields */
904 waittime = ((vdd->pmic_info->step_size / vdd->pmic_info->slew_rate) *
905 sys_clk_speed) / 1000;
906 vdd->vp_reg.vstepmin_smpswaittimemin = waittime;
907 vdd->vp_reg.vstepmax_smpswaittimemax = waittime;
908 vdd->vp_reg.vstepmin_stepmin = vdd->pmic_info->vp_vstepmin;
909 vdd->vp_reg.vstepmax_stepmax = vdd->pmic_info->vp_vstepmax;
910 vdd->vp_reg.vstepmin_smpswaittimemin_shift =
911 OMAP3430_SMPSWAITTIMEMIN_SHIFT;
912 vdd->vp_reg.vstepmax_smpswaittimemax_shift =
913 OMAP3430_SMPSWAITTIMEMAX_SHIFT;
914 vdd->vp_reg.vstepmin_stepmin_shift = OMAP3430_VSTEPMIN_SHIFT;
915 vdd->vp_reg.vstepmax_stepmax_shift = OMAP3430_VSTEPMAX_SHIFT;
917 /* VLIMITTO bit fields */
918 timeout_val = (sys_clk_speed * vdd->pmic_info->vp_timeout_us) / 1000;
919 vdd->vp_reg.vlimitto_timeout = timeout_val;
920 vdd->vp_reg.vlimitto_vddmin = vdd->pmic_info->vp_vddmin;
921 vdd->vp_reg.vlimitto_vddmax = vdd->pmic_info->vp_vddmax;
922 vdd->vp_reg.vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT;
923 vdd->vp_reg.vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT;
924 vdd->vp_reg.vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT;
929 /* OMAP4 specific voltage init functions */
930 static void __init omap4_vc_init(struct omap_vdd_info *vdd)
934 static bool is_initialized;
936 if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
937 pr_err("%s: PMIC info requried to configure vc for"
938 "vdd_%s not populated.Hence cannot initialize vc\n",
939 __func__, vdd->voltdm.name);
943 if (!vdd->read_reg || !vdd->write_reg) {
944 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
945 __func__, vdd->voltdm.name);
949 mod = vdd->vc_reg.prm_mod;
951 /* Set up the SMPS_SA(i2c slave address in VC */
952 vc_val = vdd->read_reg(mod, vdd->vc_reg.smps_sa_reg);
953 vc_val &= ~vdd->vc_reg.smps_sa_mask;
954 vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_reg.smps_sa_shift;
955 vdd->write_reg(vc_val, mod, vdd->vc_reg.smps_sa_reg);
957 /* Setup the VOLRA(pmic reg addr) in VC */
958 vc_val = vdd->read_reg(mod, vdd->vc_reg.smps_volra_reg);
959 vc_val &= ~vdd->vc_reg.smps_volra_mask;
960 vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_reg.smps_volra_shift;
961 vdd->write_reg(vc_val, mod, vdd->vc_reg.smps_volra_reg);
963 /* TODO: Configure setup times and CMD_VAL values*/
968 /* Generic VC parameters init */
969 vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK |
970 OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK |
971 OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK);
972 vdd->write_reg(vc_val, mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET);
974 vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT);
975 vdd->write_reg(vc_val, mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
977 is_initialized = true;
980 /* Sets up all the VDD related info for OMAP4 */
981 static int __init omap4_vdd_data_configure(struct omap_vdd_info *vdd)
984 u32 sys_clk_speed, timeout_val, waittime;
986 if (!vdd->pmic_info) {
987 pr_err("%s: PMIC info requried to configure vdd_%s not"
988 "populated.Hence cannot initialize vdd_%s\n",
989 __func__, vdd->voltdm.name, vdd->voltdm.name);
993 if (!strcmp(vdd->voltdm.name, "mpu")) {
994 vdd->volt_data = omap44xx_vdd_mpu_volt_data;
995 vdd->vp_reg.tranxdone_status =
996 OMAP4430_VP_MPU_TRANXDONE_ST_MASK;
997 vdd->vc_reg.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET;
998 vdd->vc_reg.smps_sa_shift =
999 OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT;
1000 vdd->vc_reg.smps_sa_mask =
1001 OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK;
1002 vdd->vc_reg.smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT;
1003 vdd->vc_reg.smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK;
1004 vdd->vc_reg.voltsetup_reg =
1005 OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET;
1006 vdd->prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET;
1007 } else if (!strcmp(vdd->voltdm.name, "core")) {
1008 vdd->volt_data = omap44xx_vdd_core_volt_data;
1009 vdd->vp_reg.tranxdone_status =
1010 OMAP4430_VP_CORE_TRANXDONE_ST_MASK;
1011 vdd->vc_reg.cmdval_reg =
1012 OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET;
1013 vdd->vc_reg.smps_sa_shift = OMAP4430_SA_VDD_CORE_L_0_6_SHIFT;
1014 vdd->vc_reg.smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK;
1015 vdd->vc_reg.smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT;
1016 vdd->vc_reg.smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK;
1017 vdd->vc_reg.voltsetup_reg =
1018 OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET;
1019 vdd->prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET;
1020 } else if (!strcmp(vdd->voltdm.name, "iva")) {
1021 vdd->volt_data = omap44xx_vdd_iva_volt_data;
1022 vdd->vp_reg.tranxdone_status =
1023 OMAP4430_VP_IVA_TRANXDONE_ST_MASK;
1024 vdd->vc_reg.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET;
1025 vdd->vc_reg.smps_sa_shift =
1026 OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT;
1027 vdd->vc_reg.smps_sa_mask =
1028 OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK;
1029 vdd->vc_reg.smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT;
1030 vdd->vc_reg.smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK;
1031 vdd->vc_reg.voltsetup_reg =
1032 OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET;
1033 vdd->prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET;
1035 pr_warning("%s: vdd_%s does not exisit in OMAP4\n",
1036 __func__, vdd->voltdm.name);
1041 * Sys clk rate is require to calculate vp timeout value and
1042 * smpswaittimemin and smpswaittimemax.
1044 sys_ck = clk_get(NULL, "sys_clkin_ck");
1045 if (IS_ERR(sys_ck)) {
1046 pr_warning("%s: Could not get the sys clk to calculate"
1047 "various vdd_%s params\n", __func__, vdd->voltdm.name);
1050 sys_clk_speed = clk_get_rate(sys_ck);
1052 /* Divide to avoid overflow */
1053 sys_clk_speed /= 1000;
1055 /* Generic voltage parameters */
1056 vdd->curr_volt = 1200000;
1057 vdd->ocp_mod = OMAP4430_PRM_OCP_SOCKET_INST;
1058 vdd->read_reg = omap4_voltage_read_reg;
1059 vdd->write_reg = omap4_voltage_write_reg;
1060 vdd->volt_scale = vp_forceupdate_scale_voltage;
1061 vdd->vp_enabled = false;
1064 vdd->vc_reg.prm_mod = OMAP4430_PRM_DEVICE_INST;
1065 vdd->vc_reg.smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET;
1066 vdd->vc_reg.smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET;
1067 vdd->vc_reg.bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET;
1068 vdd->vc_reg.data_shift = OMAP4430_DATA_SHIFT;
1069 vdd->vc_reg.slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT;
1070 vdd->vc_reg.regaddr_shift = OMAP4430_REGADDR_SHIFT;
1071 vdd->vc_reg.valid = OMAP4430_VALID_MASK;
1072 vdd->vc_reg.cmd_on_shift = OMAP4430_ON_SHIFT;
1073 vdd->vc_reg.cmd_on_mask = OMAP4430_ON_MASK;
1074 vdd->vc_reg.cmd_onlp_shift = OMAP4430_ONLP_SHIFT;
1075 vdd->vc_reg.cmd_ret_shift = OMAP4430_RET_SHIFT;
1076 vdd->vc_reg.cmd_off_shift = OMAP4430_OFF_SHIFT;
1078 vdd->vp_reg.prm_mod = OMAP4430_PRM_DEVICE_INST;
1080 /* VPCONFIG bit fields */
1081 vdd->vp_reg.vpconfig_erroroffset = (vdd->pmic_info->vp_erroroffset <<
1082 OMAP4430_ERROROFFSET_SHIFT);
1083 vdd->vp_reg.vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK;
1084 vdd->vp_reg.vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT;
1085 vdd->vp_reg.vpconfig_initvoltage_shift = OMAP4430_INITVOLTAGE_SHIFT;
1086 vdd->vp_reg.vpconfig_initvoltage_mask = OMAP4430_INITVOLTAGE_MASK;
1087 vdd->vp_reg.vpconfig_timeouten = OMAP4430_TIMEOUTEN_MASK;
1088 vdd->vp_reg.vpconfig_initvdd = OMAP4430_INITVDD_MASK;
1089 vdd->vp_reg.vpconfig_forceupdate = OMAP4430_FORCEUPDATE_MASK;
1090 vdd->vp_reg.vpconfig_vpenable = OMAP4430_VPENABLE_MASK;
1092 /* VSTEPMIN VSTEPMAX bit fields */
1093 waittime = ((vdd->pmic_info->step_size / vdd->pmic_info->slew_rate) *
1094 sys_clk_speed) / 1000;
1095 vdd->vp_reg.vstepmin_smpswaittimemin = waittime;
1096 vdd->vp_reg.vstepmax_smpswaittimemax = waittime;
1097 vdd->vp_reg.vstepmin_stepmin = vdd->pmic_info->vp_vstepmin;
1098 vdd->vp_reg.vstepmax_stepmax = vdd->pmic_info->vp_vstepmax;
1099 vdd->vp_reg.vstepmin_smpswaittimemin_shift =
1100 OMAP4430_SMPSWAITTIMEMIN_SHIFT;
1101 vdd->vp_reg.vstepmax_smpswaittimemax_shift =
1102 OMAP4430_SMPSWAITTIMEMAX_SHIFT;
1103 vdd->vp_reg.vstepmin_stepmin_shift = OMAP4430_VSTEPMIN_SHIFT;
1104 vdd->vp_reg.vstepmax_stepmax_shift = OMAP4430_VSTEPMAX_SHIFT;
1106 /* VLIMITTO bit fields */
1107 timeout_val = (sys_clk_speed * vdd->pmic_info->vp_timeout_us) / 1000;
1108 vdd->vp_reg.vlimitto_timeout = timeout_val;
1109 vdd->vp_reg.vlimitto_vddmin = vdd->pmic_info->vp_vddmin;
1110 vdd->vp_reg.vlimitto_vddmax = vdd->pmic_info->vp_vddmax;
1111 vdd->vp_reg.vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT;
1112 vdd->vp_reg.vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT;
1113 vdd->vp_reg.vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT;
1118 /* Public functions */
1120 * omap_voltage_get_nom_volt() - Gets the current non-auto-compensated voltage
1121 * @voltdm: pointer to the VDD for which current voltage info is needed
1123 * API to get the current non-auto-compensated voltage for a VDD.
1124 * Returns 0 in case of error else returns the current voltage for the VDD.
1126 unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm)
1128 struct omap_vdd_info *vdd;
1130 if (!voltdm || IS_ERR(voltdm)) {
1131 pr_warning("%s: VDD specified does not exist!\n", __func__);
1135 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1137 return vdd->curr_volt;
1141 * omap_vp_get_curr_volt() - API to get the current vp voltage.
1142 * @voltdm: pointer to the VDD.
1144 * This API returns the current voltage for the specified voltage processor
1146 unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm)
1148 struct omap_vdd_info *vdd;
1151 if (!voltdm || IS_ERR(voltdm)) {
1152 pr_warning("%s: VDD specified does not exist!\n", __func__);
1156 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1157 if (!vdd->read_reg) {
1158 pr_err("%s: No read API for reading vdd_%s regs\n",
1159 __func__, voltdm->name);
1163 curr_vsel = vdd->read_reg(vdd->vp_reg.prm_mod,
1164 vdd->vp_offs.voltage);
1166 if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) {
1167 pr_warning("%s: PMIC function to convert vsel to voltage"
1168 "in uV not registerd\n", __func__);
1172 return vdd->pmic_info->vsel_to_uv(curr_vsel);
1176 * omap_vp_enable() - API to enable a particular VP
1177 * @voltdm: pointer to the VDD whose VP is to be enabled.
1179 * This API enables a particular voltage processor. Needed by the smartreflex
1182 void omap_vp_enable(struct voltagedomain *voltdm)
1184 struct omap_vdd_info *vdd;
1188 if (!voltdm || IS_ERR(voltdm)) {
1189 pr_warning("%s: VDD specified does not exist!\n", __func__);
1193 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1194 if (!vdd->read_reg || !vdd->write_reg) {
1195 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
1196 __func__, voltdm->name);
1200 mod = vdd->vp_reg.prm_mod;
1202 /* If VP is already enabled, do nothing. Return */
1203 if (vdd->vp_enabled)
1209 vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
1210 vpconfig |= vdd->vp_reg.vpconfig_vpenable;
1211 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
1212 vdd->vp_enabled = true;
1216 * omap_vp_disable() - API to disable a particular VP
1217 * @voltdm: pointer to the VDD whose VP is to be disabled.
1219 * This API disables a particular voltage processor. Needed by the smartreflex
1222 void omap_vp_disable(struct voltagedomain *voltdm)
1224 struct omap_vdd_info *vdd;
1229 if (!voltdm || IS_ERR(voltdm)) {
1230 pr_warning("%s: VDD specified does not exist!\n", __func__);
1234 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1235 if (!vdd->read_reg || !vdd->write_reg) {
1236 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
1237 __func__, voltdm->name);
1241 mod = vdd->vp_reg.prm_mod;
1243 /* If VP is already disabled, do nothing. Return */
1244 if (!vdd->vp_enabled) {
1245 pr_warning("%s: Trying to disable VP for vdd_%s when"
1246 "it is already disabled\n", __func__, voltdm->name);
1251 vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
1252 vpconfig &= ~vdd->vp_reg.vpconfig_vpenable;
1253 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
1256 * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
1258 omap_test_timeout((vdd->read_reg(mod, vdd->vp_offs.vstatus)),
1259 VP_IDLE_TIMEOUT, timeout);
1261 if (timeout >= VP_IDLE_TIMEOUT)
1262 pr_warning("%s: vdd_%s idle timedout\n",
1263 __func__, voltdm->name);
1265 vdd->vp_enabled = false;
1271 * omap_voltage_scale_vdd() - API to scale voltage of a particular
1273 * @voltdm: pointer to the VDD which is to be scaled.
1274 * @target_volt: The target voltage of the voltage domain
1276 * This API should be called by the kernel to do the voltage scaling
1277 * for a particular voltage domain during dvfs or any other situation.
1279 int omap_voltage_scale_vdd(struct voltagedomain *voltdm,
1280 unsigned long target_volt)
1282 struct omap_vdd_info *vdd;
1284 if (!voltdm || IS_ERR(voltdm)) {
1285 pr_warning("%s: VDD specified does not exist!\n", __func__);
1289 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1291 if (!vdd->volt_scale) {
1292 pr_err("%s: No voltage scale API registered for vdd_%s\n",
1293 __func__, voltdm->name);
1297 return vdd->volt_scale(vdd, target_volt);
1301 * omap_voltage_reset() - Resets the voltage of a particular voltage domain
1302 * to that of the current OPP.
1303 * @voltdm: pointer to the VDD whose voltage is to be reset.
1305 * This API finds out the correct voltage the voltage domain is supposed
1306 * to be at and resets the voltage to that level. Should be used expecially
1307 * while disabling any voltage compensation modules.
1309 void omap_voltage_reset(struct voltagedomain *voltdm)
1311 unsigned long target_uvdc;
1313 if (!voltdm || IS_ERR(voltdm)) {
1314 pr_warning("%s: VDD specified does not exist!\n", __func__);
1318 target_uvdc = omap_voltage_get_nom_volt(voltdm);
1320 pr_err("%s: unable to find current voltage for vdd_%s\n",
1321 __func__, voltdm->name);
1325 omap_voltage_scale_vdd(voltdm, target_uvdc);
1329 * omap_voltage_get_volttable() - API to get the voltage table associated with a
1330 * particular voltage domain.
1331 * @voltdm: pointer to the VDD for which the voltage table is required
1332 * @volt_data: the voltage table for the particular vdd which is to be
1333 * populated by this API
1335 * This API populates the voltage table associated with a VDD into the
1336 * passed parameter pointer. Returns the count of distinct voltages
1337 * supported by this vdd.
1340 void omap_voltage_get_volttable(struct voltagedomain *voltdm,
1341 struct omap_volt_data **volt_data)
1343 struct omap_vdd_info *vdd;
1345 if (!voltdm || IS_ERR(voltdm)) {
1346 pr_warning("%s: VDD specified does not exist!\n", __func__);
1350 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1352 *volt_data = vdd->volt_data;
1356 * omap_voltage_get_voltdata() - API to get the voltage table entry for a
1357 * particular voltage
1358 * @voltdm: pointer to the VDD whose voltage table has to be searched
1359 * @volt: the voltage to be searched in the voltage table
1361 * This API searches through the voltage table for the required voltage
1362 * domain and tries to find a matching entry for the passed voltage volt.
1363 * If a matching entry is found volt_data is populated with that entry.
1364 * This API searches only through the non-compensated voltages int the
1366 * Returns pointer to the voltage table entry corresponding to volt on
1367 * sucess. Returns -ENODATA if no voltage table exisits for the passed voltage
1368 * domain or if there is no matching entry.
1370 struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
1373 struct omap_vdd_info *vdd;
1376 if (!voltdm || IS_ERR(voltdm)) {
1377 pr_warning("%s: VDD specified does not exist!\n", __func__);
1378 return ERR_PTR(-EINVAL);
1381 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1383 if (!vdd->volt_data) {
1384 pr_warning("%s: voltage table does not exist for vdd_%s\n",
1385 __func__, voltdm->name);
1386 return ERR_PTR(-ENODATA);
1389 for (i = 0; vdd->volt_data[i].volt_nominal != 0; i++) {
1390 if (vdd->volt_data[i].volt_nominal == volt)
1391 return &vdd->volt_data[i];
1394 pr_notice("%s: Unable to match the current voltage with the voltage"
1395 "table for vdd_%s\n", __func__, voltdm->name);
1397 return ERR_PTR(-ENODATA);
1401 * omap_voltage_register_pmic() - API to register PMIC specific data
1402 * @voltdm: pointer to the VDD for which the PMIC specific data is
1404 * @pmic_info: the structure containing pmic info
1406 * This API is to be called by the SOC/PMIC file to specify the
1407 * pmic specific info as present in omap_volt_pmic_info structure.
1409 int omap_voltage_register_pmic(struct voltagedomain *voltdm,
1410 struct omap_volt_pmic_info *pmic_info)
1412 struct omap_vdd_info *vdd;
1414 if (!voltdm || IS_ERR(voltdm)) {
1415 pr_warning("%s: VDD specified does not exist!\n", __func__);
1419 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1421 vdd->pmic_info = pmic_info;
1427 * omap_voltage_get_dbgdir() - API to get pointer to the debugfs directory
1428 * corresponding to a voltage domain.
1430 * @voltdm: pointer to the VDD whose debug directory is required.
1432 * This API returns pointer to the debugfs directory corresponding
1433 * to the voltage domain. Should be used by drivers requiring to
1434 * add any debug entry for a particular voltage domain. Returns NULL
1437 struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm)
1439 struct omap_vdd_info *vdd;
1441 if (!voltdm || IS_ERR(voltdm)) {
1442 pr_warning("%s: VDD specified does not exist!\n", __func__);
1446 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1448 return vdd->debug_dir;
1452 * omap_change_voltscale_method() - API to change the voltage scaling method.
1453 * @voltdm: pointer to the VDD whose voltage scaling method
1454 * has to be changed.
1455 * @voltscale_method: the method to be used for voltage scaling.
1457 * This API can be used by the board files to change the method of voltage
1458 * scaling between vpforceupdate and vcbypass. The parameter values are
1459 * defined in voltage.h
1461 void omap_change_voltscale_method(struct voltagedomain *voltdm,
1462 int voltscale_method)
1464 struct omap_vdd_info *vdd;
1466 if (!voltdm || IS_ERR(voltdm)) {
1467 pr_warning("%s: VDD specified does not exist!\n", __func__);
1471 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1473 switch (voltscale_method) {
1474 case VOLTSCALE_VPFORCEUPDATE:
1475 vdd->volt_scale = vp_forceupdate_scale_voltage;
1477 case VOLTSCALE_VCBYPASS:
1478 vdd->volt_scale = vc_bypass_scale_voltage;
1481 pr_warning("%s: Trying to change the method of voltage scaling"
1482 "to an unsupported one!\n", __func__);
1487 * omap_voltage_domain_lookup() - API to get the voltage domain pointer
1488 * @name: Name of the voltage domain
1490 * This API looks up in the global vdd_info struct for the
1491 * existence of voltage domain <name>. If it exists, the API returns
1492 * a pointer to the voltage domain structure corresponding to the
1493 * VDD<name>. Else retuns error pointer.
1495 struct voltagedomain *omap_voltage_domain_lookup(char *name)
1500 pr_err("%s: Voltage driver init not yet happened.Faulting!\n",
1502 return ERR_PTR(-EINVAL);
1506 pr_err("%s: No name to get the votage domain!\n", __func__);
1507 return ERR_PTR(-EINVAL);
1510 for (i = 0; i < nr_scalable_vdd; i++) {
1511 if (!(strcmp(name, vdd_info[i].voltdm.name)))
1512 return &vdd_info[i].voltdm;
1515 return ERR_PTR(-EINVAL);
1519 * omap_voltage_late_init() - Init the various voltage parameters
1521 * This API is to be called in the later stages of the
1522 * system boot to init the voltage controller and
1523 * voltage processors.
1525 int __init omap_voltage_late_init(void)
1530 pr_err("%s: Voltage driver support not added\n",
1535 voltage_dir = debugfs_create_dir("voltage", NULL);
1536 if (IS_ERR(voltage_dir))
1537 pr_err("%s: Unable to create voltage debugfs main dir\n",
1539 for (i = 0; i < nr_scalable_vdd; i++) {
1540 if (vdd_data_configure(&vdd_info[i]))
1542 vc_init(&vdd_info[i]);
1543 vp_init(&vdd_info[i]);
1544 vdd_debugfs_init(&vdd_info[i]);
1551 * omap_voltage_early_init()- Volatage driver early init
1553 static int __init omap_voltage_early_init(void)
1555 if (cpu_is_omap34xx()) {
1556 vdd_info = omap3_vdd_info;
1557 nr_scalable_vdd = OMAP3_NR_SCALABLE_VDD;
1558 vc_init = omap3_vc_init;
1559 vdd_data_configure = omap3_vdd_data_configure;
1560 } else if (cpu_is_omap44xx()) {
1561 vdd_info = omap4_vdd_info;
1562 nr_scalable_vdd = OMAP4_NR_SCALABLE_VDD;
1563 vc_init = omap4_vc_init;
1564 vdd_data_configure = omap4_vdd_data_configure;
1566 pr_warning("%s: voltage driver support not added\n", __func__);
1571 core_initcall(omap_voltage_early_init);