arch/arm/mach-omap2/vc.c

   1 /*
   2  * OMAP Voltage Controller (VC) interface
   3  *
   4  * Copyright (C) 2011 Texas Instruments, Inc.
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2. This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10 #include <linux/kernel.h>
  11 #include <linux/delay.h>
  12 #include <linux/init.h>
  13
  14 #include <plat/cpu.h>
  15
  16 #include "voltage.h"
  17 #include "vc.h"
  18 #include "prm-regbits-34xx.h"
  19 #include "prm-regbits-44xx.h"
  20 #include "prm44xx.h"
  21
  22 /*
  23  * Channel configuration bits, common for OMAP3 & 4
  24  * OMAP3 register: PRM_VC_CH_CONF
  25  * OMAP4 register: PRM_VC_CFG_CHANNEL
  26  */
  27 #define CFG_CHANNEL_SA    BIT(0)
  28 #define CFG_CHANNEL_RAV   BIT(1)
  29 #define CFG_CHANNEL_RAC   BIT(2)
  30 #define CFG_CHANNEL_RACEN BIT(3)
  31 #define CFG_CHANNEL_CMD   BIT(4)
  32 #define CFG_CHANNEL_MASK 0x3f
  33
  34 /**
  35  * omap_vc_config_channel - configure VC channel to PMIC mappings
  36  * @voltdm: pointer to voltagdomain defining the desired VC channel
  37  *
  38  * Configures the VC channel to PMIC mappings for the following
  39  * PMIC settings
  40  * - i2c slave address (SA)
  41  * - voltage configuration address (RAV)
  42  * - command configuration address (RAC) and enable bit (RACEN)
  43  * - command values for ON, ONLP, RET and OFF (CMD)
  44  *
  45  * This function currently only allows flexible configuration of the
  46  * non-default channel.  Starting with OMAP4, there are more than 2
  47  * channels, with one defined as the default (on OMAP4, it's MPU.)
  48  * Only the non-default channel can be configured.
  49  */
  50 static int omap_vc_config_channel(struct voltagedomain *voltdm)
  51 {
  52         struct omap_vc_channel *vc = voltdm->vc;
  53
  54         /*
  55          * For default channel, the only configurable bit is RACEN.
  56          * All others must stay at zero (see function comment above.)
  57          */
  58         if (vc->flags & OMAP_VC_CHANNEL_DEFAULT)
  59                 vc->cfg_channel &= CFG_CHANNEL_RACEN;
  60
  61         voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift,
  62                     vc->cfg_channel << vc->cfg_channel_sa_shift,
  63                     vc->common->cfg_channel_reg);
  64
  65         return 0;
  66 }
  67
  68 /* Voltage scale and accessory APIs */
  69 int omap_vc_pre_scale(struct voltagedomain *voltdm,
  70                       unsigned long target_volt,
  71                       u8 *target_vsel, u8 *current_vsel)
  72 {
  73         struct omap_vc_channel *vc = voltdm->vc;
  74         struct omap_vdd_info *vdd = voltdm->vdd;
  75         struct omap_volt_data *volt_data;
  76         const struct omap_vp_common_data *vp_common;
  77         u32 vc_cmdval, vp_errgain_val;
  78
  79         vp_common = vdd->vp_data->vp_common;
  80
  81         /* Check if sufficient pmic info is available for this vdd */
  82         if (!voltdm->pmic) {
  83                 pr_err("%s: Insufficient pmic info to scale the vdd_%s\n",
  84                         __func__, voltdm->name);
  85                 return -EINVAL;
  86         }
  87
  88         if (!voltdm->pmic->uv_to_vsel) {
  89                 pr_err("%s: PMIC function to convert voltage in uV to"
  90                         "vsel not registered. Hence unable to scale voltage"
  91                         "for vdd_%s\n", __func__, voltdm->name);
  92                 return -ENODATA;
  93         }
  94
  95         if (!voltdm->read || !voltdm->write) {
  96                 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
  97                         __func__, voltdm->name);
  98                 return -EINVAL;
  99         }
 100
 101         /* Get volt_data corresponding to target_volt */
 102         volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
 103         if (IS_ERR(volt_data))
 104                 volt_data = NULL;
 105
 106         *target_vsel = voltdm->pmic->uv_to_vsel(target_volt);
 107         *current_vsel = voltdm->read(vdd->vp_data->voltage);
 108
 109         /* Setting the ON voltage to the new target voltage */
 110         vc_cmdval = voltdm->read(vc->cmdval_reg);
 111         vc_cmdval &= ~vc->common->cmd_on_mask;
 112         vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift);
 113         voltdm->write(vc_cmdval, vc->cmdval_reg);
 114
 115         /* Setting vp errorgain based on the voltage */
 116         if (volt_data) {
 117                 vp_errgain_val = voltdm->read(vdd->vp_data->vpconfig);
 118                 vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain;
 119                 vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask;
 120                 vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain <<
 121                         vp_common->vpconfig_errorgain_shift;
 122                 voltdm->write(vp_errgain_val, vdd->vp_data->vpconfig);
 123         }
 124
 125         return 0;
 126 }
 127
 128 void omap_vc_post_scale(struct voltagedomain *voltdm,
 129                         unsigned long target_volt,
 130                         u8 target_vsel, u8 current_vsel)
 131 {
 132         struct omap_vdd_info *vdd = voltdm->vdd;
 133         u32 smps_steps = 0, smps_delay = 0;
 134
 135         smps_steps = abs(target_vsel - current_vsel);
 136         /* SMPS slew rate / step size. 2us added as buffer. */
 137         smps_delay = ((smps_steps * voltdm->pmic->step_size) /
 138                         voltdm->pmic->slew_rate) + 2;
 139         udelay(smps_delay);
 140
 141         vdd->curr_volt = target_volt;
 142 }
 143
 144 /* vc_bypass_scale - VC bypass method of voltage scaling */
 145 int omap_vc_bypass_scale(struct voltagedomain *voltdm,
 146                          unsigned long target_volt)
 147 {
 148         struct omap_vc_channel *vc = voltdm->vc;
 149         u32 loop_cnt = 0, retries_cnt = 0;
 150         u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
 151         u8 target_vsel, current_vsel;
 152         int ret;
 153
 154         ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
 155         if (ret)
 156                 return ret;
 157
 158         vc_valid = vc->common->valid;
 159         vc_bypass_val_reg = vc->common->bypass_val_reg;
 160         vc_bypass_value = (target_vsel << vc->common->data_shift) |
 161                 (vc->volt_reg_addr << vc->common->regaddr_shift) |
 162                 (vc->i2c_slave_addr << vc->common->slaveaddr_shift);
 163
 164         voltdm->write(vc_bypass_value, vc_bypass_val_reg);
 165         voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg);
 166
 167         vc_bypass_value = voltdm->read(vc_bypass_val_reg);
 168         /*
 169          * Loop till the bypass command is acknowledged from the SMPS.
 170          * NOTE: This is legacy code. The loop count and retry count needs
 171          * to be revisited.
 172          */
 173         while (!(vc_bypass_value & vc_valid)) {
 174                 loop_cnt++;
 175
 176                 if (retries_cnt > 10) {
 177                         pr_warning("%s: Retry count exceeded\n", __func__);
 178                         return -ETIMEDOUT;
 179                 }
 180
 181                 if (loop_cnt > 50) {
 182                         retries_cnt++;
 183                         loop_cnt = 0;
 184                         udelay(10);
 185                 }
 186                 vc_bypass_value = voltdm->read(vc_bypass_val_reg);
 187         }
 188
 189         omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
 190         return 0;
 191 }
 192
 193 static void __init omap3_vfsm_init(struct voltagedomain *voltdm)
 194 {
 195         /*
 196          * Voltage Manager FSM parameters init
 197          * XXX This data should be passed in from the board file
 198          */
 199         voltdm->write(OMAP3_CLKSETUP, OMAP3_PRM_CLKSETUP_OFFSET);
 200         voltdm->write(OMAP3_VOLTOFFSET, OMAP3_PRM_VOLTOFFSET_OFFSET);
 201         voltdm->write(OMAP3_VOLTSETUP2, OMAP3_PRM_VOLTSETUP2_OFFSET);
 202 }
 203
 204 static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
 205 {
 206         static bool is_initialized;
 207
 208         if (is_initialized)
 209                 return;
 210
 211         /*
 212          * Generic VC parameters init
 213          * XXX This data should be abstracted out
 214          */
 215         voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK,
 216                        OMAP3_PRM_VC_I2C_CFG_OFFSET);
 217
 218         omap3_vfsm_init(voltdm);
 219
 220         is_initialized = true;
 221 }
 222
 223
 224 /* OMAP4 specific voltage init functions */
 225 static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
 226 {
 227         static bool is_initialized;
 228         u32 vc_val;
 229
 230         if (is_initialized)
 231                 return;
 232
 233         /* XXX These are magic numbers and do not belong! */
 234         vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT);
 235         voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
 236
 237         is_initialized = true;
 238 }
 239
 240 void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 241 {
 242         struct omap_vc_channel *vc = voltdm->vc;
 243         u8 on_vsel, onlp_vsel, ret_vsel, off_vsel;
 244         u32 val;
 245
 246         if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
 247                 pr_err("%s: PMIC info requried to configure vc for"
 248                         "vdd_%s not populated.Hence cannot initialize vc\n",
 249                         __func__, voltdm->name);
 250                 return;
 251         }
 252
 253         if (!voltdm->read || !voltdm->write) {
 254                 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
 255                         __func__, voltdm->name);
 256                 return;
 257         }
 258
 259         vc->cfg_channel = 0;
 260
 261         /* get PMIC/board specific settings */
 262         vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr;
 263         vc->volt_reg_addr = voltdm->pmic->volt_reg_addr;
 264         vc->cmd_reg_addr = voltdm->pmic->cmd_reg_addr;
 265         vc->setup_time = voltdm->pmic->volt_setup_time;
 266
 267         /* Configure the i2c slave address for this VC */
 268         voltdm->rmw(vc->smps_sa_mask,
 269                     vc->i2c_slave_addr << __ffs(vc->smps_sa_mask),
 270                     vc->common->smps_sa_reg);
 271         vc->cfg_channel |= CFG_CHANNEL_SA;
 272
 273         /*
 274          * Configure the PMIC register addresses.
 275          */
 276         voltdm->rmw(vc->smps_volra_mask,
 277                     vc->volt_reg_addr << __ffs(vc->smps_volra_mask),
 278                     vc->common->smps_volra_reg);
 279         vc->cfg_channel |= CFG_CHANNEL_RAV;
 280
 281         if (vc->cmd_reg_addr) {
 282                 voltdm->rmw(vc->smps_cmdra_mask,
 283                             vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask),
 284                             vc->common->smps_cmdra_reg);
 285                 vc->cfg_channel |= CFG_CHANNEL_RAC | CFG_CHANNEL_RACEN;
 286         }
 287
 288         /* Set up the on, inactive, retention and off voltage */
 289         on_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->on_volt);
 290         onlp_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->onlp_volt);
 291         ret_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->ret_volt);
 292         off_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->off_volt);
 293         val = ((on_vsel << vc->common->cmd_on_shift) |
 294                (onlp_vsel << vc->common->cmd_onlp_shift) |
 295                (ret_vsel << vc->common->cmd_ret_shift) |
 296                (off_vsel << vc->common->cmd_off_shift));
 297         voltdm->write(val, vc->cmdval_reg);
 298         vc->cfg_channel |= CFG_CHANNEL_CMD;
 299
 300         /* Channel configuration */
 301         omap_vc_config_channel(voltdm);
 302
 303         /* Configure the setup times */
 304         voltdm->rmw(voltdm->vfsm->voltsetup_mask,
 305                     vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask),
 306                     voltdm->vfsm->voltsetup_reg);
 307
 308         if (cpu_is_omap34xx())
 309                 omap3_vc_init_channel(voltdm);
 310         else if (cpu_is_omap44xx())
 311                 omap4_vc_init_channel(voltdm);
 312 }
 313