2 * omap_hwmod_2xxx_ipblock_data.c - common IP block data for OMAP2xxx
4 * Copyright (C) 2011 Nokia Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <plat/omap_hwmod.h>
12 #include <plat/serial.h>
14 #include <plat/dmtimer.h>
15 #include <plat/mcspi.h>
17 #include <mach/irqs.h>
19 #include "omap_hwmod_common_data.h"
22 struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = {
27 struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = {
28 { .name = "dispc", .dma_req = 5 },
37 static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = {
41 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
42 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
43 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
44 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
45 .sysc_fields = &omap_hwmod_sysc_type1,
48 struct omap_hwmod_class omap2_dispc_hwmod_class = {
50 .sysc = &omap2_dispc_sysc,
53 /* OMAP2xxx Timer Common */
54 static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
58 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
59 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
61 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
62 .sysc_fields = &omap_hwmod_sysc_type1,
65 struct omap_hwmod_class omap2xxx_timer_hwmod_class = {
67 .sysc = &omap2xxx_timer_sysc,
68 .rev = OMAP_TIMER_IP_VERSION_1,
73 * 32-bit watchdog upward counter that generates a pulse on the reset pin on
77 static struct omap_hwmod_class_sysconfig omap2xxx_wd_timer_sysc = {
81 .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
82 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
83 .sysc_fields = &omap_hwmod_sysc_type1,
86 struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class = {
88 .sysc = &omap2xxx_wd_timer_sysc,
89 .pre_shutdown = &omap2_wd_timer_disable
94 * general purpose io module
96 static struct omap_hwmod_class_sysconfig omap2xxx_gpio_sysc = {
100 .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
101 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
102 SYSS_HAS_RESET_STATUS),
103 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
104 .sysc_fields = &omap_hwmod_sysc_type1,
107 struct omap_hwmod_class omap2xxx_gpio_hwmod_class = {
109 .sysc = &omap2xxx_gpio_sysc,
114 static struct omap_hwmod_class_sysconfig omap2xxx_dma_sysc = {
118 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
119 SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
120 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
121 .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
122 .sysc_fields = &omap_hwmod_sysc_type1,
125 struct omap_hwmod_class omap2xxx_dma_hwmod_class = {
127 .sysc = &omap2xxx_dma_sysc,
132 * mailbox module allowing communication between the on-chip processors
133 * using a queued mailbox-interrupt mechanism.
136 static struct omap_hwmod_class_sysconfig omap2xxx_mailbox_sysc = {
140 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
141 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
142 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
143 .sysc_fields = &omap_hwmod_sysc_type1,
146 struct omap_hwmod_class omap2xxx_mailbox_hwmod_class = {
148 .sysc = &omap2xxx_mailbox_sysc,
153 * multichannel serial port interface (mcspi) / master/slave synchronous serial
157 static struct omap_hwmod_class_sysconfig omap2xxx_mcspi_sysc = {
161 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
162 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
163 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
164 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
165 .sysc_fields = &omap_hwmod_sysc_type1,
168 struct omap_hwmod_class omap2xxx_mcspi_class = {
170 .sysc = &omap2xxx_mcspi_sysc,
171 .rev = OMAP2_MCSPI_REV,