2 * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips
4 * Copyright (C) 2009-2011 Nokia Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * XXX handle crossbar/shared link difference for L3?
12 * XXX these should be marked initdata for multi-OMAP kernels
14 #include <plat/omap_hwmod.h>
15 #include <mach/irqs.h>
18 #include <plat/serial.h>
20 #include <plat/gpio.h>
21 #include <plat/mcbsp.h>
22 #include <plat/mcspi.h>
23 #include <plat/dmtimer.h>
25 #include <plat/l3_2xxx.h>
27 #include "omap_hwmod_common_data.h"
29 #include "prm-regbits-24xx.h"
30 #include "cm-regbits-24xx.h"
34 * OMAP2430 hardware module integration data
36 * ALl of the data in this section should be autogeneratable from the
37 * TI hardware database or other technical documentation. Data that
38 * is driver-specific or driver-kernel integration-specific belongs
42 static struct omap_hwmod omap2430_mpu_hwmod;
43 static struct omap_hwmod omap2430_iva_hwmod;
44 static struct omap_hwmod omap2430_l3_main_hwmod;
45 static struct omap_hwmod omap2430_l4_core_hwmod;
46 static struct omap_hwmod omap2430_dss_core_hwmod;
47 static struct omap_hwmod omap2430_dss_dispc_hwmod;
48 static struct omap_hwmod omap2430_dss_rfbi_hwmod;
49 static struct omap_hwmod omap2430_dss_venc_hwmod;
50 static struct omap_hwmod omap2430_wd_timer2_hwmod;
51 static struct omap_hwmod omap2430_gpio1_hwmod;
52 static struct omap_hwmod omap2430_gpio2_hwmod;
53 static struct omap_hwmod omap2430_gpio3_hwmod;
54 static struct omap_hwmod omap2430_gpio4_hwmod;
55 static struct omap_hwmod omap2430_gpio5_hwmod;
56 static struct omap_hwmod omap2430_dma_system_hwmod;
57 static struct omap_hwmod omap2430_mcbsp1_hwmod;
58 static struct omap_hwmod omap2430_mcbsp2_hwmod;
59 static struct omap_hwmod omap2430_mcbsp3_hwmod;
60 static struct omap_hwmod omap2430_mcbsp4_hwmod;
61 static struct omap_hwmod omap2430_mcbsp5_hwmod;
62 static struct omap_hwmod omap2430_mcspi1_hwmod;
63 static struct omap_hwmod omap2430_mcspi2_hwmod;
64 static struct omap_hwmod omap2430_mcspi3_hwmod;
65 static struct omap_hwmod omap2430_mmc1_hwmod;
66 static struct omap_hwmod omap2430_mmc2_hwmod;
68 /* L3 -> L4_CORE interface */
69 static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
70 .master = &omap2430_l3_main_hwmod,
71 .slave = &omap2430_l4_core_hwmod,
72 .user = OCP_USER_MPU | OCP_USER_SDMA,
75 /* MPU -> L3 interface */
76 static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = {
77 .master = &omap2430_mpu_hwmod,
78 .slave = &omap2430_l3_main_hwmod,
82 /* Slave interfaces on the L3 interconnect */
83 static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = {
84 &omap2430_mpu__l3_main,
88 static struct omap_hwmod_ocp_if omap2430_dss__l3 = {
89 .master = &omap2430_dss_core_hwmod,
90 .slave = &omap2430_l3_main_hwmod,
93 .l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS,
94 .flags = OMAP_FIREWALL_L3,
97 .user = OCP_USER_MPU | OCP_USER_SDMA,
100 /* Master interfaces on the L3 interconnect */
101 static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = {
102 &omap2430_l3_main__l4_core,
106 static struct omap_hwmod omap2430_l3_main_hwmod = {
108 .class = &l3_hwmod_class,
109 .masters = omap2430_l3_main_masters,
110 .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters),
111 .slaves = omap2430_l3_main_slaves,
112 .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves),
113 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
114 .flags = HWMOD_NO_IDLEST,
117 static struct omap_hwmod omap2430_l4_wkup_hwmod;
118 static struct omap_hwmod omap2430_uart1_hwmod;
119 static struct omap_hwmod omap2430_uart2_hwmod;
120 static struct omap_hwmod omap2430_uart3_hwmod;
121 static struct omap_hwmod omap2430_i2c1_hwmod;
122 static struct omap_hwmod omap2430_i2c2_hwmod;
124 static struct omap_hwmod omap2430_usbhsotg_hwmod;
126 /* l3_core -> usbhsotg interface */
127 static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = {
128 .master = &omap2430_usbhsotg_hwmod,
129 .slave = &omap2430_l3_main_hwmod,
131 .user = OCP_USER_MPU,
134 /* L4 CORE -> I2C1 interface */
135 static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = {
136 .master = &omap2430_l4_core_hwmod,
137 .slave = &omap2430_i2c1_hwmod,
139 .addr = omap2_i2c1_addr_space,
140 .user = OCP_USER_MPU | OCP_USER_SDMA,
143 /* L4 CORE -> I2C2 interface */
144 static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = {
145 .master = &omap2430_l4_core_hwmod,
146 .slave = &omap2430_i2c2_hwmod,
148 .addr = omap2_i2c2_addr_space,
149 .user = OCP_USER_MPU | OCP_USER_SDMA,
152 /* L4_CORE -> L4_WKUP interface */
153 static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
154 .master = &omap2430_l4_core_hwmod,
155 .slave = &omap2430_l4_wkup_hwmod,
156 .user = OCP_USER_MPU | OCP_USER_SDMA,
159 /* L4 CORE -> UART1 interface */
160 static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
161 .master = &omap2430_l4_core_hwmod,
162 .slave = &omap2430_uart1_hwmod,
164 .addr = omap2xxx_uart1_addr_space,
165 .user = OCP_USER_MPU | OCP_USER_SDMA,
168 /* L4 CORE -> UART2 interface */
169 static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
170 .master = &omap2430_l4_core_hwmod,
171 .slave = &omap2430_uart2_hwmod,
173 .addr = omap2xxx_uart2_addr_space,
174 .user = OCP_USER_MPU | OCP_USER_SDMA,
177 /* L4 PER -> UART3 interface */
178 static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
179 .master = &omap2430_l4_core_hwmod,
180 .slave = &omap2430_uart3_hwmod,
182 .addr = omap2xxx_uart3_addr_space,
183 .user = OCP_USER_MPU | OCP_USER_SDMA,
187 * usbhsotg interface data
189 static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = {
191 .pa_start = OMAP243X_HS_BASE,
192 .pa_end = OMAP243X_HS_BASE + SZ_4K - 1,
193 .flags = ADDR_TYPE_RT
197 /* l4_core ->usbhsotg interface */
198 static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = {
199 .master = &omap2430_l4_core_hwmod,
200 .slave = &omap2430_usbhsotg_hwmod,
202 .addr = omap2430_usbhsotg_addrs,
203 .user = OCP_USER_MPU,
206 static struct omap_hwmod_ocp_if *omap2430_usbhsotg_masters[] = {
207 &omap2430_usbhsotg__l3,
210 static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = {
211 &omap2430_l4_core__usbhsotg,
214 /* L4 CORE -> MMC1 interface */
215 static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {
216 .master = &omap2430_l4_core_hwmod,
217 .slave = &omap2430_mmc1_hwmod,
219 .addr = omap2430_mmc1_addr_space,
220 .user = OCP_USER_MPU | OCP_USER_SDMA,
223 /* L4 CORE -> MMC2 interface */
224 static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = {
225 .master = &omap2430_l4_core_hwmod,
226 .slave = &omap2430_mmc2_hwmod,
228 .addr = omap2430_mmc2_addr_space,
229 .user = OCP_USER_MPU | OCP_USER_SDMA,
232 /* Slave interfaces on the L4_CORE interconnect */
233 static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
234 &omap2430_l3_main__l4_core,
237 /* Master interfaces on the L4_CORE interconnect */
238 static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {
239 &omap2430_l4_core__l4_wkup,
240 &omap2430_l4_core__mmc1,
241 &omap2430_l4_core__mmc2,
245 static struct omap_hwmod omap2430_l4_core_hwmod = {
247 .class = &l4_hwmod_class,
248 .masters = omap2430_l4_core_masters,
249 .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters),
250 .slaves = omap2430_l4_core_slaves,
251 .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves),
252 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
253 .flags = HWMOD_NO_IDLEST,
256 /* Slave interfaces on the L4_WKUP interconnect */
257 static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {
258 &omap2430_l4_core__l4_wkup,
259 &omap2_l4_core__uart1,
260 &omap2_l4_core__uart2,
261 &omap2_l4_core__uart3,
264 /* Master interfaces on the L4_WKUP interconnect */
265 static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
268 /* l4 core -> mcspi1 interface */
269 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = {
270 .master = &omap2430_l4_core_hwmod,
271 .slave = &omap2430_mcspi1_hwmod,
273 .addr = omap2_mcspi1_addr_space,
274 .user = OCP_USER_MPU | OCP_USER_SDMA,
277 /* l4 core -> mcspi2 interface */
278 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = {
279 .master = &omap2430_l4_core_hwmod,
280 .slave = &omap2430_mcspi2_hwmod,
282 .addr = omap2_mcspi2_addr_space,
283 .user = OCP_USER_MPU | OCP_USER_SDMA,
286 /* l4 core -> mcspi3 interface */
287 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = {
288 .master = &omap2430_l4_core_hwmod,
289 .slave = &omap2430_mcspi3_hwmod,
291 .addr = omap2430_mcspi3_addr_space,
292 .user = OCP_USER_MPU | OCP_USER_SDMA,
296 static struct omap_hwmod omap2430_l4_wkup_hwmod = {
298 .class = &l4_hwmod_class,
299 .masters = omap2430_l4_wkup_masters,
300 .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters),
301 .slaves = omap2430_l4_wkup_slaves,
302 .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves),
303 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
304 .flags = HWMOD_NO_IDLEST,
307 /* Master interfaces on the MPU device */
308 static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = {
309 &omap2430_mpu__l3_main,
313 static struct omap_hwmod omap2430_mpu_hwmod = {
315 .class = &mpu_hwmod_class,
316 .main_clk = "mpu_ck",
317 .masters = omap2430_mpu_masters,
318 .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters),
319 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
323 * IVA2_1 interface data
326 /* IVA2 <- L3 interface */
327 static struct omap_hwmod_ocp_if omap2430_l3__iva = {
328 .master = &omap2430_l3_main_hwmod,
329 .slave = &omap2430_iva_hwmod,
331 .user = OCP_USER_MPU | OCP_USER_SDMA,
334 static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = {
342 static struct omap_hwmod omap2430_iva_hwmod = {
344 .class = &iva_hwmod_class,
345 .masters = omap2430_iva_masters,
346 .masters_cnt = ARRAY_SIZE(omap2430_iva_masters),
347 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
351 static struct omap_hwmod omap2430_timer1_hwmod;
353 static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = {
355 .pa_start = 0x49018000,
356 .pa_end = 0x49018000 + SZ_1K - 1,
357 .flags = ADDR_TYPE_RT
362 /* l4_wkup -> timer1 */
363 static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = {
364 .master = &omap2430_l4_wkup_hwmod,
365 .slave = &omap2430_timer1_hwmod,
367 .addr = omap2430_timer1_addrs,
368 .user = OCP_USER_MPU | OCP_USER_SDMA,
371 /* timer1 slave port */
372 static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = {
373 &omap2430_l4_wkup__timer1,
377 static struct omap_hwmod omap2430_timer1_hwmod = {
379 .mpu_irqs = omap2_timer1_mpu_irqs,
380 .main_clk = "gpt1_fck",
384 .module_bit = OMAP24XX_EN_GPT1_SHIFT,
385 .module_offs = WKUP_MOD,
387 .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
390 .slaves = omap2430_timer1_slaves,
391 .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves),
392 .class = &omap2xxx_timer_hwmod_class,
393 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
397 static struct omap_hwmod omap2430_timer2_hwmod;
399 /* l4_core -> timer2 */
400 static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = {
401 .master = &omap2430_l4_core_hwmod,
402 .slave = &omap2430_timer2_hwmod,
404 .addr = omap2xxx_timer2_addrs,
405 .user = OCP_USER_MPU | OCP_USER_SDMA,
408 /* timer2 slave port */
409 static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = {
410 &omap2430_l4_core__timer2,
414 static struct omap_hwmod omap2430_timer2_hwmod = {
416 .mpu_irqs = omap2_timer2_mpu_irqs,
417 .main_clk = "gpt2_fck",
421 .module_bit = OMAP24XX_EN_GPT2_SHIFT,
422 .module_offs = CORE_MOD,
424 .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
427 .slaves = omap2430_timer2_slaves,
428 .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves),
429 .class = &omap2xxx_timer_hwmod_class,
430 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
434 static struct omap_hwmod omap2430_timer3_hwmod;
436 /* l4_core -> timer3 */
437 static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = {
438 .master = &omap2430_l4_core_hwmod,
439 .slave = &omap2430_timer3_hwmod,
441 .addr = omap2xxx_timer3_addrs,
442 .user = OCP_USER_MPU | OCP_USER_SDMA,
445 /* timer3 slave port */
446 static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = {
447 &omap2430_l4_core__timer3,
451 static struct omap_hwmod omap2430_timer3_hwmod = {
453 .mpu_irqs = omap2_timer3_mpu_irqs,
454 .main_clk = "gpt3_fck",
458 .module_bit = OMAP24XX_EN_GPT3_SHIFT,
459 .module_offs = CORE_MOD,
461 .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT,
464 .slaves = omap2430_timer3_slaves,
465 .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves),
466 .class = &omap2xxx_timer_hwmod_class,
467 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
471 static struct omap_hwmod omap2430_timer4_hwmod;
473 /* l4_core -> timer4 */
474 static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = {
475 .master = &omap2430_l4_core_hwmod,
476 .slave = &omap2430_timer4_hwmod,
478 .addr = omap2xxx_timer4_addrs,
479 .user = OCP_USER_MPU | OCP_USER_SDMA,
482 /* timer4 slave port */
483 static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = {
484 &omap2430_l4_core__timer4,
488 static struct omap_hwmod omap2430_timer4_hwmod = {
490 .mpu_irqs = omap2_timer4_mpu_irqs,
491 .main_clk = "gpt4_fck",
495 .module_bit = OMAP24XX_EN_GPT4_SHIFT,
496 .module_offs = CORE_MOD,
498 .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT,
501 .slaves = omap2430_timer4_slaves,
502 .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves),
503 .class = &omap2xxx_timer_hwmod_class,
504 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
508 static struct omap_hwmod omap2430_timer5_hwmod;
510 /* l4_core -> timer5 */
511 static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = {
512 .master = &omap2430_l4_core_hwmod,
513 .slave = &omap2430_timer5_hwmod,
515 .addr = omap2xxx_timer5_addrs,
516 .user = OCP_USER_MPU | OCP_USER_SDMA,
519 /* timer5 slave port */
520 static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = {
521 &omap2430_l4_core__timer5,
525 static struct omap_hwmod omap2430_timer5_hwmod = {
527 .mpu_irqs = omap2_timer5_mpu_irqs,
528 .main_clk = "gpt5_fck",
532 .module_bit = OMAP24XX_EN_GPT5_SHIFT,
533 .module_offs = CORE_MOD,
535 .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,
538 .slaves = omap2430_timer5_slaves,
539 .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves),
540 .class = &omap2xxx_timer_hwmod_class,
541 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
545 static struct omap_hwmod omap2430_timer6_hwmod;
547 /* l4_core -> timer6 */
548 static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = {
549 .master = &omap2430_l4_core_hwmod,
550 .slave = &omap2430_timer6_hwmod,
552 .addr = omap2xxx_timer6_addrs,
553 .user = OCP_USER_MPU | OCP_USER_SDMA,
556 /* timer6 slave port */
557 static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = {
558 &omap2430_l4_core__timer6,
562 static struct omap_hwmod omap2430_timer6_hwmod = {
564 .mpu_irqs = omap2_timer6_mpu_irqs,
565 .main_clk = "gpt6_fck",
569 .module_bit = OMAP24XX_EN_GPT6_SHIFT,
570 .module_offs = CORE_MOD,
572 .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,
575 .slaves = omap2430_timer6_slaves,
576 .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves),
577 .class = &omap2xxx_timer_hwmod_class,
578 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
582 static struct omap_hwmod omap2430_timer7_hwmod;
584 /* l4_core -> timer7 */
585 static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = {
586 .master = &omap2430_l4_core_hwmod,
587 .slave = &omap2430_timer7_hwmod,
589 .addr = omap2xxx_timer7_addrs,
590 .user = OCP_USER_MPU | OCP_USER_SDMA,
593 /* timer7 slave port */
594 static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = {
595 &omap2430_l4_core__timer7,
599 static struct omap_hwmod omap2430_timer7_hwmod = {
601 .mpu_irqs = omap2_timer7_mpu_irqs,
602 .main_clk = "gpt7_fck",
606 .module_bit = OMAP24XX_EN_GPT7_SHIFT,
607 .module_offs = CORE_MOD,
609 .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,
612 .slaves = omap2430_timer7_slaves,
613 .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves),
614 .class = &omap2xxx_timer_hwmod_class,
615 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
619 static struct omap_hwmod omap2430_timer8_hwmod;
621 /* l4_core -> timer8 */
622 static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = {
623 .master = &omap2430_l4_core_hwmod,
624 .slave = &omap2430_timer8_hwmod,
626 .addr = omap2xxx_timer8_addrs,
627 .user = OCP_USER_MPU | OCP_USER_SDMA,
630 /* timer8 slave port */
631 static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = {
632 &omap2430_l4_core__timer8,
636 static struct omap_hwmod omap2430_timer8_hwmod = {
638 .mpu_irqs = omap2_timer8_mpu_irqs,
639 .main_clk = "gpt8_fck",
643 .module_bit = OMAP24XX_EN_GPT8_SHIFT,
644 .module_offs = CORE_MOD,
646 .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,
649 .slaves = omap2430_timer8_slaves,
650 .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves),
651 .class = &omap2xxx_timer_hwmod_class,
652 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
656 static struct omap_hwmod omap2430_timer9_hwmod;
658 /* l4_core -> timer9 */
659 static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = {
660 .master = &omap2430_l4_core_hwmod,
661 .slave = &omap2430_timer9_hwmod,
663 .addr = omap2xxx_timer9_addrs,
664 .user = OCP_USER_MPU | OCP_USER_SDMA,
667 /* timer9 slave port */
668 static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = {
669 &omap2430_l4_core__timer9,
673 static struct omap_hwmod omap2430_timer9_hwmod = {
675 .mpu_irqs = omap2_timer9_mpu_irqs,
676 .main_clk = "gpt9_fck",
680 .module_bit = OMAP24XX_EN_GPT9_SHIFT,
681 .module_offs = CORE_MOD,
683 .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT,
686 .slaves = omap2430_timer9_slaves,
687 .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves),
688 .class = &omap2xxx_timer_hwmod_class,
689 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
693 static struct omap_hwmod omap2430_timer10_hwmod;
695 /* l4_core -> timer10 */
696 static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = {
697 .master = &omap2430_l4_core_hwmod,
698 .slave = &omap2430_timer10_hwmod,
700 .addr = omap2_timer10_addrs,
701 .user = OCP_USER_MPU | OCP_USER_SDMA,
704 /* timer10 slave port */
705 static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = {
706 &omap2430_l4_core__timer10,
710 static struct omap_hwmod omap2430_timer10_hwmod = {
712 .mpu_irqs = omap2_timer10_mpu_irqs,
713 .main_clk = "gpt10_fck",
717 .module_bit = OMAP24XX_EN_GPT10_SHIFT,
718 .module_offs = CORE_MOD,
720 .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT,
723 .slaves = omap2430_timer10_slaves,
724 .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves),
725 .class = &omap2xxx_timer_hwmod_class,
726 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
730 static struct omap_hwmod omap2430_timer11_hwmod;
732 /* l4_core -> timer11 */
733 static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = {
734 .master = &omap2430_l4_core_hwmod,
735 .slave = &omap2430_timer11_hwmod,
737 .addr = omap2_timer11_addrs,
738 .user = OCP_USER_MPU | OCP_USER_SDMA,
741 /* timer11 slave port */
742 static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = {
743 &omap2430_l4_core__timer11,
747 static struct omap_hwmod omap2430_timer11_hwmod = {
749 .mpu_irqs = omap2_timer11_mpu_irqs,
750 .main_clk = "gpt11_fck",
754 .module_bit = OMAP24XX_EN_GPT11_SHIFT,
755 .module_offs = CORE_MOD,
757 .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT,
760 .slaves = omap2430_timer11_slaves,
761 .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves),
762 .class = &omap2xxx_timer_hwmod_class,
763 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
767 static struct omap_hwmod omap2430_timer12_hwmod;
769 /* l4_core -> timer12 */
770 static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = {
771 .master = &omap2430_l4_core_hwmod,
772 .slave = &omap2430_timer12_hwmod,
774 .addr = omap2xxx_timer12_addrs,
775 .user = OCP_USER_MPU | OCP_USER_SDMA,
778 /* timer12 slave port */
779 static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = {
780 &omap2430_l4_core__timer12,
784 static struct omap_hwmod omap2430_timer12_hwmod = {
786 .mpu_irqs = omap2xxx_timer12_mpu_irqs,
787 .main_clk = "gpt12_fck",
791 .module_bit = OMAP24XX_EN_GPT12_SHIFT,
792 .module_offs = CORE_MOD,
794 .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT,
797 .slaves = omap2430_timer12_slaves,
798 .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves),
799 .class = &omap2xxx_timer_hwmod_class,
800 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
803 /* l4_wkup -> wd_timer2 */
804 static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = {
806 .pa_start = 0x49016000,
807 .pa_end = 0x4901607f,
808 .flags = ADDR_TYPE_RT
813 static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {
814 .master = &omap2430_l4_wkup_hwmod,
815 .slave = &omap2430_wd_timer2_hwmod,
816 .clk = "mpu_wdt_ick",
817 .addr = omap2430_wd_timer2_addrs,
818 .user = OCP_USER_MPU | OCP_USER_SDMA,
822 static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = {
823 &omap2430_l4_wkup__wd_timer2,
826 static struct omap_hwmod omap2430_wd_timer2_hwmod = {
828 .class = &omap2xxx_wd_timer_hwmod_class,
829 .main_clk = "mpu_wdt_fck",
833 .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT,
834 .module_offs = WKUP_MOD,
836 .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,
839 .slaves = omap2430_wd_timer2_slaves,
840 .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves),
841 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
846 static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
847 &omap2_l4_core__uart1,
850 static struct omap_hwmod omap2430_uart1_hwmod = {
852 .mpu_irqs = omap2_uart1_mpu_irqs,
853 .sdma_reqs = omap2_uart1_sdma_reqs,
854 .main_clk = "uart1_fck",
857 .module_offs = CORE_MOD,
859 .module_bit = OMAP24XX_EN_UART1_SHIFT,
861 .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,
864 .slaves = omap2430_uart1_slaves,
865 .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves),
866 .class = &omap2_uart_class,
867 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
872 static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {
873 &omap2_l4_core__uart2,
876 static struct omap_hwmod omap2430_uart2_hwmod = {
878 .mpu_irqs = omap2_uart2_mpu_irqs,
879 .sdma_reqs = omap2_uart2_sdma_reqs,
880 .main_clk = "uart2_fck",
883 .module_offs = CORE_MOD,
885 .module_bit = OMAP24XX_EN_UART2_SHIFT,
887 .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,
890 .slaves = omap2430_uart2_slaves,
891 .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves),
892 .class = &omap2_uart_class,
893 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
898 static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {
899 &omap2_l4_core__uart3,
902 static struct omap_hwmod omap2430_uart3_hwmod = {
904 .mpu_irqs = omap2_uart3_mpu_irqs,
905 .sdma_reqs = omap2_uart3_sdma_reqs,
906 .main_clk = "uart3_fck",
909 .module_offs = CORE_MOD,
911 .module_bit = OMAP24XX_EN_UART3_SHIFT,
913 .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,
916 .slaves = omap2430_uart3_slaves,
917 .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves),
918 .class = &omap2_uart_class,
919 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
923 /* dss master ports */
924 static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = {
929 static struct omap_hwmod_ocp_if omap2430_l4_core__dss = {
930 .master = &omap2430_l4_core_hwmod,
931 .slave = &omap2430_dss_core_hwmod,
933 .addr = omap2_dss_addrs,
934 .user = OCP_USER_MPU | OCP_USER_SDMA,
937 /* dss slave ports */
938 static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = {
939 &omap2430_l4_core__dss,
942 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
943 { .role = "tv_clk", .clk = "dss_54m_fck" },
944 { .role = "sys_clk", .clk = "dss2_fck" },
947 static struct omap_hwmod omap2430_dss_core_hwmod = {
949 .class = &omap2_dss_hwmod_class,
950 .main_clk = "dss1_fck", /* instead of dss_fck */
951 .sdma_reqs = omap2xxx_dss_sdma_chs,
955 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
956 .module_offs = CORE_MOD,
958 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
961 .opt_clks = dss_opt_clks,
962 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
963 .slaves = omap2430_dss_slaves,
964 .slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves),
965 .masters = omap2430_dss_masters,
966 .masters_cnt = ARRAY_SIZE(omap2430_dss_masters),
967 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
968 .flags = HWMOD_NO_IDLEST,
971 /* l4_core -> dss_dispc */
972 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = {
973 .master = &omap2430_l4_core_hwmod,
974 .slave = &omap2430_dss_dispc_hwmod,
976 .addr = omap2_dss_dispc_addrs,
977 .user = OCP_USER_MPU | OCP_USER_SDMA,
980 /* dss_dispc slave ports */
981 static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = {
982 &omap2430_l4_core__dss_dispc,
985 static struct omap_hwmod omap2430_dss_dispc_hwmod = {
987 .class = &omap2_dispc_hwmod_class,
988 .mpu_irqs = omap2_dispc_irqs,
989 .main_clk = "dss1_fck",
993 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
994 .module_offs = CORE_MOD,
996 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
999 .slaves = omap2430_dss_dispc_slaves,
1000 .slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves),
1001 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1002 .flags = HWMOD_NO_IDLEST,
1005 /* l4_core -> dss_rfbi */
1006 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = {
1007 .master = &omap2430_l4_core_hwmod,
1008 .slave = &omap2430_dss_rfbi_hwmod,
1010 .addr = omap2_dss_rfbi_addrs,
1011 .user = OCP_USER_MPU | OCP_USER_SDMA,
1014 /* dss_rfbi slave ports */
1015 static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
1016 &omap2430_l4_core__dss_rfbi,
1019 static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1021 .class = &omap2_rfbi_hwmod_class,
1022 .main_clk = "dss1_fck",
1026 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
1027 .module_offs = CORE_MOD,
1030 .slaves = omap2430_dss_rfbi_slaves,
1031 .slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
1032 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1033 .flags = HWMOD_NO_IDLEST,
1036 /* l4_core -> dss_venc */
1037 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1038 .master = &omap2430_l4_core_hwmod,
1039 .slave = &omap2430_dss_venc_hwmod,
1040 .clk = "dss_54m_fck",
1041 .addr = omap2_dss_venc_addrs,
1042 .flags = OCPIF_SWSUP_IDLE,
1043 .user = OCP_USER_MPU | OCP_USER_SDMA,
1046 /* dss_venc slave ports */
1047 static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
1048 &omap2430_l4_core__dss_venc,
1051 static struct omap_hwmod omap2430_dss_venc_hwmod = {
1053 .class = &omap2_venc_hwmod_class,
1054 .main_clk = "dss1_fck",
1058 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
1059 .module_offs = CORE_MOD,
1062 .slaves = omap2430_dss_venc_slaves,
1063 .slaves_cnt = ARRAY_SIZE(omap2430_dss_venc_slaves),
1064 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1065 .flags = HWMOD_NO_IDLEST,
1069 static struct omap_hwmod_class_sysconfig i2c_sysc = {
1073 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
1074 SYSS_HAS_RESET_STATUS),
1075 .sysc_fields = &omap_hwmod_sysc_type1,
1078 static struct omap_hwmod_class i2c_class = {
1083 static struct omap_i2c_dev_attr i2c_dev_attr = {
1084 .fifo_depth = 8, /* bytes */
1089 static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {
1090 &omap2430_l4_core__i2c1,
1093 static struct omap_hwmod omap2430_i2c1_hwmod = {
1095 .mpu_irqs = omap2_i2c1_mpu_irqs,
1096 .sdma_reqs = omap2_i2c1_sdma_reqs,
1097 .main_clk = "i2chs1_fck",
1101 * NOTE: The CM_FCLKEN* and CM_ICLKEN* for
1102 * I2CHS IP's do not follow the usual pattern.
1103 * prcm_reg_id alone cannot be used to program
1104 * the iclk and fclk. Needs to be handled using
1105 * additional flags when clk handling is moved
1106 * to hwmod framework.
1108 .module_offs = CORE_MOD,
1110 .module_bit = OMAP2430_EN_I2CHS1_SHIFT,
1112 .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT,
1115 .slaves = omap2430_i2c1_slaves,
1116 .slaves_cnt = ARRAY_SIZE(omap2430_i2c1_slaves),
1117 .class = &i2c_class,
1118 .dev_attr = &i2c_dev_attr,
1119 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1124 static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {
1125 &omap2430_l4_core__i2c2,
1128 static struct omap_hwmod omap2430_i2c2_hwmod = {
1130 .mpu_irqs = omap2_i2c2_mpu_irqs,
1131 .sdma_reqs = omap2_i2c2_sdma_reqs,
1132 .main_clk = "i2chs2_fck",
1135 .module_offs = CORE_MOD,
1137 .module_bit = OMAP2430_EN_I2CHS2_SHIFT,
1139 .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT,
1142 .slaves = omap2430_i2c2_slaves,
1143 .slaves_cnt = ARRAY_SIZE(omap2430_i2c2_slaves),
1144 .class = &i2c_class,
1145 .dev_attr = &i2c_dev_attr,
1146 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1149 /* l4_wkup -> gpio1 */
1150 static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = {
1152 .pa_start = 0x4900C000,
1153 .pa_end = 0x4900C1ff,
1154 .flags = ADDR_TYPE_RT
1159 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = {
1160 .master = &omap2430_l4_wkup_hwmod,
1161 .slave = &omap2430_gpio1_hwmod,
1163 .addr = omap2430_gpio1_addr_space,
1164 .user = OCP_USER_MPU | OCP_USER_SDMA,
1167 /* l4_wkup -> gpio2 */
1168 static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = {
1170 .pa_start = 0x4900E000,
1171 .pa_end = 0x4900E1ff,
1172 .flags = ADDR_TYPE_RT
1177 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = {
1178 .master = &omap2430_l4_wkup_hwmod,
1179 .slave = &omap2430_gpio2_hwmod,
1181 .addr = omap2430_gpio2_addr_space,
1182 .user = OCP_USER_MPU | OCP_USER_SDMA,
1185 /* l4_wkup -> gpio3 */
1186 static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = {
1188 .pa_start = 0x49010000,
1189 .pa_end = 0x490101ff,
1190 .flags = ADDR_TYPE_RT
1195 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = {
1196 .master = &omap2430_l4_wkup_hwmod,
1197 .slave = &omap2430_gpio3_hwmod,
1199 .addr = omap2430_gpio3_addr_space,
1200 .user = OCP_USER_MPU | OCP_USER_SDMA,
1203 /* l4_wkup -> gpio4 */
1204 static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = {
1206 .pa_start = 0x49012000,
1207 .pa_end = 0x490121ff,
1208 .flags = ADDR_TYPE_RT
1213 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = {
1214 .master = &omap2430_l4_wkup_hwmod,
1215 .slave = &omap2430_gpio4_hwmod,
1217 .addr = omap2430_gpio4_addr_space,
1218 .user = OCP_USER_MPU | OCP_USER_SDMA,
1221 /* l4_core -> gpio5 */
1222 static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = {
1224 .pa_start = 0x480B6000,
1225 .pa_end = 0x480B61ff,
1226 .flags = ADDR_TYPE_RT
1231 static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = {
1232 .master = &omap2430_l4_core_hwmod,
1233 .slave = &omap2430_gpio5_hwmod,
1235 .addr = omap2430_gpio5_addr_space,
1236 .user = OCP_USER_MPU | OCP_USER_SDMA,
1240 static struct omap_gpio_dev_attr gpio_dev_attr = {
1246 static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
1247 &omap2430_l4_wkup__gpio1,
1250 static struct omap_hwmod omap2430_gpio1_hwmod = {
1252 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1253 .mpu_irqs = omap2_gpio1_irqs,
1254 .main_clk = "gpios_fck",
1258 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
1259 .module_offs = WKUP_MOD,
1261 .idlest_idle_bit = OMAP24XX_EN_GPIOS_SHIFT,
1264 .slaves = omap2430_gpio1_slaves,
1265 .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves),
1266 .class = &omap2xxx_gpio_hwmod_class,
1267 .dev_attr = &gpio_dev_attr,
1268 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1272 static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = {
1273 &omap2430_l4_wkup__gpio2,
1276 static struct omap_hwmod omap2430_gpio2_hwmod = {
1278 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1279 .mpu_irqs = omap2_gpio2_irqs,
1280 .main_clk = "gpios_fck",
1284 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
1285 .module_offs = WKUP_MOD,
1287 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1290 .slaves = omap2430_gpio2_slaves,
1291 .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves),
1292 .class = &omap2xxx_gpio_hwmod_class,
1293 .dev_attr = &gpio_dev_attr,
1294 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1298 static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = {
1299 &omap2430_l4_wkup__gpio3,
1302 static struct omap_hwmod omap2430_gpio3_hwmod = {
1304 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1305 .mpu_irqs = omap2_gpio3_irqs,
1306 .main_clk = "gpios_fck",
1310 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
1311 .module_offs = WKUP_MOD,
1313 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1316 .slaves = omap2430_gpio3_slaves,
1317 .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves),
1318 .class = &omap2xxx_gpio_hwmod_class,
1319 .dev_attr = &gpio_dev_attr,
1320 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1324 static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = {
1325 &omap2430_l4_wkup__gpio4,
1328 static struct omap_hwmod omap2430_gpio4_hwmod = {
1330 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1331 .mpu_irqs = omap2_gpio4_irqs,
1332 .main_clk = "gpios_fck",
1336 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
1337 .module_offs = WKUP_MOD,
1339 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1342 .slaves = omap2430_gpio4_slaves,
1343 .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves),
1344 .class = &omap2xxx_gpio_hwmod_class,
1345 .dev_attr = &gpio_dev_attr,
1346 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1350 static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = {
1351 { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */
1355 static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = {
1356 &omap2430_l4_core__gpio5,
1359 static struct omap_hwmod omap2430_gpio5_hwmod = {
1361 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1362 .mpu_irqs = omap243x_gpio5_irqs,
1363 .main_clk = "gpio5_fck",
1367 .module_bit = OMAP2430_EN_GPIO5_SHIFT,
1368 .module_offs = CORE_MOD,
1370 .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT,
1373 .slaves = omap2430_gpio5_slaves,
1374 .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves),
1375 .class = &omap2xxx_gpio_hwmod_class,
1376 .dev_attr = &gpio_dev_attr,
1377 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1380 /* dma attributes */
1381 static struct omap_dma_dev_attr dma_dev_attr = {
1382 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
1383 IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
1387 /* dma_system -> L3 */
1388 static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
1389 .master = &omap2430_dma_system_hwmod,
1390 .slave = &omap2430_l3_main_hwmod,
1391 .clk = "core_l3_ck",
1392 .user = OCP_USER_MPU | OCP_USER_SDMA,
1395 /* dma_system master ports */
1396 static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = {
1397 &omap2430_dma_system__l3,
1400 /* l4_core -> dma_system */
1401 static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
1402 .master = &omap2430_l4_core_hwmod,
1403 .slave = &omap2430_dma_system_hwmod,
1405 .addr = omap2_dma_system_addrs,
1406 .user = OCP_USER_MPU | OCP_USER_SDMA,
1409 /* dma_system slave ports */
1410 static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
1411 &omap2430_l4_core__dma_system,
1414 static struct omap_hwmod omap2430_dma_system_hwmod = {
1416 .class = &omap2xxx_dma_hwmod_class,
1417 .mpu_irqs = omap2_dma_system_irqs,
1418 .main_clk = "core_l3_ck",
1419 .slaves = omap2430_dma_system_slaves,
1420 .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves),
1421 .masters = omap2430_dma_system_masters,
1422 .masters_cnt = ARRAY_SIZE(omap2430_dma_system_masters),
1423 .dev_attr = &dma_dev_attr,
1424 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1425 .flags = HWMOD_NO_IDLEST,
1429 static struct omap_hwmod omap2430_mailbox_hwmod;
1430 static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {
1435 /* l4_core -> mailbox */
1436 static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = {
1437 .master = &omap2430_l4_core_hwmod,
1438 .slave = &omap2430_mailbox_hwmod,
1439 .addr = omap2_mailbox_addrs,
1440 .user = OCP_USER_MPU | OCP_USER_SDMA,
1443 /* mailbox slave ports */
1444 static struct omap_hwmod_ocp_if *omap2430_mailbox_slaves[] = {
1445 &omap2430_l4_core__mailbox,
1448 static struct omap_hwmod omap2430_mailbox_hwmod = {
1450 .class = &omap2xxx_mailbox_hwmod_class,
1451 .mpu_irqs = omap2430_mailbox_irqs,
1452 .main_clk = "mailboxes_ick",
1456 .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT,
1457 .module_offs = CORE_MOD,
1459 .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
1462 .slaves = omap2430_mailbox_slaves,
1463 .slaves_cnt = ARRAY_SIZE(omap2430_mailbox_slaves),
1464 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1468 static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = {
1469 &omap2430_l4_core__mcspi1,
1472 static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
1473 .num_chipselect = 4,
1476 static struct omap_hwmod omap2430_mcspi1_hwmod = {
1477 .name = "mcspi1_hwmod",
1478 .mpu_irqs = omap2_mcspi1_mpu_irqs,
1479 .sdma_reqs = omap2_mcspi1_sdma_reqs,
1480 .main_clk = "mcspi1_fck",
1483 .module_offs = CORE_MOD,
1485 .module_bit = OMAP24XX_EN_MCSPI1_SHIFT,
1487 .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT,
1490 .slaves = omap2430_mcspi1_slaves,
1491 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves),
1492 .class = &omap2xxx_mcspi_class,
1493 .dev_attr = &omap_mcspi1_dev_attr,
1494 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1498 static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = {
1499 &omap2430_l4_core__mcspi2,
1502 static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
1503 .num_chipselect = 2,
1506 static struct omap_hwmod omap2430_mcspi2_hwmod = {
1507 .name = "mcspi2_hwmod",
1508 .mpu_irqs = omap2_mcspi2_mpu_irqs,
1509 .sdma_reqs = omap2_mcspi2_sdma_reqs,
1510 .main_clk = "mcspi2_fck",
1513 .module_offs = CORE_MOD,
1515 .module_bit = OMAP24XX_EN_MCSPI2_SHIFT,
1517 .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT,
1520 .slaves = omap2430_mcspi2_slaves,
1521 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves),
1522 .class = &omap2xxx_mcspi_class,
1523 .dev_attr = &omap_mcspi2_dev_attr,
1524 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1528 static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = {
1533 static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = {
1534 { .name = "tx0", .dma_req = 15 }, /* DMA_SPI3_TX0 */
1535 { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */
1536 { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */
1537 { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */
1541 static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = {
1542 &omap2430_l4_core__mcspi3,
1545 static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
1546 .num_chipselect = 2,
1549 static struct omap_hwmod omap2430_mcspi3_hwmod = {
1550 .name = "mcspi3_hwmod",
1551 .mpu_irqs = omap2430_mcspi3_mpu_irqs,
1552 .sdma_reqs = omap2430_mcspi3_sdma_reqs,
1553 .main_clk = "mcspi3_fck",
1556 .module_offs = CORE_MOD,
1558 .module_bit = OMAP2430_EN_MCSPI3_SHIFT,
1560 .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT,
1563 .slaves = omap2430_mcspi3_slaves,
1564 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves),
1565 .class = &omap2xxx_mcspi_class,
1566 .dev_attr = &omap_mcspi3_dev_attr,
1567 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1573 static struct omap_hwmod_class_sysconfig omap2430_usbhsotg_sysc = {
1575 .sysc_offs = 0x0404,
1576 .syss_offs = 0x0408,
1577 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE|
1578 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1580 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1581 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1582 .sysc_fields = &omap_hwmod_sysc_type1,
1585 static struct omap_hwmod_class usbotg_class = {
1587 .sysc = &omap2430_usbhsotg_sysc,
1591 static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = {
1593 { .name = "mc", .irq = 92 },
1594 { .name = "dma", .irq = 93 },
1598 static struct omap_hwmod omap2430_usbhsotg_hwmod = {
1599 .name = "usb_otg_hs",
1600 .mpu_irqs = omap2430_usbhsotg_mpu_irqs,
1601 .main_clk = "usbhs_ick",
1605 .module_bit = OMAP2430_EN_USBHS_MASK,
1606 .module_offs = CORE_MOD,
1608 .idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT,
1611 .masters = omap2430_usbhsotg_masters,
1612 .masters_cnt = ARRAY_SIZE(omap2430_usbhsotg_masters),
1613 .slaves = omap2430_usbhsotg_slaves,
1614 .slaves_cnt = ARRAY_SIZE(omap2430_usbhsotg_slaves),
1615 .class = &usbotg_class,
1617 * Erratum ID: i479 idle_req / idle_ack mechanism potentially
1618 * broken when autoidle is enabled
1619 * workaround is to disable the autoidle bit at module level.
1621 .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE
1622 | HWMOD_SWSUP_MSTANDBY,
1623 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
1628 * multi channel buffered serial port controller
1631 static struct omap_hwmod_class_sysconfig omap2430_mcbsp_sysc = {
1633 .sysc_offs = 0x008C,
1634 .sysc_flags = (SYSC_HAS_SOFTRESET),
1635 .sysc_fields = &omap_hwmod_sysc_type1,
1638 static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = {
1640 .sysc = &omap2430_mcbsp_sysc,
1641 .rev = MCBSP_CONFIG_TYPE2,
1645 static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
1646 { .name = "tx", .irq = 59 },
1647 { .name = "rx", .irq = 60 },
1648 { .name = "ovr", .irq = 61 },
1649 { .name = "common", .irq = 64 },
1653 /* l4_core -> mcbsp1 */
1654 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = {
1655 .master = &omap2430_l4_core_hwmod,
1656 .slave = &omap2430_mcbsp1_hwmod,
1657 .clk = "mcbsp1_ick",
1658 .addr = omap2_mcbsp1_addrs,
1659 .user = OCP_USER_MPU | OCP_USER_SDMA,
1662 /* mcbsp1 slave ports */
1663 static struct omap_hwmod_ocp_if *omap2430_mcbsp1_slaves[] = {
1664 &omap2430_l4_core__mcbsp1,
1667 static struct omap_hwmod omap2430_mcbsp1_hwmod = {
1669 .class = &omap2430_mcbsp_hwmod_class,
1670 .mpu_irqs = omap2430_mcbsp1_irqs,
1671 .sdma_reqs = omap2_mcbsp1_sdma_reqs,
1672 .main_clk = "mcbsp1_fck",
1676 .module_bit = OMAP24XX_EN_MCBSP1_SHIFT,
1677 .module_offs = CORE_MOD,
1679 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
1682 .slaves = omap2430_mcbsp1_slaves,
1683 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp1_slaves),
1684 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1688 static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = {
1689 { .name = "tx", .irq = 62 },
1690 { .name = "rx", .irq = 63 },
1691 { .name = "common", .irq = 16 },
1695 /* l4_core -> mcbsp2 */
1696 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = {
1697 .master = &omap2430_l4_core_hwmod,
1698 .slave = &omap2430_mcbsp2_hwmod,
1699 .clk = "mcbsp2_ick",
1700 .addr = omap2xxx_mcbsp2_addrs,
1701 .user = OCP_USER_MPU | OCP_USER_SDMA,
1704 /* mcbsp2 slave ports */
1705 static struct omap_hwmod_ocp_if *omap2430_mcbsp2_slaves[] = {
1706 &omap2430_l4_core__mcbsp2,
1709 static struct omap_hwmod omap2430_mcbsp2_hwmod = {
1711 .class = &omap2430_mcbsp_hwmod_class,
1712 .mpu_irqs = omap2430_mcbsp2_irqs,
1713 .sdma_reqs = omap2_mcbsp2_sdma_reqs,
1714 .main_clk = "mcbsp2_fck",
1718 .module_bit = OMAP24XX_EN_MCBSP2_SHIFT,
1719 .module_offs = CORE_MOD,
1721 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
1724 .slaves = omap2430_mcbsp2_slaves,
1725 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp2_slaves),
1726 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1730 static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = {
1731 { .name = "tx", .irq = 89 },
1732 { .name = "rx", .irq = 90 },
1733 { .name = "common", .irq = 17 },
1737 static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = {
1740 .pa_start = 0x4808C000,
1741 .pa_end = 0x4808C0ff,
1742 .flags = ADDR_TYPE_RT
1747 /* l4_core -> mcbsp3 */
1748 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = {
1749 .master = &omap2430_l4_core_hwmod,
1750 .slave = &omap2430_mcbsp3_hwmod,
1751 .clk = "mcbsp3_ick",
1752 .addr = omap2430_mcbsp3_addrs,
1753 .user = OCP_USER_MPU | OCP_USER_SDMA,
1756 /* mcbsp3 slave ports */
1757 static struct omap_hwmod_ocp_if *omap2430_mcbsp3_slaves[] = {
1758 &omap2430_l4_core__mcbsp3,
1761 static struct omap_hwmod omap2430_mcbsp3_hwmod = {
1763 .class = &omap2430_mcbsp_hwmod_class,
1764 .mpu_irqs = omap2430_mcbsp3_irqs,
1765 .sdma_reqs = omap2_mcbsp3_sdma_reqs,
1766 .main_clk = "mcbsp3_fck",
1770 .module_bit = OMAP2430_EN_MCBSP3_SHIFT,
1771 .module_offs = CORE_MOD,
1773 .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,
1776 .slaves = omap2430_mcbsp3_slaves,
1777 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp3_slaves),
1778 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1782 static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = {
1783 { .name = "tx", .irq = 54 },
1784 { .name = "rx", .irq = 55 },
1785 { .name = "common", .irq = 18 },
1789 static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = {
1790 { .name = "rx", .dma_req = 20 },
1791 { .name = "tx", .dma_req = 19 },
1795 static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = {
1798 .pa_start = 0x4808E000,
1799 .pa_end = 0x4808E0ff,
1800 .flags = ADDR_TYPE_RT
1805 /* l4_core -> mcbsp4 */
1806 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = {
1807 .master = &omap2430_l4_core_hwmod,
1808 .slave = &omap2430_mcbsp4_hwmod,
1809 .clk = "mcbsp4_ick",
1810 .addr = omap2430_mcbsp4_addrs,
1811 .user = OCP_USER_MPU | OCP_USER_SDMA,
1814 /* mcbsp4 slave ports */
1815 static struct omap_hwmod_ocp_if *omap2430_mcbsp4_slaves[] = {
1816 &omap2430_l4_core__mcbsp4,
1819 static struct omap_hwmod omap2430_mcbsp4_hwmod = {
1821 .class = &omap2430_mcbsp_hwmod_class,
1822 .mpu_irqs = omap2430_mcbsp4_irqs,
1823 .sdma_reqs = omap2430_mcbsp4_sdma_chs,
1824 .main_clk = "mcbsp4_fck",
1828 .module_bit = OMAP2430_EN_MCBSP4_SHIFT,
1829 .module_offs = CORE_MOD,
1831 .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,
1834 .slaves = omap2430_mcbsp4_slaves,
1835 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp4_slaves),
1836 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1840 static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = {
1841 { .name = "tx", .irq = 81 },
1842 { .name = "rx", .irq = 82 },
1843 { .name = "common", .irq = 19 },
1847 static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = {
1848 { .name = "rx", .dma_req = 22 },
1849 { .name = "tx", .dma_req = 21 },
1853 static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = {
1856 .pa_start = 0x48096000,
1857 .pa_end = 0x480960ff,
1858 .flags = ADDR_TYPE_RT
1863 /* l4_core -> mcbsp5 */
1864 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = {
1865 .master = &omap2430_l4_core_hwmod,
1866 .slave = &omap2430_mcbsp5_hwmod,
1867 .clk = "mcbsp5_ick",
1868 .addr = omap2430_mcbsp5_addrs,
1869 .user = OCP_USER_MPU | OCP_USER_SDMA,
1872 /* mcbsp5 slave ports */
1873 static struct omap_hwmod_ocp_if *omap2430_mcbsp5_slaves[] = {
1874 &omap2430_l4_core__mcbsp5,
1877 static struct omap_hwmod omap2430_mcbsp5_hwmod = {
1879 .class = &omap2430_mcbsp_hwmod_class,
1880 .mpu_irqs = omap2430_mcbsp5_irqs,
1881 .sdma_reqs = omap2430_mcbsp5_sdma_chs,
1882 .main_clk = "mcbsp5_fck",
1886 .module_bit = OMAP2430_EN_MCBSP5_SHIFT,
1887 .module_offs = CORE_MOD,
1889 .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,
1892 .slaves = omap2430_mcbsp5_slaves,
1893 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp5_slaves),
1894 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1897 /* MMC/SD/SDIO common */
1899 static struct omap_hwmod_class_sysconfig omap2430_mmc_sysc = {
1903 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
1904 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1905 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1906 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1907 .sysc_fields = &omap_hwmod_sysc_type1,
1910 static struct omap_hwmod_class omap2430_mmc_class = {
1912 .sysc = &omap2430_mmc_sysc,
1917 static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = {
1922 static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = {
1923 { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */
1924 { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */
1928 static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = {
1929 { .role = "dbck", .clk = "mmchsdb1_fck" },
1932 static struct omap_hwmod_ocp_if *omap2430_mmc1_slaves[] = {
1933 &omap2430_l4_core__mmc1,
1936 static struct omap_mmc_dev_attr mmc1_dev_attr = {
1937 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
1940 static struct omap_hwmod omap2430_mmc1_hwmod = {
1942 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1943 .mpu_irqs = omap2430_mmc1_mpu_irqs,
1944 .sdma_reqs = omap2430_mmc1_sdma_reqs,
1945 .opt_clks = omap2430_mmc1_opt_clks,
1946 .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks),
1947 .main_clk = "mmchs1_fck",
1950 .module_offs = CORE_MOD,
1952 .module_bit = OMAP2430_EN_MMCHS1_SHIFT,
1954 .idlest_idle_bit = OMAP2430_ST_MMCHS1_SHIFT,
1957 .dev_attr = &mmc1_dev_attr,
1958 .slaves = omap2430_mmc1_slaves,
1959 .slaves_cnt = ARRAY_SIZE(omap2430_mmc1_slaves),
1960 .class = &omap2430_mmc_class,
1961 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1966 static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = {
1971 static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = {
1972 { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */
1973 { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */
1977 static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = {
1978 { .role = "dbck", .clk = "mmchsdb2_fck" },
1981 static struct omap_hwmod_ocp_if *omap2430_mmc2_slaves[] = {
1982 &omap2430_l4_core__mmc2,
1985 static struct omap_hwmod omap2430_mmc2_hwmod = {
1987 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1988 .mpu_irqs = omap2430_mmc2_mpu_irqs,
1989 .sdma_reqs = omap2430_mmc2_sdma_reqs,
1990 .opt_clks = omap2430_mmc2_opt_clks,
1991 .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks),
1992 .main_clk = "mmchs2_fck",
1995 .module_offs = CORE_MOD,
1997 .module_bit = OMAP2430_EN_MMCHS2_SHIFT,
1999 .idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT,
2002 .slaves = omap2430_mmc2_slaves,
2003 .slaves_cnt = ARRAY_SIZE(omap2430_mmc2_slaves),
2004 .class = &omap2430_mmc_class,
2005 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
2008 static __initdata struct omap_hwmod *omap2430_hwmods[] = {
2009 &omap2430_l3_main_hwmod,
2010 &omap2430_l4_core_hwmod,
2011 &omap2430_l4_wkup_hwmod,
2012 &omap2430_mpu_hwmod,
2013 &omap2430_iva_hwmod,
2015 &omap2430_timer1_hwmod,
2016 &omap2430_timer2_hwmod,
2017 &omap2430_timer3_hwmod,
2018 &omap2430_timer4_hwmod,
2019 &omap2430_timer5_hwmod,
2020 &omap2430_timer6_hwmod,
2021 &omap2430_timer7_hwmod,
2022 &omap2430_timer8_hwmod,
2023 &omap2430_timer9_hwmod,
2024 &omap2430_timer10_hwmod,
2025 &omap2430_timer11_hwmod,
2026 &omap2430_timer12_hwmod,
2028 &omap2430_wd_timer2_hwmod,
2029 &omap2430_uart1_hwmod,
2030 &omap2430_uart2_hwmod,
2031 &omap2430_uart3_hwmod,
2033 &omap2430_dss_core_hwmod,
2034 &omap2430_dss_dispc_hwmod,
2035 &omap2430_dss_rfbi_hwmod,
2036 &omap2430_dss_venc_hwmod,
2038 &omap2430_i2c1_hwmod,
2039 &omap2430_i2c2_hwmod,
2040 &omap2430_mmc1_hwmod,
2041 &omap2430_mmc2_hwmod,
2044 &omap2430_gpio1_hwmod,
2045 &omap2430_gpio2_hwmod,
2046 &omap2430_gpio3_hwmod,
2047 &omap2430_gpio4_hwmod,
2048 &omap2430_gpio5_hwmod,
2050 /* dma_system class*/
2051 &omap2430_dma_system_hwmod,
2054 &omap2430_mcbsp1_hwmod,
2055 &omap2430_mcbsp2_hwmod,
2056 &omap2430_mcbsp3_hwmod,
2057 &omap2430_mcbsp4_hwmod,
2058 &omap2430_mcbsp5_hwmod,
2061 &omap2430_mailbox_hwmod,
2064 &omap2430_mcspi1_hwmod,
2065 &omap2430_mcspi2_hwmod,
2066 &omap2430_mcspi3_hwmod,
2069 &omap2430_usbhsotg_hwmod,
2074 int __init omap2430_hwmod_init(void)
2076 return omap_hwmod_register(omap2430_hwmods);