2 * OMAP4 SMP source file. It contains platform specific fucntions
3 * needed for the linux smp kernel.
5 * Copyright (C) 2009 Texas Instruments, Inc.
8 * Santosh Shilimkar <santosh.shilimkar@ti.com>
10 * Platform file needed for the OMAP4 SMP. This file is based on arm
11 * realview smp platform.
12 * * Copyright (c) 2002 ARM Limited.
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
18 #include <linux/init.h>
19 #include <linux/device.h>
20 #include <linux/smp.h>
23 #include <asm/cacheflush.h>
24 #include <asm/localtimer.h>
25 #include <asm/smp_scu.h>
26 #include <mach/hardware.h>
27 #include <mach/omap4-common.h>
29 /* SCU base address */
30 static void __iomem *scu_base;
32 static DEFINE_SPINLOCK(boot_lock);
34 void __cpuinit platform_secondary_init(unsigned int cpu)
39 * If any interrupts are already enabled for the primary
40 * core (e.g. timer irq), then they will not have been enabled
43 gic_cpu_init(0, gic_cpu_base_addr);
46 * Synchronise with the boot thread.
48 spin_lock(&boot_lock);
49 spin_unlock(&boot_lock);
52 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
55 * Set synchronisation state between this boot processor
56 * and the secondary one
58 spin_lock(&boot_lock);
61 * Update the AuxCoreBoot0 with boot state for secondary core.
62 * omap_secondary_startup() routine will hold the secondary core till
63 * the AuxCoreBoot1 register is updated with cpu state
64 * A barrier is added to ensure that write buffer is drained
66 omap_modify_auxcoreboot0(0x200, 0xfffffdff);
69 smp_cross_call(cpumask_of(cpu), 1);
72 * Now the secondary core is starting up let it run its
73 * calibrations, then wait for it to finish
75 spin_unlock(&boot_lock);
80 static void __init wakeup_secondary(void)
83 * Write the address of secondary startup routine into the
84 * AuxCoreBoot1 where ROM code will jump and start executing
85 * on secondary core once out of WFE
86 * A barrier is added to ensure that write buffer is drained
88 omap_auxcoreboot_addr(virt_to_phys(omap_secondary_startup));
92 * Send a 'sev' to wake the secondary core from WFE.
93 * Drain the outstanding writes to memory
100 * Initialise the CPU possible map early - this describes the CPUs
101 * which may be present or become present in the system.
103 void __init smp_init_cpus(void)
105 unsigned int i, ncores;
108 scu_base = ioremap(OMAP44XX_SCU_BASE, SZ_256);
111 ncores = scu_get_core_count(scu_base);
114 if (ncores > NR_CPUS) {
116 "OMAP4: no. of cores (%d) greater than configured "
117 "maximum of %d - clipping\n",
122 for (i = 0; i < ncores; i++)
123 set_cpu_possible(i, true);
126 void __init smp_prepare_cpus(unsigned int max_cpus)
128 unsigned int ncores = num_possible_cpus();
129 unsigned int cpu = smp_processor_id();
132 smp_store_cpu_info(cpu);
135 * are we trying to boot more cores than exist?
137 if (max_cpus > ncores)
141 * Initialise the present map, which describes the set of CPUs
142 * actually populated at the present time.
144 for (i = 0; i < max_cpus; i++)
145 set_cpu_present(i, true);
149 * Enable the local timer or broadcast device for the
150 * boot CPU, but only if we have more than one CPU.
152 percpu_timer_setup();
155 * Initialise the SCU and wake up the secondary core using
156 * wakeup_secondary().
158 scu_enable(scu_base);