2 * linux/arch/arm/mach-omap2/devices.c
4 * OMAP2 platform device setup/initialization
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
17 #include <linux/clk.h>
19 #include <mach/hardware.h>
20 #include <mach/irqs.h>
21 #include <asm/mach-types.h>
22 #include <asm/mach/map.h>
25 #include <plat/control.h>
27 #include <plat/board.h>
28 #include <mach/gpio.h>
31 #include <plat/mcbsp.h>
35 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
37 static struct resource cam_resources[] = {
39 .start = OMAP24XX_CAMERA_BASE,
40 .end = OMAP24XX_CAMERA_BASE + 0xfff,
41 .flags = IORESOURCE_MEM,
44 .start = INT_24XX_CAM_IRQ,
45 .flags = IORESOURCE_IRQ,
49 static struct platform_device omap_cam_device = {
50 .name = "omap24xxcam",
52 .num_resources = ARRAY_SIZE(cam_resources),
53 .resource = cam_resources,
56 static inline void omap_init_camera(void)
58 platform_device_register(&omap_cam_device);
61 #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
63 static struct resource omap3isp_resources[] = {
65 .start = OMAP3430_ISP_BASE,
66 .end = OMAP3430_ISP_END,
67 .flags = IORESOURCE_MEM,
70 .start = OMAP3430_ISP_CBUFF_BASE,
71 .end = OMAP3430_ISP_CBUFF_END,
72 .flags = IORESOURCE_MEM,
75 .start = OMAP3430_ISP_CCP2_BASE,
76 .end = OMAP3430_ISP_CCP2_END,
77 .flags = IORESOURCE_MEM,
80 .start = OMAP3430_ISP_CCDC_BASE,
81 .end = OMAP3430_ISP_CCDC_END,
82 .flags = IORESOURCE_MEM,
85 .start = OMAP3430_ISP_HIST_BASE,
86 .end = OMAP3430_ISP_HIST_END,
87 .flags = IORESOURCE_MEM,
90 .start = OMAP3430_ISP_H3A_BASE,
91 .end = OMAP3430_ISP_H3A_END,
92 .flags = IORESOURCE_MEM,
95 .start = OMAP3430_ISP_PREV_BASE,
96 .end = OMAP3430_ISP_PREV_END,
97 .flags = IORESOURCE_MEM,
100 .start = OMAP3430_ISP_RESZ_BASE,
101 .end = OMAP3430_ISP_RESZ_END,
102 .flags = IORESOURCE_MEM,
105 .start = OMAP3430_ISP_SBL_BASE,
106 .end = OMAP3430_ISP_SBL_END,
107 .flags = IORESOURCE_MEM,
110 .start = OMAP3430_ISP_CSI2A_BASE,
111 .end = OMAP3430_ISP_CSI2A_END,
112 .flags = IORESOURCE_MEM,
115 .start = OMAP3430_ISP_CSI2PHY_BASE,
116 .end = OMAP3430_ISP_CSI2PHY_END,
117 .flags = IORESOURCE_MEM,
120 .start = INT_34XX_CAM_IRQ,
121 .flags = IORESOURCE_IRQ,
125 static struct platform_device omap3isp_device = {
128 .num_resources = ARRAY_SIZE(omap3isp_resources),
129 .resource = omap3isp_resources,
132 static inline void omap_init_camera(void)
134 platform_device_register(&omap3isp_device);
137 static inline void omap_init_camera(void)
142 #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
144 #define MBOX_REG_SIZE 0x120
146 #ifdef CONFIG_ARCH_OMAP2
147 static struct resource omap2_mbox_resources[] = {
149 .start = OMAP24XX_MAILBOX_BASE,
150 .end = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
151 .flags = IORESOURCE_MEM,
154 .start = INT_24XX_MAIL_U0_MPU,
155 .flags = IORESOURCE_IRQ,
159 .start = INT_24XX_MAIL_U3_MPU,
160 .flags = IORESOURCE_IRQ,
164 static int omap2_mbox_resources_sz = ARRAY_SIZE(omap2_mbox_resources);
166 #define omap2_mbox_resources NULL
167 #define omap2_mbox_resources_sz 0
170 #ifdef CONFIG_ARCH_OMAP3
171 static struct resource omap3_mbox_resources[] = {
173 .start = OMAP34XX_MAILBOX_BASE,
174 .end = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
175 .flags = IORESOURCE_MEM,
178 .start = INT_24XX_MAIL_U0_MPU,
179 .flags = IORESOURCE_IRQ,
183 static int omap3_mbox_resources_sz = ARRAY_SIZE(omap3_mbox_resources);
185 #define omap3_mbox_resources NULL
186 #define omap3_mbox_resources_sz 0
189 #ifdef CONFIG_ARCH_OMAP4
191 #define OMAP4_MBOX_REG_SIZE 0x130
192 static struct resource omap4_mbox_resources[] = {
194 .start = OMAP44XX_MAILBOX_BASE,
195 .end = OMAP44XX_MAILBOX_BASE +
196 OMAP4_MBOX_REG_SIZE - 1,
197 .flags = IORESOURCE_MEM,
200 .start = OMAP44XX_IRQ_MAIL_U0,
201 .flags = IORESOURCE_IRQ,
205 static int omap4_mbox_resources_sz = ARRAY_SIZE(omap4_mbox_resources);
207 #define omap4_mbox_resources NULL
208 #define omap4_mbox_resources_sz 0
211 static struct platform_device mbox_device = {
212 .name = "omap-mailbox",
216 static inline void omap_init_mbox(void)
218 if (cpu_is_omap24xx()) {
219 mbox_device.resource = omap2_mbox_resources;
220 mbox_device.num_resources = omap2_mbox_resources_sz;
221 } else if (cpu_is_omap34xx()) {
222 mbox_device.resource = omap3_mbox_resources;
223 mbox_device.num_resources = omap3_mbox_resources_sz;
224 } else if (cpu_is_omap44xx()) {
225 mbox_device.resource = omap4_mbox_resources;
226 mbox_device.num_resources = omap4_mbox_resources_sz;
228 pr_err("%s: platform not supported\n", __func__);
231 platform_device_register(&mbox_device);
234 static inline void omap_init_mbox(void) { }
235 #endif /* CONFIG_OMAP_MBOX_FWK */
237 static inline void omap_init_sti(void) {}
239 #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
241 static struct platform_device omap_pcm = {
242 .name = "omap-pcm-audio",
247 * OMAP2420 has 2 McBSP ports
248 * OMAP2430 has 5 McBSP ports
249 * OMAP3 has 5 McBSP ports
250 * OMAP4 has 4 McBSP ports
252 OMAP_MCBSP_PLATFORM_DEVICE(1);
253 OMAP_MCBSP_PLATFORM_DEVICE(2);
254 OMAP_MCBSP_PLATFORM_DEVICE(3);
255 OMAP_MCBSP_PLATFORM_DEVICE(4);
256 OMAP_MCBSP_PLATFORM_DEVICE(5);
258 static void omap_init_audio(void)
260 platform_device_register(&omap_mcbsp1);
261 platform_device_register(&omap_mcbsp2);
262 if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
263 platform_device_register(&omap_mcbsp3);
264 platform_device_register(&omap_mcbsp4);
266 if (cpu_is_omap243x() || cpu_is_omap34xx())
267 platform_device_register(&omap_mcbsp5);
269 platform_device_register(&omap_pcm);
273 static inline void omap_init_audio(void) {}
276 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
278 #include <plat/mcspi.h>
280 #define OMAP2_MCSPI1_BASE 0x48098000
281 #define OMAP2_MCSPI2_BASE 0x4809a000
282 #define OMAP2_MCSPI3_BASE 0x480b8000
283 #define OMAP2_MCSPI4_BASE 0x480ba000
285 #define OMAP4_MCSPI1_BASE 0x48098100
286 #define OMAP4_MCSPI2_BASE 0x4809a100
287 #define OMAP4_MCSPI3_BASE 0x480b8100
288 #define OMAP4_MCSPI4_BASE 0x480ba100
290 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
294 static struct resource omap2_mcspi1_resources[] = {
296 .start = OMAP2_MCSPI1_BASE,
297 .end = OMAP2_MCSPI1_BASE + 0xff,
298 .flags = IORESOURCE_MEM,
302 static struct platform_device omap2_mcspi1 = {
303 .name = "omap2_mcspi",
305 .num_resources = ARRAY_SIZE(omap2_mcspi1_resources),
306 .resource = omap2_mcspi1_resources,
308 .platform_data = &omap2_mcspi1_config,
312 static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
316 static struct resource omap2_mcspi2_resources[] = {
318 .start = OMAP2_MCSPI2_BASE,
319 .end = OMAP2_MCSPI2_BASE + 0xff,
320 .flags = IORESOURCE_MEM,
324 static struct platform_device omap2_mcspi2 = {
325 .name = "omap2_mcspi",
327 .num_resources = ARRAY_SIZE(omap2_mcspi2_resources),
328 .resource = omap2_mcspi2_resources,
330 .platform_data = &omap2_mcspi2_config,
334 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
335 defined(CONFIG_ARCH_OMAP4)
336 static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
340 static struct resource omap2_mcspi3_resources[] = {
342 .start = OMAP2_MCSPI3_BASE,
343 .end = OMAP2_MCSPI3_BASE + 0xff,
344 .flags = IORESOURCE_MEM,
348 static struct platform_device omap2_mcspi3 = {
349 .name = "omap2_mcspi",
351 .num_resources = ARRAY_SIZE(omap2_mcspi3_resources),
352 .resource = omap2_mcspi3_resources,
354 .platform_data = &omap2_mcspi3_config,
359 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
360 static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
364 static struct resource omap2_mcspi4_resources[] = {
366 .start = OMAP2_MCSPI4_BASE,
367 .end = OMAP2_MCSPI4_BASE + 0xff,
368 .flags = IORESOURCE_MEM,
372 static struct platform_device omap2_mcspi4 = {
373 .name = "omap2_mcspi",
375 .num_resources = ARRAY_SIZE(omap2_mcspi4_resources),
376 .resource = omap2_mcspi4_resources,
378 .platform_data = &omap2_mcspi4_config,
383 #ifdef CONFIG_ARCH_OMAP4
384 static inline void omap4_mcspi_fixup(void)
386 omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE;
387 omap2_mcspi1_resources[0].end = OMAP4_MCSPI1_BASE + 0xff;
388 omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE;
389 omap2_mcspi2_resources[0].end = OMAP4_MCSPI2_BASE + 0xff;
390 omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE;
391 omap2_mcspi3_resources[0].end = OMAP4_MCSPI3_BASE + 0xff;
392 omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE;
393 omap2_mcspi4_resources[0].end = OMAP4_MCSPI4_BASE + 0xff;
396 static inline void omap4_mcspi_fixup(void)
401 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
402 defined(CONFIG_ARCH_OMAP4)
403 static inline void omap2_mcspi3_init(void)
405 platform_device_register(&omap2_mcspi3);
408 static inline void omap2_mcspi3_init(void)
413 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
414 static inline void omap2_mcspi4_init(void)
416 platform_device_register(&omap2_mcspi4);
419 static inline void omap2_mcspi4_init(void)
424 static void omap_init_mcspi(void)
426 if (cpu_is_omap44xx())
429 platform_device_register(&omap2_mcspi1);
430 platform_device_register(&omap2_mcspi2);
432 if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx())
435 if (cpu_is_omap343x() || cpu_is_omap44xx())
440 static inline void omap_init_mcspi(void) {}
443 static struct resource omap2_pmu_resource = {
446 .flags = IORESOURCE_IRQ,
449 static struct resource omap3_pmu_resource = {
450 .start = INT_34XX_BENCH_MPU_EMUL,
451 .end = INT_34XX_BENCH_MPU_EMUL,
452 .flags = IORESOURCE_IRQ,
455 static struct platform_device omap_pmu_device = {
457 .id = ARM_PMU_DEVICE_CPU,
461 static void omap_init_pmu(void)
463 if (cpu_is_omap24xx())
464 omap_pmu_device.resource = &omap2_pmu_resource;
465 else if (cpu_is_omap34xx())
466 omap_pmu_device.resource = &omap3_pmu_resource;
470 platform_device_register(&omap_pmu_device);
474 #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
476 #ifdef CONFIG_ARCH_OMAP2
477 static struct resource omap2_sham_resources[] = {
479 .start = OMAP24XX_SEC_SHA1MD5_BASE,
480 .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
481 .flags = IORESOURCE_MEM,
484 .start = INT_24XX_SHA1MD5,
485 .flags = IORESOURCE_IRQ,
488 static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
490 #define omap2_sham_resources NULL
491 #define omap2_sham_resources_sz 0
494 #ifdef CONFIG_ARCH_OMAP3
495 static struct resource omap3_sham_resources[] = {
497 .start = OMAP34XX_SEC_SHA1MD5_BASE,
498 .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
499 .flags = IORESOURCE_MEM,
502 .start = INT_34XX_SHA1MD52_IRQ,
503 .flags = IORESOURCE_IRQ,
506 .start = OMAP34XX_DMA_SHA1MD5_RX,
507 .flags = IORESOURCE_DMA,
510 static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
512 #define omap3_sham_resources NULL
513 #define omap3_sham_resources_sz 0
516 static struct platform_device sham_device = {
521 static void omap_init_sham(void)
523 if (cpu_is_omap24xx()) {
524 sham_device.resource = omap2_sham_resources;
525 sham_device.num_resources = omap2_sham_resources_sz;
526 } else if (cpu_is_omap34xx()) {
527 sham_device.resource = omap3_sham_resources;
528 sham_device.num_resources = omap3_sham_resources_sz;
530 pr_err("%s: platform not supported\n", __func__);
533 platform_device_register(&sham_device);
536 static inline void omap_init_sham(void) { }
539 /*-------------------------------------------------------------------------*/
541 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
543 #define MMCHS_SYSCONFIG 0x0010
544 #define MMCHS_SYSCONFIG_SWRESET (1 << 1)
545 #define MMCHS_SYSSTATUS 0x0014
546 #define MMCHS_SYSSTATUS_RESETDONE (1 << 0)
548 static struct platform_device dummy_pdev = {
550 .bus = &platform_bus_type,
555 * omap_hsmmc_reset() - Full reset of each HS-MMC controller
557 * Ensure that each MMC controller is fully reset. Controllers
558 * left in an unknown state (by bootloader) may prevent retention
559 * or OFF-mode. This is especially important in cases where the
560 * MMC driver is not enabled, _or_ built as a module.
562 * In order for reset to work, interface, functional and debounce
563 * clocks must be enabled. The debounce clock comes from func_32k_clk
564 * and is not under SW control, so we only enable i- and f-clocks.
566 static void __init omap_hsmmc_reset(void)
568 u32 i, nr_controllers;
570 if (cpu_is_omap242x())
573 nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC :
574 (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC);
576 for (i = 0; i < nr_controllers; i++) {
578 struct clk *iclk, *fclk;
579 struct device *dev = &dummy_pdev.dev;
583 base = OMAP2_MMC1_BASE;
586 base = OMAP2_MMC2_BASE;
589 base = OMAP3_MMC3_BASE;
592 if (!cpu_is_omap44xx())
594 base = OMAP4_MMC4_BASE;
597 if (!cpu_is_omap44xx())
599 base = OMAP4_MMC5_BASE;
603 if (cpu_is_omap44xx())
604 base += OMAP4_MMC_REG_OFFSET;
607 dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
608 iclk = clk_get(dev, "ick");
609 if (iclk && clk_enable(iclk))
612 fclk = clk_get(dev, "fck");
613 if (fclk && clk_enable(fclk))
616 if (!iclk || !fclk) {
618 "%s: Unable to enable clocks for MMC%d, "
619 "cannot reset.\n", __func__, i);
623 omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
624 v = omap_readl(base + MMCHS_SYSSTATUS);
625 while (!(omap_readl(base + MMCHS_SYSSTATUS) &
626 MMCHS_SYSSTATUS_RESETDONE))
640 static inline void omap_hsmmc_reset(void) {}
643 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
644 defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
646 static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
649 if ((mmc_controller->slots[0].switch_pin > 0) && \
650 (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
651 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
652 OMAP_PIN_INPUT_PULLUP);
653 if ((mmc_controller->slots[0].gpio_wp > 0) && \
654 (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
655 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
656 OMAP_PIN_INPUT_PULLUP);
658 if (cpu_is_omap2420() && controller_nr == 0) {
659 omap_mux_init_signal("sdmmc_cmd", 0);
660 omap_mux_init_signal("sdmmc_clki", 0);
661 omap_mux_init_signal("sdmmc_clko", 0);
662 omap_mux_init_signal("sdmmc_dat0", 0);
663 omap_mux_init_signal("sdmmc_dat_dir0", 0);
664 omap_mux_init_signal("sdmmc_cmd_dir", 0);
665 if (mmc_controller->slots[0].wires == 4) {
666 omap_mux_init_signal("sdmmc_dat1", 0);
667 omap_mux_init_signal("sdmmc_dat2", 0);
668 omap_mux_init_signal("sdmmc_dat3", 0);
669 omap_mux_init_signal("sdmmc_dat_dir1", 0);
670 omap_mux_init_signal("sdmmc_dat_dir2", 0);
671 omap_mux_init_signal("sdmmc_dat_dir3", 0);
675 * Use internal loop-back in MMC/SDIO Module Input Clock
678 if (mmc_controller->slots[0].internal_clock) {
679 u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
681 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
685 if (cpu_is_omap34xx()) {
686 if (controller_nr == 0) {
687 omap_mux_init_signal("sdmmc1_clk",
688 OMAP_PIN_INPUT_PULLUP);
689 omap_mux_init_signal("sdmmc1_cmd",
690 OMAP_PIN_INPUT_PULLUP);
691 omap_mux_init_signal("sdmmc1_dat0",
692 OMAP_PIN_INPUT_PULLUP);
693 if (mmc_controller->slots[0].wires == 4 ||
694 mmc_controller->slots[0].wires == 8) {
695 omap_mux_init_signal("sdmmc1_dat1",
696 OMAP_PIN_INPUT_PULLUP);
697 omap_mux_init_signal("sdmmc1_dat2",
698 OMAP_PIN_INPUT_PULLUP);
699 omap_mux_init_signal("sdmmc1_dat3",
700 OMAP_PIN_INPUT_PULLUP);
702 if (mmc_controller->slots[0].wires == 8) {
703 omap_mux_init_signal("sdmmc1_dat4",
704 OMAP_PIN_INPUT_PULLUP);
705 omap_mux_init_signal("sdmmc1_dat5",
706 OMAP_PIN_INPUT_PULLUP);
707 omap_mux_init_signal("sdmmc1_dat6",
708 OMAP_PIN_INPUT_PULLUP);
709 omap_mux_init_signal("sdmmc1_dat7",
710 OMAP_PIN_INPUT_PULLUP);
713 if (controller_nr == 1) {
715 omap_mux_init_signal("sdmmc2_clk",
716 OMAP_PIN_INPUT_PULLUP);
717 omap_mux_init_signal("sdmmc2_cmd",
718 OMAP_PIN_INPUT_PULLUP);
719 omap_mux_init_signal("sdmmc2_dat0",
720 OMAP_PIN_INPUT_PULLUP);
723 * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
724 * in the board-*.c files
726 if (mmc_controller->slots[0].wires == 4 ||
727 mmc_controller->slots[0].wires == 8) {
728 omap_mux_init_signal("sdmmc2_dat1",
729 OMAP_PIN_INPUT_PULLUP);
730 omap_mux_init_signal("sdmmc2_dat2",
731 OMAP_PIN_INPUT_PULLUP);
732 omap_mux_init_signal("sdmmc2_dat3",
733 OMAP_PIN_INPUT_PULLUP);
735 if (mmc_controller->slots[0].wires == 8) {
736 omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4",
737 OMAP_PIN_INPUT_PULLUP);
738 omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5",
739 OMAP_PIN_INPUT_PULLUP);
740 omap_mux_init_signal("sdmmc2_dat6.sdmmc2_dat6",
741 OMAP_PIN_INPUT_PULLUP);
742 omap_mux_init_signal("sdmmc2_dat7.sdmmc2_dat7",
743 OMAP_PIN_INPUT_PULLUP);
748 * For MMC3 the pins need to be muxed in the board-*.c files
753 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
759 for (i = 0; i < nr_controllers; i++) {
760 unsigned long base, size;
761 unsigned int irq = 0;
766 omap2_mmc_mux(mmc_data[i], i);
770 base = OMAP2_MMC1_BASE;
771 irq = INT_24XX_MMC_IRQ;
774 base = OMAP2_MMC2_BASE;
775 irq = INT_24XX_MMC2_IRQ;
778 if (!cpu_is_omap44xx() && !cpu_is_omap34xx())
780 base = OMAP3_MMC3_BASE;
781 irq = INT_34XX_MMC3_IRQ;
784 if (!cpu_is_omap44xx())
786 base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET;
787 irq = OMAP44XX_IRQ_MMC4;
790 if (!cpu_is_omap44xx())
792 base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET;
793 irq = OMAP44XX_IRQ_MMC5;
799 if (cpu_is_omap2420()) {
800 size = OMAP2420_MMC_SIZE;
802 } else if (cpu_is_omap44xx()) {
804 base += OMAP4_MMC_REG_OFFSET;
805 irq += OMAP44XX_IRQ_GIC_START;
807 size = OMAP4_HSMMC_SIZE;
808 name = "mmci-omap-hs";
810 size = OMAP3_HSMMC_SIZE;
811 name = "mmci-omap-hs";
813 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
819 /*-------------------------------------------------------------------------*/
821 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
822 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
823 #define OMAP_HDQ_BASE 0x480B2000
825 static struct resource omap_hdq_resources[] = {
827 .start = OMAP_HDQ_BASE,
828 .end = OMAP_HDQ_BASE + 0x1C,
829 .flags = IORESOURCE_MEM,
832 .start = INT_24XX_HDQ_IRQ,
833 .flags = IORESOURCE_IRQ,
836 static struct platform_device omap_hdq_dev = {
840 .platform_data = NULL,
842 .num_resources = ARRAY_SIZE(omap_hdq_resources),
843 .resource = omap_hdq_resources,
845 static inline void omap_hdq_init(void)
847 (void) platform_device_register(&omap_hdq_dev);
850 static inline void omap_hdq_init(void) {}
853 /*---------------------------------------------------------------------------*/
855 #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
856 defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
857 #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
858 static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
861 static struct resource omap_vout_resource[2] = {
865 static struct platform_device omap_vout_device = {
867 .num_resources = ARRAY_SIZE(omap_vout_resource),
868 .resource = &omap_vout_resource[0],
871 static void omap_init_vout(void)
873 if (platform_device_register(&omap_vout_device) < 0)
874 printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
877 static inline void omap_init_vout(void) {}
880 /*-------------------------------------------------------------------------*/
882 static int __init omap2_init_devices(void)
884 /* please keep these calls, and their implementations above,
885 * in alphabetical order so they're easier to sort through.
900 arch_initcall(omap2_init_devices);