2 * OMAP2/3 CM module functions
4 * Copyright (C) 2009 Nokia Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/delay.h>
15 #include <linux/spinlock.h>
16 #include <linux/list.h>
17 #include <linux/errno.h>
18 #include <linux/err.h>
21 #include <plat/common.h>
24 #include "cm2xxx_3xxx.h"
25 #include "cm-regbits-24xx.h"
26 #include "cm-regbits-34xx.h"
28 static const u8 cm_idlest_offs[] = {
29 CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3
32 u32 omap2_cm_read_mod_reg(s16 module, u16 idx)
34 return __raw_readl(cm_base + module + idx);
37 void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx)
39 __raw_writel(val, cm_base + module + idx);
42 /* Read-modify-write a register in a CM module. Caller must lock */
43 u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx)
47 v = omap2_cm_read_mod_reg(module, idx);
50 omap2_cm_write_mod_reg(v, module, idx);
55 u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
57 return omap2_cm_rmw_mod_reg_bits(bits, bits, module, idx);
60 u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
62 return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx);
66 * omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby
67 * @prcm_mod: PRCM module offset
68 * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
69 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
73 int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
79 if (!idlest_id || (idlest_id > ARRAY_SIZE(cm_idlest_offs)))
82 cm_idlest_reg = cm_idlest_offs[idlest_id - 1];
84 mask = 1 << idlest_shift;
86 if (cpu_is_omap24xx())
88 else if (cpu_is_omap34xx())
93 omap_test_timeout(((omap2_cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) == ena),
94 MAX_MODULE_READY_TIME, i);
96 return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
100 * Context save/restore code - OMAP3 only
102 #ifdef CONFIG_ARCH_OMAP3
103 struct omap3_cm_regs {
112 u32 emu_cm_clkstctrl;
113 u32 pll_cm_autoidle2;
119 u32 iva2_cm_clken_pll;
127 u32 usbhost_cm_fclken;
136 u32 usbhost_cm_iclken;
137 u32 iva2_cm_autoidle2;
138 u32 mpu_cm_autoidle2;
139 u32 iva2_cm_clkstctrl;
140 u32 mpu_cm_clkstctrl;
141 u32 core_cm_clkstctrl;
142 u32 sgx_cm_clkstctrl;
143 u32 dss_cm_clkstctrl;
144 u32 cam_cm_clkstctrl;
145 u32 per_cm_clkstctrl;
146 u32 neon_cm_clkstctrl;
147 u32 usbhost_cm_clkstctrl;
148 u32 core_cm_autoidle1;
149 u32 core_cm_autoidle2;
150 u32 core_cm_autoidle3;
151 u32 wkup_cm_autoidle;
155 u32 usbhost_cm_autoidle;
160 u32 usbhost_cm_sleepdep;
164 static struct omap3_cm_regs cm_context;
166 void omap3_cm_save_context(void)
168 cm_context.iva2_cm_clksel1 =
169 omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1);
170 cm_context.iva2_cm_clksel2 =
171 omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2);
172 cm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG);
173 cm_context.sgx_cm_clksel =
174 omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL);
175 cm_context.dss_cm_clksel =
176 omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL);
177 cm_context.cam_cm_clksel =
178 omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSEL);
179 cm_context.per_cm_clksel =
180 omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSEL);
181 cm_context.emu_cm_clksel =
182 omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1);
183 cm_context.emu_cm_clkstctrl =
184 omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL);
185 cm_context.pll_cm_autoidle2 =
186 omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);
187 cm_context.pll_cm_clksel4 =
188 omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4);
189 cm_context.pll_cm_clksel5 =
190 omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5);
191 cm_context.pll_cm_clken2 =
192 omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2);
193 cm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL);
194 cm_context.iva2_cm_fclken =
195 omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_FCLKEN);
196 cm_context.iva2_cm_clken_pll =
197 omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKEN_PLL);
198 cm_context.core_cm_fclken1 =
199 omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
200 cm_context.core_cm_fclken3 =
201 omap2_cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
202 cm_context.sgx_cm_fclken =
203 omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_FCLKEN);
204 cm_context.wkup_cm_fclken =
205 omap2_cm_read_mod_reg(WKUP_MOD, CM_FCLKEN);
206 cm_context.dss_cm_fclken =
207 omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, CM_FCLKEN);
208 cm_context.cam_cm_fclken =
209 omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, CM_FCLKEN);
210 cm_context.per_cm_fclken =
211 omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN);
212 cm_context.usbhost_cm_fclken =
213 omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN);
214 cm_context.core_cm_iclken1 =
215 omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN1);
216 cm_context.core_cm_iclken2 =
217 omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN2);
218 cm_context.core_cm_iclken3 =
219 omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN3);
220 cm_context.sgx_cm_iclken =
221 omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_ICLKEN);
222 cm_context.wkup_cm_iclken =
223 omap2_cm_read_mod_reg(WKUP_MOD, CM_ICLKEN);
224 cm_context.dss_cm_iclken =
225 omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, CM_ICLKEN);
226 cm_context.cam_cm_iclken =
227 omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, CM_ICLKEN);
228 cm_context.per_cm_iclken =
229 omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN);
230 cm_context.usbhost_cm_iclken =
231 omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN);
232 cm_context.iva2_cm_autoidle2 =
233 omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2);
234 cm_context.mpu_cm_autoidle2 =
235 omap2_cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2);
236 cm_context.iva2_cm_clkstctrl =
237 omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP2_CM_CLKSTCTRL);
238 cm_context.mpu_cm_clkstctrl =
239 omap2_cm_read_mod_reg(MPU_MOD, OMAP2_CM_CLKSTCTRL);
240 cm_context.core_cm_clkstctrl =
241 omap2_cm_read_mod_reg(CORE_MOD, OMAP2_CM_CLKSTCTRL);
242 cm_context.sgx_cm_clkstctrl =
243 omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP2_CM_CLKSTCTRL);
244 cm_context.dss_cm_clkstctrl =
245 omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP2_CM_CLKSTCTRL);
246 cm_context.cam_cm_clkstctrl =
247 omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP2_CM_CLKSTCTRL);
248 cm_context.per_cm_clkstctrl =
249 omap2_cm_read_mod_reg(OMAP3430_PER_MOD, OMAP2_CM_CLKSTCTRL);
250 cm_context.neon_cm_clkstctrl =
251 omap2_cm_read_mod_reg(OMAP3430_NEON_MOD, OMAP2_CM_CLKSTCTRL);
252 cm_context.usbhost_cm_clkstctrl =
253 omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
255 cm_context.core_cm_autoidle1 =
256 omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE1);
257 cm_context.core_cm_autoidle2 =
258 omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE2);
259 cm_context.core_cm_autoidle3 =
260 omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE3);
261 cm_context.wkup_cm_autoidle =
262 omap2_cm_read_mod_reg(WKUP_MOD, CM_AUTOIDLE);
263 cm_context.dss_cm_autoidle =
264 omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, CM_AUTOIDLE);
265 cm_context.cam_cm_autoidle =
266 omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, CM_AUTOIDLE);
267 cm_context.per_cm_autoidle =
268 omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
269 cm_context.usbhost_cm_autoidle =
270 omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE);
271 cm_context.sgx_cm_sleepdep =
272 omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD,
273 OMAP3430_CM_SLEEPDEP);
274 cm_context.dss_cm_sleepdep =
275 omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP3430_CM_SLEEPDEP);
276 cm_context.cam_cm_sleepdep =
277 omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP3430_CM_SLEEPDEP);
278 cm_context.per_cm_sleepdep =
279 omap2_cm_read_mod_reg(OMAP3430_PER_MOD, OMAP3430_CM_SLEEPDEP);
280 cm_context.usbhost_cm_sleepdep =
281 omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
282 OMAP3430_CM_SLEEPDEP);
283 cm_context.cm_clkout_ctrl =
284 omap2_cm_read_mod_reg(OMAP3430_CCR_MOD,
285 OMAP3_CM_CLKOUT_CTRL_OFFSET);
288 void omap3_cm_restore_context(void)
290 omap2_cm_write_mod_reg(cm_context.iva2_cm_clksel1, OMAP3430_IVA2_MOD,
292 omap2_cm_write_mod_reg(cm_context.iva2_cm_clksel2, OMAP3430_IVA2_MOD,
294 __raw_writel(cm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG);
295 omap2_cm_write_mod_reg(cm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD,
297 omap2_cm_write_mod_reg(cm_context.dss_cm_clksel, OMAP3430_DSS_MOD,
299 omap2_cm_write_mod_reg(cm_context.cam_cm_clksel, OMAP3430_CAM_MOD,
301 omap2_cm_write_mod_reg(cm_context.per_cm_clksel, OMAP3430_PER_MOD,
303 omap2_cm_write_mod_reg(cm_context.emu_cm_clksel, OMAP3430_EMU_MOD,
305 omap2_cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD,
307 omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD,
309 omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD,
310 OMAP3430ES2_CM_CLKSEL4);
311 omap2_cm_write_mod_reg(cm_context.pll_cm_clksel5, PLL_MOD,
312 OMAP3430ES2_CM_CLKSEL5);
313 omap2_cm_write_mod_reg(cm_context.pll_cm_clken2, PLL_MOD,
314 OMAP3430ES2_CM_CLKEN2);
315 __raw_writel(cm_context.cm_polctrl, OMAP3430_CM_POLCTRL);
316 omap2_cm_write_mod_reg(cm_context.iva2_cm_fclken, OMAP3430_IVA2_MOD,
318 omap2_cm_write_mod_reg(cm_context.iva2_cm_clken_pll, OMAP3430_IVA2_MOD,
319 OMAP3430_CM_CLKEN_PLL);
320 omap2_cm_write_mod_reg(cm_context.core_cm_fclken1, CORE_MOD,
322 omap2_cm_write_mod_reg(cm_context.core_cm_fclken3, CORE_MOD,
323 OMAP3430ES2_CM_FCLKEN3);
324 omap2_cm_write_mod_reg(cm_context.sgx_cm_fclken, OMAP3430ES2_SGX_MOD,
326 omap2_cm_write_mod_reg(cm_context.wkup_cm_fclken, WKUP_MOD, CM_FCLKEN);
327 omap2_cm_write_mod_reg(cm_context.dss_cm_fclken, OMAP3430_DSS_MOD,
329 omap2_cm_write_mod_reg(cm_context.cam_cm_fclken, OMAP3430_CAM_MOD,
331 omap2_cm_write_mod_reg(cm_context.per_cm_fclken, OMAP3430_PER_MOD,
333 omap2_cm_write_mod_reg(cm_context.usbhost_cm_fclken,
334 OMAP3430ES2_USBHOST_MOD, CM_FCLKEN);
335 omap2_cm_write_mod_reg(cm_context.core_cm_iclken1, CORE_MOD,
337 omap2_cm_write_mod_reg(cm_context.core_cm_iclken2, CORE_MOD,
339 omap2_cm_write_mod_reg(cm_context.core_cm_iclken3, CORE_MOD,
341 omap2_cm_write_mod_reg(cm_context.sgx_cm_iclken, OMAP3430ES2_SGX_MOD,
343 omap2_cm_write_mod_reg(cm_context.wkup_cm_iclken, WKUP_MOD, CM_ICLKEN);
344 omap2_cm_write_mod_reg(cm_context.dss_cm_iclken, OMAP3430_DSS_MOD,
346 omap2_cm_write_mod_reg(cm_context.cam_cm_iclken, OMAP3430_CAM_MOD,
348 omap2_cm_write_mod_reg(cm_context.per_cm_iclken, OMAP3430_PER_MOD,
350 omap2_cm_write_mod_reg(cm_context.usbhost_cm_iclken,
351 OMAP3430ES2_USBHOST_MOD, CM_ICLKEN);
352 omap2_cm_write_mod_reg(cm_context.iva2_cm_autoidle2, OMAP3430_IVA2_MOD,
354 omap2_cm_write_mod_reg(cm_context.mpu_cm_autoidle2, MPU_MOD,
356 omap2_cm_write_mod_reg(cm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD,
358 omap2_cm_write_mod_reg(cm_context.mpu_cm_clkstctrl, MPU_MOD,
360 omap2_cm_write_mod_reg(cm_context.core_cm_clkstctrl, CORE_MOD,
362 omap2_cm_write_mod_reg(cm_context.sgx_cm_clkstctrl, OMAP3430ES2_SGX_MOD,
364 omap2_cm_write_mod_reg(cm_context.dss_cm_clkstctrl, OMAP3430_DSS_MOD,
366 omap2_cm_write_mod_reg(cm_context.cam_cm_clkstctrl, OMAP3430_CAM_MOD,
368 omap2_cm_write_mod_reg(cm_context.per_cm_clkstctrl, OMAP3430_PER_MOD,
370 omap2_cm_write_mod_reg(cm_context.neon_cm_clkstctrl, OMAP3430_NEON_MOD,
372 omap2_cm_write_mod_reg(cm_context.usbhost_cm_clkstctrl,
373 OMAP3430ES2_USBHOST_MOD, OMAP2_CM_CLKSTCTRL);
374 omap2_cm_write_mod_reg(cm_context.core_cm_autoidle1, CORE_MOD,
376 omap2_cm_write_mod_reg(cm_context.core_cm_autoidle2, CORE_MOD,
378 omap2_cm_write_mod_reg(cm_context.core_cm_autoidle3, CORE_MOD,
380 omap2_cm_write_mod_reg(cm_context.wkup_cm_autoidle, WKUP_MOD,
382 omap2_cm_write_mod_reg(cm_context.dss_cm_autoidle, OMAP3430_DSS_MOD,
384 omap2_cm_write_mod_reg(cm_context.cam_cm_autoidle, OMAP3430_CAM_MOD,
386 omap2_cm_write_mod_reg(cm_context.per_cm_autoidle, OMAP3430_PER_MOD,
388 omap2_cm_write_mod_reg(cm_context.usbhost_cm_autoidle,
389 OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE);
390 omap2_cm_write_mod_reg(cm_context.sgx_cm_sleepdep, OMAP3430ES2_SGX_MOD,
391 OMAP3430_CM_SLEEPDEP);
392 omap2_cm_write_mod_reg(cm_context.dss_cm_sleepdep, OMAP3430_DSS_MOD,
393 OMAP3430_CM_SLEEPDEP);
394 omap2_cm_write_mod_reg(cm_context.cam_cm_sleepdep, OMAP3430_CAM_MOD,
395 OMAP3430_CM_SLEEPDEP);
396 omap2_cm_write_mod_reg(cm_context.per_cm_sleepdep, OMAP3430_PER_MOD,
397 OMAP3430_CM_SLEEPDEP);
398 omap2_cm_write_mod_reg(cm_context.usbhost_cm_sleepdep,
399 OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP);
400 omap2_cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD,
401 OMAP3_CM_CLKOUT_CTRL_OFFSET);