2 * linux/arch/arm/mach-omap2/clock.h
4 * Copyright (C) 2005-2009 Texas Instruments, Inc.
5 * Copyright (C) 2004-2011 Nokia Corporation
8 * Richard Woodruff <r-woodruff2@ti.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H
17 #define __ARCH_ARM_MACH_OMAP2_CLOCK_H
19 #include <linux/kernel.h>
21 #include <plat/clock.h>
23 /* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */
24 #define CORE_CLK_SRC_32K 0x0
25 #define CORE_CLK_SRC_DPLL 0x1
26 #define CORE_CLK_SRC_DPLL_X2 0x2
28 /* OMAP2xxx CM_CLKEN_PLL.EN_DPLL bits - for omap2_get_dpll_rate() */
29 #define OMAP2XXX_EN_DPLL_LPBYPASS 0x1
30 #define OMAP2XXX_EN_DPLL_FRBYPASS 0x2
31 #define OMAP2XXX_EN_DPLL_LOCKED 0x3
33 /* OMAP3xxx CM_CLKEN_PLL*.EN_*_DPLL bits - for omap2_get_dpll_rate() */
34 #define OMAP3XXX_EN_DPLL_LPBYPASS 0x5
35 #define OMAP3XXX_EN_DPLL_FRBYPASS 0x6
36 #define OMAP3XXX_EN_DPLL_LOCKED 0x7
38 /* OMAP4xxx CM_CLKMODE_DPLL*.EN_*_DPLL bits - for omap2_get_dpll_rate() */
39 #define OMAP4XXX_EN_DPLL_MNBYPASS 0x4
40 #define OMAP4XXX_EN_DPLL_LPBYPASS 0x5
41 #define OMAP4XXX_EN_DPLL_FRBYPASS 0x6
42 #define OMAP4XXX_EN_DPLL_LOCKED 0x7
44 /* CM_CLKEN_PLL*.EN* bit values - not all are available for every DPLL */
45 #define DPLL_LOW_POWER_STOP 0x1
46 #define DPLL_LOW_POWER_BYPASS 0x5
47 #define DPLL_LOCKED 0x7
49 /* DPLL Type and DCO Selection Flags */
50 #define DPLL_J_TYPE 0x1
52 int omap2_clk_enable(struct clk *clk);
53 void omap2_clk_disable(struct clk *clk);
54 long omap2_clk_round_rate(struct clk *clk, unsigned long rate);
55 int omap2_clk_set_rate(struct clk *clk, unsigned long rate);
56 int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent);
57 long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate);
58 unsigned long omap3_dpll_recalc(struct clk *clk);
59 unsigned long omap3_clkoutx2_recalc(struct clk *clk);
60 void omap3_dpll_allow_idle(struct clk *clk);
61 void omap3_dpll_deny_idle(struct clk *clk);
62 u32 omap3_dpll_autoidle_read(struct clk *clk);
63 int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate);
65 int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel);
66 /* If you are using this function and not on OMAP3, you are
67 * Doing It Wrong(tm), so there is no stub.
70 int omap3_noncore_dpll_enable(struct clk *clk);
71 void omap3_noncore_dpll_disable(struct clk *clk);
72 int omap4_dpllmx_gatectrl_read(struct clk *clk);
73 void omap4_dpllmx_allow_gatectrl(struct clk *clk);
74 void omap4_dpllmx_deny_gatectrl(struct clk *clk);
75 long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate);
76 unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk);
78 #ifdef CONFIG_OMAP_RESET_CLOCKS
79 void omap2_clk_disable_unused(struct clk *clk);
81 #define omap2_clk_disable_unused NULL
84 void omap2_init_clk_clkdm(struct clk *clk);
85 void __init omap2_clk_disable_clkdm_control(void);
87 /* clkt_clksel.c public functions */
88 u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
90 void omap2_init_clksel_parent(struct clk *clk);
91 unsigned long omap2_clksel_recalc(struct clk *clk);
92 long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate);
93 int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);
94 int omap2_clksel_set_parent(struct clk *clk, struct clk *new_parent);
95 int omap2_clksel_force_divisor(struct clk *clk, int new_div);
97 /* clkt_iclk.c public functions */
98 extern void omap2_clkt_iclk_allow_idle(struct clk *clk);
99 extern void omap2_clkt_iclk_deny_idle(struct clk *clk);
101 u32 omap2_get_dpll_rate(struct clk *clk);
102 void omap2_init_dpll_parent(struct clk *clk);
104 int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name);
107 #ifdef CONFIG_ARCH_OMAP2
108 void omap2xxx_clk_prepare_for_reboot(void);
110 static inline void omap2xxx_clk_prepare_for_reboot(void)
115 #ifdef CONFIG_ARCH_OMAP3
116 void omap3_clk_prepare_for_reboot(void);
118 static inline void omap3_clk_prepare_for_reboot(void)
123 #ifdef CONFIG_ARCH_OMAP4
124 void omap4_clk_prepare_for_reboot(void);
126 static inline void omap4_clk_prepare_for_reboot(void)
131 int omap2_dflt_clk_enable(struct clk *clk);
132 void omap2_dflt_clk_disable(struct clk *clk);
133 void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg,
135 void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg,
136 u8 *idlest_bit, u8 *idlest_val);
137 int omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name);
138 void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
139 const char *core_ck_name,
140 const char *mpu_ck_name);
144 extern const struct clkops clkops_omap2_dflt_wait;
145 extern const struct clkops clkops_dummy;
146 extern const struct clkops clkops_omap2_dflt;
148 extern struct clk_functions omap2_clk_functions;
149 extern struct clk *vclk, *sclk;
151 extern const struct clksel_rate gpt_32k_rates[];
152 extern const struct clksel_rate gpt_sys_rates[];
153 extern const struct clksel_rate gfx_l3_rates[];
154 extern const struct clksel_rate dsp_ick_rates[];
156 #if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ)
157 extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
158 extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
160 #define omap2_clk_init_cpufreq_table 0
161 #define omap2_clk_exit_cpufreq_table 0
164 extern const struct clkops clkops_omap2_iclk_dflt_wait;
165 extern const struct clkops clkops_omap2_iclk_dflt;
166 extern const struct clkops clkops_omap2_iclk_idle_only;
167 extern const struct clkops clkops_omap2_mdmclk_dflt_wait;
168 extern const struct clkops clkops_omap2xxx_dpll_ops;
169 extern const struct clkops clkops_omap3_noncore_dpll_ops;
170 extern const struct clkops clkops_omap3_core_dpll_ops;
171 extern const struct clkops clkops_omap4_dpllmx_ops;