2 * board-devkit8000.c - TimLL Devkit8000
4 * Copyright (C) 2009 Kim Botherway
5 * Copyright (C) 2010 Thomas Weber
7 * Modified from mach-omap2/board-omap3beagle.c
9 * Initial code: Syed Mohammed Khasim
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/delay.h>
20 #include <linux/err.h>
21 #include <linux/clk.h>
23 #include <linux/leds.h>
24 #include <linux/gpio.h>
25 #include <linux/input.h>
26 #include <linux/gpio_keys.h>
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mtd/nand.h>
31 #include <linux/mmc/host.h>
33 #include <linux/regulator/machine.h>
34 #include <linux/i2c/twl.h>
36 #include <mach/hardware.h>
38 #include <asm/mach-types.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/map.h>
41 #include <asm/mach/flash.h>
44 #include <plat/gpmc.h>
45 #include <plat/nand.h>
47 #include <video/omapdss.h>
48 #include <video/omap-panel-generic-dpi.h>
49 #include <video/omap-panel-tfp410.h>
51 #include <plat/mcspi.h>
52 #include <linux/input/matrix_keypad.h>
53 #include <linux/spi/spi.h>
54 #include <linux/dm9000.h>
55 #include <linux/interrupt.h>
57 #include "sdram-micron-mt46h32m32lf-6.h"
61 #include "common-board-devices.h"
63 #define OMAP_DM9000_GPIO_IRQ 25
64 #define OMAP3_DEVKIT_TS_GPIO 27
66 static struct mtd_partition devkit8000_nand_partitions[] = {
67 /* All the partition sizes are listed in terms of NAND block size */
71 .size = 4 * NAND_BLOCK_SIZE,
72 .mask_flags = MTD_WRITEABLE, /* force read-only */
76 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
77 .size = 15 * NAND_BLOCK_SIZE,
78 .mask_flags = MTD_WRITEABLE, /* force read-only */
82 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
83 .size = 1 * NAND_BLOCK_SIZE,
87 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
88 .size = 32 * NAND_BLOCK_SIZE,
91 .name = "File System",
92 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
93 .size = MTDPART_SIZ_FULL,
97 static struct omap2_hsmmc_info mmc[] = {
100 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
107 static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
109 if (gpio_is_valid(dssdev->reset_gpio))
110 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
114 static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)
116 if (gpio_is_valid(dssdev->reset_gpio))
117 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
120 static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = {
121 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
125 static struct regulator_consumer_supply devkit8000_vio_supply[] = {
126 REGULATOR_SUPPLY("vcc", "spi2.0"),
129 static struct panel_generic_dpi_data lcd_panel = {
130 .name = "innolux_at070tn83",
131 .platform_enable = devkit8000_panel_enable_lcd,
132 .platform_disable = devkit8000_panel_disable_lcd,
135 static struct omap_dss_device devkit8000_lcd_device = {
137 .type = OMAP_DISPLAY_TYPE_DPI,
138 .driver_name = "generic_dpi_panel",
140 .phy.dpi.data_lines = 24,
143 static struct tfp410_platform_data dvi_panel = {
144 .power_down_gpio = -1,
147 static struct omap_dss_device devkit8000_dvi_device = {
149 .type = OMAP_DISPLAY_TYPE_DPI,
150 .driver_name = "tfp410",
152 .phy.dpi.data_lines = 24,
155 static struct omap_dss_device devkit8000_tv_device = {
157 .driver_name = "venc",
158 .type = OMAP_DISPLAY_TYPE_VENC,
159 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
163 static struct omap_dss_device *devkit8000_dss_devices[] = {
164 &devkit8000_lcd_device,
165 &devkit8000_dvi_device,
166 &devkit8000_tv_device,
169 static struct omap_dss_board_info devkit8000_dss_data = {
170 .num_devices = ARRAY_SIZE(devkit8000_dss_devices),
171 .devices = devkit8000_dss_devices,
172 .default_device = &devkit8000_lcd_device,
175 static uint32_t board_keymap[] = {
190 PERSISTENT_KEY(4, 5),
191 KEY(4, 4, KEY_VOLUMEUP),
192 KEY(5, 5, KEY_VOLUMEDOWN),
196 static struct matrix_keymap_data board_map_data = {
197 .keymap = board_keymap,
198 .keymap_size = ARRAY_SIZE(board_keymap),
201 static struct twl4030_keypad_data devkit8000_kp_data = {
202 .keymap_data = &board_map_data,
208 static struct gpio_led gpio_leds[];
210 static int devkit8000_twl_gpio_setup(struct device *dev,
211 unsigned gpio, unsigned ngpio)
215 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
216 mmc[0].gpio_cd = gpio + 0;
217 omap_hsmmc_late_init(mmc);
219 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
220 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
222 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
223 devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
224 ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
225 GPIOF_OUT_INIT_LOW, "LCD_PWREN");
227 devkit8000_lcd_device.reset_gpio = -EINVAL;
228 printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
231 /* gpio + 7 is "DVI_PD" (out, active low) */
232 dvi_panel.power_down_gpio = gpio + 7;
237 static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
238 .gpio_base = OMAP_MAX_GPIO_LINES,
239 .irq_base = TWL4030_GPIO_IRQ_BASE,
240 .irq_end = TWL4030_GPIO_IRQ_END,
242 .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
243 | BIT(15) | BIT(16) | BIT(17),
244 .setup = devkit8000_twl_gpio_setup,
247 static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = {
248 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
249 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
252 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
253 static struct regulator_init_data devkit8000_vmmc1 = {
257 .valid_modes_mask = REGULATOR_MODE_NORMAL
258 | REGULATOR_MODE_STANDBY,
259 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
260 | REGULATOR_CHANGE_MODE
261 | REGULATOR_CHANGE_STATUS,
263 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply),
264 .consumer_supplies = devkit8000_vmmc1_supply,
267 /* VPLL1 for digital video outputs */
268 static struct regulator_init_data devkit8000_vpll1 = {
272 .valid_modes_mask = REGULATOR_MODE_NORMAL
273 | REGULATOR_MODE_STANDBY,
274 .valid_ops_mask = REGULATOR_CHANGE_MODE
275 | REGULATOR_CHANGE_STATUS,
277 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies),
278 .consumer_supplies = devkit8000_vpll1_supplies,
281 /* VAUX4 for ads7846 and nubs */
282 static struct regulator_init_data devkit8000_vio = {
287 .valid_modes_mask = REGULATOR_MODE_NORMAL
288 | REGULATOR_MODE_STANDBY,
289 .valid_ops_mask = REGULATOR_CHANGE_MODE
290 | REGULATOR_CHANGE_STATUS,
292 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply),
293 .consumer_supplies = devkit8000_vio_supply,
296 static struct twl4030_platform_data devkit8000_twldata = {
297 /* platform_data for children goes here */
298 .gpio = &devkit8000_gpio_data,
299 .vmmc1 = &devkit8000_vmmc1,
300 .vpll1 = &devkit8000_vpll1,
301 .vio = &devkit8000_vio,
302 .keypad = &devkit8000_kp_data,
305 static int __init devkit8000_i2c_init(void)
307 omap3_pmic_get_config(&devkit8000_twldata,
308 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
309 TWL_COMMON_REGULATOR_VDAC);
310 omap3_pmic_init("tps65930", &devkit8000_twldata);
311 /* Bus 3 is attached to the DVI port where devices like the pico DLP
312 * projector don't work reliably with 400kHz */
313 omap_register_i2c_bus(3, 400, NULL, 0);
317 static struct gpio_led gpio_leds[] = {
320 .default_trigger = "heartbeat",
326 .default_trigger = "mmc0",
332 .default_trigger = "none",
338 .default_trigger = "none",
344 static struct gpio_led_platform_data gpio_led_info = {
346 .num_leds = ARRAY_SIZE(gpio_leds),
349 static struct platform_device leds_gpio = {
353 .platform_data = &gpio_led_info,
357 static struct gpio_keys_button gpio_buttons[] = {
366 static struct gpio_keys_platform_data gpio_key_info = {
367 .buttons = gpio_buttons,
368 .nbuttons = ARRAY_SIZE(gpio_buttons),
371 static struct platform_device keys_gpio = {
375 .platform_data = &gpio_key_info,
379 #define OMAP_DM9000_BASE 0x2c000000
381 static struct resource omap_dm9000_resources[] = {
383 .start = OMAP_DM9000_BASE,
384 .end = (OMAP_DM9000_BASE + 0x4 - 1),
385 .flags = IORESOURCE_MEM,
388 .start = (OMAP_DM9000_BASE + 0x400),
389 .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1),
390 .flags = IORESOURCE_MEM,
393 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
397 static struct dm9000_plat_data omap_dm9000_platdata = {
398 .flags = DM9000_PLATF_16BITONLY,
401 static struct platform_device omap_dm9000_dev = {
404 .num_resources = ARRAY_SIZE(omap_dm9000_resources),
405 .resource = omap_dm9000_resources,
407 .platform_data = &omap_dm9000_platdata,
411 static void __init omap_dm9000_init(void)
413 unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
414 struct omap_die_id odi;
417 ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq");
419 printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n",
420 OMAP_DM9000_GPIO_IRQ);
424 /* init the mac address using DIE id */
425 omap_get_die_id(&odi);
427 eth_addr[0] = 0x02; /* locally administered */
428 eth_addr[1] = odi.id_1 & 0xff;
429 eth_addr[2] = (odi.id_0 & 0xff000000) >> 24;
430 eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16;
431 eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8;
432 eth_addr[5] = (odi.id_0 & 0x000000ff);
435 static struct platform_device *devkit8000_devices[] __initdata = {
441 static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
443 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
444 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
445 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
448 .reset_gpio_port[0] = -EINVAL,
449 .reset_gpio_port[1] = -EINVAL,
450 .reset_gpio_port[2] = -EINVAL
453 #ifdef CONFIG_OMAP_MUX
454 static struct omap_board_mux board_mux[] __initdata = {
455 /* nCS and IRQ for Devkit8000 ethernet */
456 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0),
457 OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
460 OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
461 OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
462 OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
463 OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
464 OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
467 OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
470 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
471 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
472 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
473 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
474 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
475 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
476 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
477 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
478 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
479 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
480 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
481 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
484 OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
485 OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
486 OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
487 OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
488 OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
489 OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
490 OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
491 OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
492 OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
493 OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
494 OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
495 OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
498 OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
499 OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
500 OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
501 OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
502 OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
503 OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
504 OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
505 OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
506 OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
507 OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
510 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
511 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
512 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
513 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
516 OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
517 OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
520 OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
521 OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
524 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
525 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
528 OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
529 OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
532 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
533 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
534 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
535 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
538 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
539 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
540 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
541 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
542 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
543 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
544 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
545 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
546 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
547 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
548 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
549 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
550 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
551 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
552 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
553 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
554 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
555 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
556 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
557 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
558 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
559 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
560 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
561 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
562 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
563 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
564 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
565 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
569 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
570 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
571 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
572 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
573 OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
576 OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
579 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
580 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
581 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
582 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
585 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
586 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
587 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
588 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
591 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
592 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
594 OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
595 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
596 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
598 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
599 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
602 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
603 OMAP_PIN_INPUT_PULLUP),
605 { .reg_offset = OMAP_MUX_TERMINATOR },
609 static void __init devkit8000_init(void)
611 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
613 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
614 mt46h32m32lf6_sdrc_params);
618 omap_hsmmc_init(mmc);
619 devkit8000_i2c_init();
620 omap_dm9000_resources[2].start = gpio_to_irq(OMAP_DM9000_GPIO_IRQ);
621 platform_add_devices(devkit8000_devices,
622 ARRAY_SIZE(devkit8000_devices));
624 omap_display_init(&devkit8000_dss_data);
626 omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL);
629 usbhs_init(&usbhs_bdata);
630 omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions,
631 ARRAY_SIZE(devkit8000_nand_partitions));
633 /* Ensure SDRC pins are mux'd for self-refresh */
634 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
635 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
638 MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
639 .atag_offset = 0x100,
640 .reserve = omap_reserve,
641 .map_io = omap3_map_io,
642 .init_early = omap35xx_init_early,
643 .init_irq = omap3_init_irq,
644 .handle_irq = omap3_intc_handle_irq,
645 .init_machine = devkit8000_init,
646 .init_late = omap35xx_init_late,
647 .timer = &omap3_secure_timer,
648 .restart = omap_prcm_restart,