Merge omap-upstream
[pandora-kernel.git] / arch / arm / mach-omap1 / mmu.h
1 #ifndef __MACH_OMAP1_MMU_H
2 #define __MACH_OMAP1_MMU_H
3
4 #include <asm/arch/mmu.h>
5 #include <asm/io.h>
6
7 #define MMU_LOCK_BASE_MASK              (0x3f << 10)
8 #define MMU_LOCK_VICTIM_MASK            (0x3f << 4)
9
10 #define OMAP_MMU_PREFETCH               0x00
11 #define OMAP_MMU_WALKING_ST             0x04
12 #define OMAP_MMU_CNTL                   0x08
13 #define OMAP_MMU_FAULT_AD_H             0x0c
14 #define OMAP_MMU_FAULT_AD_L             0x10
15 #define OMAP_MMU_FAULT_ST               0x14
16 #define OMAP_MMU_IT_ACK                 0x18
17 #define OMAP_MMU_TTB_H                  0x1c
18 #define OMAP_MMU_TTB_L                  0x20
19 #define OMAP_MMU_LOCK                   0x24
20 #define OMAP_MMU_LD_TLB                 0x28
21 #define OMAP_MMU_CAM_H                  0x2c
22 #define OMAP_MMU_CAM_L                  0x30
23 #define OMAP_MMU_RAM_H                  0x34
24 #define OMAP_MMU_RAM_L                  0x38
25 #define OMAP_MMU_GFLUSH                 0x3c
26 #define OMAP_MMU_FLUSH_ENTRY            0x40
27 #define OMAP_MMU_READ_CAM_H             0x44
28 #define OMAP_MMU_READ_CAM_L             0x48
29 #define OMAP_MMU_READ_RAM_H             0x4c
30 #define OMAP_MMU_READ_RAM_L             0x50
31
32 #define OMAP_MMU_CNTL_BURST_16MNGT_EN   0x0020
33 #define OMAP_MMU_CNTL_WTL_EN            0x0004
34 #define OMAP_MMU_CNTL_MMU_EN            0x0002
35 #define OMAP_MMU_CNTL_RESET_SW          0x0001
36
37 #define OMAP_MMU_FAULT_AD_H_DP          0x0100
38 #define OMAP_MMU_FAULT_AD_H_ADR_MASK    0x00ff
39
40 #define OMAP_MMU_FAULT_ST_PREF          0x0008
41 #define OMAP_MMU_FAULT_ST_PERM          0x0004
42 #define OMAP_MMU_FAULT_ST_TLB_MISS      0x0002
43 #define OMAP_MMU_FAULT_ST_TRANS         0x0001
44
45 #define OMAP_MMU_IT_ACK_IT_ACK          0x0001
46
47 #define OMAP_MMU_CAM_H_VA_TAG_H_MASK            0x0003
48
49 #define OMAP_MMU_CAM_L_VA_TAG_L1_MASK           0xc000
50 #define OMAP_MMU_CAM_L_VA_TAG_L2_MASK_1MB       0x0000
51 #define OMAP_MMU_CAM_L_VA_TAG_L2_MASK_64KB      0x3c00
52 #define OMAP_MMU_CAM_L_VA_TAG_L2_MASK_4KB       0x3fc0
53 #define OMAP_MMU_CAM_L_VA_TAG_L2_MASK_1KB       0x3ff0
54 #define OMAP_MMU_CAM_L_P                        0x0008
55 #define OMAP_MMU_CAM_L_V                        0x0004
56 #define OMAP_MMU_CAM_L_PAGESIZE_MASK            0x0003
57 #define OMAP_MMU_CAM_L_PAGESIZE_1MB             0x0000
58 #define OMAP_MMU_CAM_L_PAGESIZE_64KB            0x0001
59 #define OMAP_MMU_CAM_L_PAGESIZE_4KB             0x0002
60 #define OMAP_MMU_CAM_L_PAGESIZE_1KB             0x0003
61
62 #define OMAP_MMU_CAM_P                  OMAP_MMU_CAM_L_P
63 #define OMAP_MMU_CAM_V                  OMAP_MMU_CAM_L_V
64 #define OMAP_MMU_CAM_PAGESIZE_MASK      OMAP_MMU_CAM_L_PAGESIZE_MASK
65 #define OMAP_MMU_CAM_PAGESIZE_1MB       OMAP_MMU_CAM_L_PAGESIZE_1MB
66 #define OMAP_MMU_CAM_PAGESIZE_64KB      OMAP_MMU_CAM_L_PAGESIZE_64KB
67 #define OMAP_MMU_CAM_PAGESIZE_4KB       OMAP_MMU_CAM_L_PAGESIZE_4KB
68 #define OMAP_MMU_CAM_PAGESIZE_1KB       OMAP_MMU_CAM_L_PAGESIZE_1KB
69 #define OMAP_MMU_CAM_PAGESIZE_16MB      -1 /* unused in omap1 */
70
71 #define OMAP_MMU_RAM_L_RAM_LSB_MASK     0xfc00
72 #define OMAP_MMU_RAM_L_AP_MASK          0x0300
73 #define OMAP_MMU_RAM_L_AP_NA            0x0000
74 #define OMAP_MMU_RAM_L_AP_RO            0x0200
75 #define OMAP_MMU_RAM_L_AP_FA            0x0300
76
77 #define OMAP_MMU_LD_TLB_RD              0x0002
78
79 #define INIT_TLB_ENTRY(ent,v,p,ps)                      \
80 do {                                                    \
81         (ent)->va       = (v);                          \
82         (ent)->pa       = (p);                          \
83         (ent)->pgsz     = (ps);                         \
84         (ent)->prsvd    = 0;                            \
85         (ent)->ap       = OMAP_MMU_RAM_L_AP_FA;         \
86         (ent)->tlb      = 1;                            \
87 } while (0)
88
89 #define INIT_TLB_ENTRY_4KB_PRESERVED(ent,v,p)           \
90 do {                                                    \
91         (ent)->va       = (v);                          \
92         (ent)->pa       = (p);                          \
93         (ent)->pgsz     = OMAP_MMU_CAM_PAGESIZE_4KB;    \
94         (ent)->prsvd    = OMAP_MMU_CAM_P;               \
95         (ent)->ap       = OMAP_MMU_RAM_L_AP_FA;         \
96 } while (0)
97
98 extern struct omap_mmu_ops omap1_mmu_ops;
99
100 struct omap_mmu_tlb_entry {
101         unsigned long va;
102         unsigned long pa;
103         unsigned int pgsz, prsvd, valid;
104
105         u16 ap;
106         unsigned int tlb;
107 };
108
109 static inline unsigned short
110 omap_mmu_read_reg(struct omap_mmu *mmu, unsigned long reg)
111 {
112         return __raw_readw(mmu->base + reg);
113 }
114
115 static inline void omap_mmu_write_reg(struct omap_mmu *mmu,
116                                unsigned short val, unsigned long reg)
117 {
118         __raw_writew(val, mmu->base + reg);
119 }
120
121 int omap_dsp_request_mem(void);
122 void omap_dsp_release_mem(void);
123
124 static inline void omap_mmu_itack(struct omap_mmu *mmu)
125 {
126         omap_mmu_write_reg(mmu, OMAP_MMU_IT_ACK_IT_ACK, OMAP_MMU_IT_ACK);
127 }
128
129 #endif /* __MACH_OMAP1_MMU_H */