arch/arm/mach-mmp/clock.h

   1 /*
   2  *  linux/arch/arm/mach-mmp/clock.h
   3  *
   4  *  This program is free software; you can redistribute it and/or modify
   5  *  it under the terms of the GNU General Public License version 2 as
   6  *  published by the Free Software Foundation.
   7  */
   8
   9 #include <asm/clkdev.h>
  10
  11 struct clkops {
  12         void                    (*enable)(struct clk *);
  13         void                    (*disable)(struct clk *);
  14         unsigned long           (*getrate)(struct clk *);
  15 };
  16
  17 struct clk {
  18         const struct clkops     *ops;
  19
  20         void __iomem    *clk_rst;       /* clock reset control register */
  21         int             fnclksel;       /* functional clock select (APBC) */
  22         uint32_t        enable_val;     /* value for clock enable (APMU) */
  23         unsigned long   rate;
  24         int             enabled;
  25 };
  26
  27 extern struct clkops apbc_clk_ops;
  28 extern struct clkops apmu_clk_ops;
  29
  30 #define APBC_CLK(_name, _reg, _fnclksel, _rate)                 \
  31 struct clk clk_##_name = {                                      \
  32                 .clk_rst        = (void __iomem *)APBC_##_reg,  \
  33                 .fnclksel       = _fnclksel,                    \
  34                 .rate           = _rate,                        \
  35                 .ops            = &apbc_clk_ops,                \
  36 }
  37
  38 #define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops)       \
  39 struct clk clk_##_name = {                                      \
  40                 .clk_rst        = (void __iomem *)APBC_##_reg,  \
  41                 .fnclksel       = _fnclksel,                    \
  42                 .rate           = _rate,                        \
  43                 .ops            = _ops,                         \
  44 }
  45
  46 #define APMU_CLK(_name, _reg, _eval, _rate)                     \
  47 struct clk clk_##_name = {                                      \
  48                 .clk_rst        = (void __iomem *)APMU_##_reg,  \
  49                 .enable_val     = _eval,                        \
  50                 .rate           = _rate,                        \
  51                 .ops            = &apmu_clk_ops,                \
  52 }
  53
  54 #define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops)           \
  55 struct clk clk_##_name = {                                      \
  56                 .clk_rst        = (void __iomem *)APMU_##_reg,  \
  57                 .enable_val     = _eval,                        \
  58                 .rate           = _rate,                        \
  59                 .ops            = _ops,                         \
  60 }
  61
  62 #define INIT_CLKREG(_clk, _devname, _conname)                   \
  63         {                                                       \
  64                 .clk            = _clk,                         \
  65                 .dev_id         = _devname,                     \
  66                 .con_id         = _conname,                     \
  67         }
  68
  69 extern struct clk clk_pxa168_gpio;
  70 extern struct clk clk_pxa168_timers;