2 * arch/arm/mach-ixp23xx/core.c
4 * Core routines for IXP23xx chips
6 * Author: Deepak Saxena <dsaxena@plexity.net>
8 * Copyright 2005 (c) MontaVista Software, Inc.
10 * Based on 2.4 code Copyright 2004 (c) Intel Corporation
12 * This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without any
14 * warranty of any kind, whether express or implied.
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/spinlock.h>
20 #include <linux/sched.h>
21 #include <linux/interrupt.h>
22 #include <linux/serial.h>
23 #include <linux/tty.h>
24 #include <linux/bitops.h>
25 #include <linux/serial.h>
26 #include <linux/serial_8250.h>
27 #include <linux/serial_core.h>
28 #include <linux/device.h>
30 #include <linux/time.h>
31 #include <linux/timex.h>
33 #include <asm/types.h>
34 #include <asm/setup.h>
35 #include <asm/memory.h>
36 #include <asm/hardware.h>
37 #include <asm/mach-types.h>
39 #include <asm/system.h>
40 #include <asm/tlbflush.h>
41 #include <asm/pgtable.h>
43 #include <asm/mach/map.h>
44 #include <asm/mach/time.h>
45 #include <asm/mach/irq.h>
46 #include <asm/mach/arch.h>
49 /*************************************************************************
50 * Chip specific mappings shared by all IXP23xx systems
51 *************************************************************************/
52 static struct map_desc ixp23xx_io_desc[] __initdata = {
54 .virtual = IXP23XX_XSI2CPP_CSR_VIRT,
55 .pfn = __phys_to_pfn(IXP23XX_XSI2CPP_CSR_PHYS),
56 .length = IXP23XX_XSI2CPP_CSR_SIZE,
58 }, { /* Expansion Bus Config */
59 .virtual = IXP23XX_EXP_CFG_VIRT,
60 .pfn = __phys_to_pfn(IXP23XX_EXP_CFG_PHYS),
61 .length = IXP23XX_EXP_CFG_SIZE,
63 }, { /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACS,.... */
64 .virtual = IXP23XX_PERIPHERAL_VIRT,
65 .pfn = __phys_to_pfn(IXP23XX_PERIPHERAL_PHYS),
66 .length = IXP23XX_PERIPHERAL_SIZE,
69 .virtual = IXP23XX_CAP_CSR_VIRT,
70 .pfn = __phys_to_pfn(IXP23XX_CAP_CSR_PHYS),
71 .length = IXP23XX_CAP_CSR_SIZE,
74 .virtual = IXP23XX_MSF_CSR_VIRT,
75 .pfn = __phys_to_pfn(IXP23XX_MSF_CSR_PHYS),
76 .length = IXP23XX_MSF_CSR_SIZE,
78 }, { /* PCI I/O Space */
79 .virtual = IXP23XX_PCI_IO_VIRT,
80 .pfn = __phys_to_pfn(IXP23XX_PCI_IO_PHYS),
81 .length = IXP23XX_PCI_IO_SIZE,
83 }, { /* PCI Config Space */
84 .virtual = IXP23XX_PCI_CFG_VIRT,
85 .pfn = __phys_to_pfn(IXP23XX_PCI_CFG_PHYS),
86 .length = IXP23XX_PCI_CFG_SIZE,
88 }, { /* PCI local CFG CSRs */
89 .virtual = IXP23XX_PCI_CREG_VIRT,
90 .pfn = __phys_to_pfn(IXP23XX_PCI_CREG_PHYS),
91 .length = IXP23XX_PCI_CREG_SIZE,
93 }, { /* PCI MEM Space */
94 .virtual = IXP23XX_PCI_MEM_VIRT,
95 .pfn = __phys_to_pfn(IXP23XX_PCI_MEM_PHYS),
96 .length = IXP23XX_PCI_MEM_SIZE,
101 void __init ixp23xx_map_io(void)
103 iotable_init(ixp23xx_io_desc, ARRAY_SIZE(ixp23xx_io_desc));
107 /***************************************************************************
108 * IXP23xx Interrupt Handling
109 ***************************************************************************/
110 enum ixp23xx_irq_type {
111 IXP23XX_IRQ_LEVEL, IXP23XX_IRQ_EDGE
114 static void ixp23xx_config_irq(unsigned int, enum ixp23xx_irq_type);
116 static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
118 int line = irq - IRQ_IXP23XX_GPIO6 + 6;
120 enum ixp23xx_irq_type irq_type;
121 volatile u32 *int_reg;
124 * Only GPIOs 6-15 are wired to interrupts on IXP23xx
126 if (line < 6 || line > 15)
131 int_style = IXP23XX_GPIO_STYLE_TRANSITIONAL;
132 irq_type = IXP23XX_IRQ_EDGE;
135 int_style = IXP23XX_GPIO_STYLE_RISING_EDGE;
136 irq_type = IXP23XX_IRQ_EDGE;
139 int_style = IXP23XX_GPIO_STYLE_FALLING_EDGE;
140 irq_type = IXP23XX_IRQ_EDGE;
143 int_style = IXP23XX_GPIO_STYLE_ACTIVE_HIGH;
144 irq_type = IXP23XX_IRQ_LEVEL;
147 int_style = IXP23XX_GPIO_STYLE_ACTIVE_LOW;
148 irq_type = IXP23XX_IRQ_LEVEL;
154 ixp23xx_config_irq(irq, irq_type);
156 if (line >= 8) { /* pins 8-15 */
158 int_reg = (volatile u32 *)IXP23XX_GPIO_GPIT2R;
159 } else { /* pins 0-7 */
160 int_reg = (volatile u32 *)IXP23XX_GPIO_GPIT1R;
164 * Clear pending interrupts
166 *IXP23XX_GPIO_GPISR = (1 << line);
168 /* Clear the style for the appropriate pin */
169 *int_reg &= ~(IXP23XX_GPIO_STYLE_MASK <<
170 (line * IXP23XX_GPIO_STYLE_SIZE));
172 /* Set the new style */
173 *int_reg |= (int_style << (line * IXP23XX_GPIO_STYLE_SIZE));
178 static void ixp23xx_irq_mask(unsigned int irq)
180 volatile unsigned long *intr_reg;
185 intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
186 *intr_reg &= ~(1 << (irq % 32));
189 static void ixp23xx_irq_ack(unsigned int irq)
191 int line = irq - IRQ_IXP23XX_GPIO6 + 6;
193 if ((line < 6) || (line > 15))
196 *IXP23XX_GPIO_GPISR = (1 << line);
200 * Level triggered interrupts on GPIO lines can only be cleared when the
201 * interrupt condition disappears.
203 static void ixp23xx_irq_level_unmask(unsigned int irq)
205 volatile unsigned long *intr_reg;
207 ixp23xx_irq_ack(irq);
212 intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
213 *intr_reg |= (1 << (irq % 32));
216 static void ixp23xx_irq_edge_unmask(unsigned int irq)
218 volatile unsigned long *intr_reg;
223 intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
224 *intr_reg |= (1 << (irq % 32));
227 static struct irq_chip ixp23xx_irq_level_chip = {
228 .ack = ixp23xx_irq_mask,
229 .mask = ixp23xx_irq_mask,
230 .unmask = ixp23xx_irq_level_unmask,
231 .set_type = ixp23xx_irq_set_type
234 static struct irq_chip ixp23xx_irq_edge_chip = {
235 .ack = ixp23xx_irq_ack,
236 .mask = ixp23xx_irq_mask,
237 .unmask = ixp23xx_irq_edge_unmask,
238 .set_type = ixp23xx_irq_set_type
241 static void ixp23xx_pci_irq_mask(unsigned int irq)
243 *IXP23XX_PCI_XSCALE_INT_ENABLE &= ~(1 << (IRQ_IXP23XX_INTA + 27 - irq));
246 static void ixp23xx_pci_irq_unmask(unsigned int irq)
248 *IXP23XX_PCI_XSCALE_INT_ENABLE |= (1 << (IRQ_IXP23XX_INTA + 27 - irq));
252 * TODO: Should this just be done at ASM level?
254 static void pci_handler(unsigned int irq, struct irq_desc *desc)
258 struct irq_desc *int_desc;
260 pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS;
262 desc->chip->ack(irq);
264 /* See which PCI_INTA, or PCI_INTB interrupted */
265 if (pci_interrupt & (1 << 26)) {
266 irqno = IRQ_IXP23XX_INTB;
267 } else if (pci_interrupt & (1 << 27)) {
268 irqno = IRQ_IXP23XX_INTA;
273 int_desc = irq_desc + irqno;
274 desc_handle_irq(irqno, int_desc);
276 desc->chip->unmask(irq);
279 static struct irq_chip ixp23xx_pci_irq_chip = {
280 .ack = ixp23xx_pci_irq_mask,
281 .mask = ixp23xx_pci_irq_mask,
282 .unmask = ixp23xx_pci_irq_unmask
285 static void ixp23xx_config_irq(unsigned int irq, enum ixp23xx_irq_type type)
288 case IXP23XX_IRQ_LEVEL:
289 set_irq_chip(irq, &ixp23xx_irq_level_chip);
290 set_irq_handler(irq, handle_level_irq);
292 case IXP23XX_IRQ_EDGE:
293 set_irq_chip(irq, &ixp23xx_irq_edge_chip);
294 set_irq_handler(irq, handle_edge_irq);
297 set_irq_flags(irq, IRQF_VALID);
300 void __init ixp23xx_init_irq(void)
304 /* Route everything to IRQ */
305 *IXP23XX_INTR_SEL1 = 0x0;
306 *IXP23XX_INTR_SEL2 = 0x0;
307 *IXP23XX_INTR_SEL3 = 0x0;
308 *IXP23XX_INTR_SEL4 = 0x0;
310 /* Mask all sources */
311 *IXP23XX_INTR_EN1 = 0x0;
312 *IXP23XX_INTR_EN2 = 0x0;
313 *IXP23XX_INTR_EN3 = 0x0;
314 *IXP23XX_INTR_EN4 = 0x0;
317 * Configure all IRQs for level-sensitive operation
319 for (irq = 0; irq <= NUM_IXP23XX_RAW_IRQS; irq++) {
320 ixp23xx_config_irq(irq, IXP23XX_IRQ_LEVEL);
323 for (irq = IRQ_IXP23XX_INTA; irq <= IRQ_IXP23XX_INTB; irq++) {
324 set_irq_chip(irq, &ixp23xx_pci_irq_chip);
325 set_irq_handler(irq, handle_level_irq);
326 set_irq_flags(irq, IRQF_VALID);
329 set_irq_chained_handler(IRQ_IXP23XX_PCI_INT_RPH, pci_handler);
333 /*************************************************************************
334 * Timer-tick functions for IXP23xx
335 *************************************************************************/
336 #define CLOCK_TICKS_PER_USEC (CLOCK_TICK_RATE / USEC_PER_SEC)
338 static unsigned long next_jiffy_time;
341 ixp23xx_gettimeoffset(void)
343 unsigned long elapsed;
345 elapsed = *IXP23XX_TIMER_CONT - (next_jiffy_time - LATCH);
347 return elapsed / CLOCK_TICKS_PER_USEC;
351 ixp23xx_timer_interrupt(int irq, void *dev_id)
353 /* Clear Pending Interrupt by writing '1' to it */
354 *IXP23XX_TIMER_STATUS = IXP23XX_TIMER1_INT_PEND;
355 while ((signed long)(*IXP23XX_TIMER_CONT - next_jiffy_time) >= LATCH) {
357 next_jiffy_time += LATCH;
363 static struct irqaction ixp23xx_timer_irq = {
364 .name = "IXP23xx Timer Tick",
365 .handler = ixp23xx_timer_interrupt,
366 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
369 void __init ixp23xx_init_timer(void)
371 /* Clear Pending Interrupt by writing '1' to it */
372 *IXP23XX_TIMER_STATUS = IXP23XX_TIMER1_INT_PEND;
374 /* Setup the Timer counter value */
375 *IXP23XX_TIMER1_RELOAD =
376 (LATCH & ~IXP23XX_TIMER_RELOAD_MASK) | IXP23XX_TIMER_ENABLE;
378 *IXP23XX_TIMER_CONT = 0;
379 next_jiffy_time = LATCH;
381 /* Connect the interrupt handler and enable the interrupt */
382 setup_irq(IRQ_IXP23XX_TIMER1, &ixp23xx_timer_irq);
385 struct sys_timer ixp23xx_timer = {
386 .init = ixp23xx_init_timer,
387 .offset = ixp23xx_gettimeoffset,
391 /*************************************************************************
392 * IXP23xx Platform Initialization
393 *************************************************************************/
394 static struct resource ixp23xx_uart_resources[] = {
396 .start = IXP23XX_UART1_PHYS,
397 .end = IXP23XX_UART1_PHYS + 0x0fff,
398 .flags = IORESOURCE_MEM
400 .start = IXP23XX_UART2_PHYS,
401 .end = IXP23XX_UART2_PHYS + 0x0fff,
402 .flags = IORESOURCE_MEM
406 static struct plat_serial8250_port ixp23xx_uart_data[] = {
408 .mapbase = IXP23XX_UART1_PHYS,
409 .membase = (char *)(IXP23XX_UART1_VIRT + 3),
410 .irq = IRQ_IXP23XX_UART1,
411 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
414 .uartclk = IXP23XX_UART_XTAL,
416 .mapbase = IXP23XX_UART2_PHYS,
417 .membase = (char *)(IXP23XX_UART2_VIRT + 3),
418 .irq = IRQ_IXP23XX_UART2,
419 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
422 .uartclk = IXP23XX_UART_XTAL,
427 static struct platform_device ixp23xx_uart = {
428 .name = "serial8250",
430 .dev.platform_data = ixp23xx_uart_data,
432 .resource = ixp23xx_uart_resources,
435 static struct platform_device *ixp23xx_devices[] __initdata = {
439 void __init ixp23xx_sys_init(void)
441 *IXP23XX_EXP_UNIT_FUSE |= 0xf;
442 platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices));