2 * arch/arm/mach-footbridge/include/mach/hardware.h
4 * Copyright (C) 1998-1999 Russell King.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This file contains the hardware definitions of the EBSA-285.
12 #ifndef __ASM_ARCH_HARDWARE_H
13 #define __ASM_ARCH_HARDWARE_H
15 #include <mach/memory.h>
17 /* Virtual Physical Size
18 * 0xff800000 0x40000000 1MB X-Bus
19 * 0xff000000 0x7c000000 1MB PCI I/O space
20 * 0xfe000000 0x42000000 1MB CSR
21 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported)
22 * 0xfc000000 0x79000000 1MB PCI IACK/special space
23 * 0xfb000000 0x7a000000 16MB PCI Config type 1
24 * 0xfa000000 0x7b000000 16MB PCI Config type 0
25 * 0xf9000000 0x50000000 1MB Cache flush
26 * 0xf0000000 0x80000000 16MB ISA memory
28 #define XBUS_SIZE 0x00100000
29 #define XBUS_BASE 0xff800000
31 #define PCIO_SIZE 0x00100000
32 #define PCIO_BASE 0xff000000
34 #define ARMCSR_SIZE 0x00100000
35 #define ARMCSR_BASE 0xfe000000
37 #define WFLUSH_SIZE 0x00100000
38 #define WFLUSH_BASE 0xfd000000
40 #define PCIIACK_SIZE 0x00100000
41 #define PCIIACK_BASE 0xfc000000
43 #define PCICFG1_SIZE 0x01000000
44 #define PCICFG1_BASE 0xfb000000
46 #define PCICFG0_SIZE 0x01000000
47 #define PCICFG0_BASE 0xfa000000
49 #define PCIMEM_SIZE 0x01000000
50 #define PCIMEM_BASE 0xf0000000
52 #define XBUS_LEDS ((volatile unsigned char *)(XBUS_BASE + 0x12000))
53 #define XBUS_LED_AMBER (1 << 0)
54 #define XBUS_LED_GREEN (1 << 1)
55 #define XBUS_LED_RED (1 << 2)
56 #define XBUS_LED_TOGGLE (1 << 8)
58 #define XBUS_SWITCH ((volatile unsigned char *)(XBUS_BASE + 0x12000))
59 #define XBUS_SWITCH_SWITCH ((*XBUS_SWITCH) & 15)
60 #define XBUS_SWITCH_J17_13 ((*XBUS_SWITCH) & (1 << 4))
61 #define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5))
62 #define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6))
64 #define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108)
69 #define PIC_MASK_LO 0x21
71 #define PIC_MASK_HI 0xA1
74 #define GPIO_CCLK 0x800
75 #define GPIO_DSCLK 0x400
76 #define GPIO_E2CLK 0x200
77 #define GPIO_IOLOAD 0x100
78 #define GPIO_RED_LED 0x080
79 #define GPIO_WDTIMER 0x040
80 #define GPIO_DATA 0x020
81 #define GPIO_IOCLK 0x010
82 #define GPIO_DONE 0x008
83 #define GPIO_FAN 0x004
84 #define GPIO_GREEN_LED 0x002
85 #define GPIO_RESET 0x001
88 #define CPLD_DS_ENABLE 8
89 #define CPLD_7111_DISABLE 4
91 #define CPLD_FLASH_WR_ENABLE 1
94 extern void gpio_modify_op(int mask, int set);
95 extern void gpio_modify_io(int mask, int in);
96 extern int gpio_read(void);
97 extern void cpld_modify(int mask, int set);
100 #define pcibios_assign_all_busses() 1
102 #define PCIBIOS_MIN_IO 0x1000
103 #define PCIBIOS_MIN_MEM 0x81000000