2 * arch/arm/mach-dove/common.c
4 * Core functions for Marvell Dove 88AP510 System On Chip
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/pci.h>
16 #include <linux/serial_8250.h>
17 #include <linux/clk.h>
18 #include <linux/mbus.h>
19 #include <linux/mv643xx_eth.h>
20 #include <linux/mv643xx_i2c.h>
21 #include <linux/ata_platform.h>
22 #include <linux/serial_8250.h>
23 #include <linux/spi/orion_spi.h>
24 #include <linux/gpio.h>
26 #include <asm/setup.h>
27 #include <asm/timex.h>
28 #include <asm/hardware/cache-tauros2.h>
29 #include <asm/mach/map.h>
30 #include <asm/mach/time.h>
31 #include <asm/mach/pci.h>
32 #include <mach/dove.h>
33 #include <mach/bridge-regs.h>
34 #include <asm/mach/arch.h>
35 #include <linux/irq.h>
36 #include <plat/mv_xor.h>
37 #include <plat/ehci-orion.h>
38 #include <plat/time.h>
39 #include <plat/common.h>
42 static int get_tclk(void);
44 /*****************************************************************************
46 ****************************************************************************/
47 static struct map_desc dove_io_desc[] __initdata = {
49 .virtual = DOVE_SB_REGS_VIRT_BASE,
50 .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
51 .length = DOVE_SB_REGS_SIZE,
54 .virtual = DOVE_NB_REGS_VIRT_BASE,
55 .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
56 .length = DOVE_NB_REGS_SIZE,
59 .virtual = DOVE_PCIE0_IO_VIRT_BASE,
60 .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
61 .length = DOVE_PCIE0_IO_SIZE,
64 .virtual = DOVE_PCIE1_IO_VIRT_BASE,
65 .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
66 .length = DOVE_PCIE1_IO_SIZE,
71 void __init dove_map_io(void)
73 iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
76 /*****************************************************************************
78 ****************************************************************************/
79 static struct orion_ehci_data dove_ehci_data = {
80 .dram = &dove_mbus_dram_info,
81 .phy_version = EHCI_PHY_NA,
84 static u64 ehci_dmamask = DMA_BIT_MASK(32);
86 /*****************************************************************************
88 ****************************************************************************/
89 static struct resource dove_ehci0_resources[] = {
91 .start = DOVE_USB0_PHYS_BASE,
92 .end = DOVE_USB0_PHYS_BASE + SZ_4K - 1,
93 .flags = IORESOURCE_MEM,
95 .start = IRQ_DOVE_USB0,
97 .flags = IORESOURCE_IRQ,
101 static struct platform_device dove_ehci0 = {
102 .name = "orion-ehci",
105 .dma_mask = &ehci_dmamask,
106 .coherent_dma_mask = DMA_BIT_MASK(32),
107 .platform_data = &dove_ehci_data,
109 .resource = dove_ehci0_resources,
110 .num_resources = ARRAY_SIZE(dove_ehci0_resources),
113 void __init dove_ehci0_init(void)
115 platform_device_register(&dove_ehci0);
118 /*****************************************************************************
120 ****************************************************************************/
121 static struct resource dove_ehci1_resources[] = {
123 .start = DOVE_USB1_PHYS_BASE,
124 .end = DOVE_USB1_PHYS_BASE + SZ_4K - 1,
125 .flags = IORESOURCE_MEM,
127 .start = IRQ_DOVE_USB1,
128 .end = IRQ_DOVE_USB1,
129 .flags = IORESOURCE_IRQ,
133 static struct platform_device dove_ehci1 = {
134 .name = "orion-ehci",
137 .dma_mask = &ehci_dmamask,
138 .coherent_dma_mask = DMA_BIT_MASK(32),
139 .platform_data = &dove_ehci_data,
141 .resource = dove_ehci1_resources,
142 .num_resources = ARRAY_SIZE(dove_ehci1_resources),
145 void __init dove_ehci1_init(void)
147 platform_device_register(&dove_ehci1);
150 /*****************************************************************************
152 ****************************************************************************/
153 struct mv643xx_eth_shared_platform_data dove_ge00_shared_data = {
155 .dram = &dove_mbus_dram_info,
158 static struct resource dove_ge00_shared_resources[] = {
161 .start = DOVE_GE00_PHYS_BASE + 0x2000,
162 .end = DOVE_GE00_PHYS_BASE + SZ_16K - 1,
163 .flags = IORESOURCE_MEM,
167 static struct platform_device dove_ge00_shared = {
168 .name = MV643XX_ETH_SHARED_NAME,
171 .platform_data = &dove_ge00_shared_data,
174 .resource = dove_ge00_shared_resources,
177 static struct resource dove_ge00_resources[] = {
180 .start = IRQ_DOVE_GE00_SUM,
181 .end = IRQ_DOVE_GE00_SUM,
182 .flags = IORESOURCE_IRQ,
186 static struct platform_device dove_ge00 = {
187 .name = MV643XX_ETH_NAME,
190 .resource = dove_ge00_resources,
192 .coherent_dma_mask = 0xffffffff,
196 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
198 eth_data->shared = &dove_ge00_shared;
199 dove_ge00.dev.platform_data = eth_data;
201 platform_device_register(&dove_ge00_shared);
202 platform_device_register(&dove_ge00);
205 /*****************************************************************************
207 ****************************************************************************/
208 static struct resource dove_rtc_resource[] = {
210 .start = DOVE_RTC_PHYS_BASE,
211 .end = DOVE_RTC_PHYS_BASE + 32 - 1,
212 .flags = IORESOURCE_MEM,
214 .start = IRQ_DOVE_RTC,
215 .flags = IORESOURCE_IRQ,
219 void __init dove_rtc_init(void)
221 platform_device_register_simple("rtc-mv", -1, dove_rtc_resource, 2);
224 /*****************************************************************************
226 ****************************************************************************/
227 static struct resource dove_sata_resources[] = {
230 .start = DOVE_SATA_PHYS_BASE,
231 .end = DOVE_SATA_PHYS_BASE + 0x5000 - 1,
232 .flags = IORESOURCE_MEM,
235 .start = IRQ_DOVE_SATA,
236 .end = IRQ_DOVE_SATA,
237 .flags = IORESOURCE_IRQ,
241 static struct platform_device dove_sata = {
245 .coherent_dma_mask = DMA_BIT_MASK(32),
247 .num_resources = ARRAY_SIZE(dove_sata_resources),
248 .resource = dove_sata_resources,
251 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
253 sata_data->dram = &dove_mbus_dram_info;
254 dove_sata.dev.platform_data = sata_data;
255 platform_device_register(&dove_sata);
258 /*****************************************************************************
260 ****************************************************************************/
261 void __init dove_uart0_init(void)
263 orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
264 IRQ_DOVE_UART_0, get_tclk());
267 /*****************************************************************************
269 ****************************************************************************/
270 void __init dove_uart1_init(void)
272 orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
273 IRQ_DOVE_UART_1, get_tclk());
276 /*****************************************************************************
278 ****************************************************************************/
279 void __init dove_uart2_init(void)
281 orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
282 IRQ_DOVE_UART_2, get_tclk());
285 /*****************************************************************************
287 ****************************************************************************/
288 void __init dove_uart3_init(void)
290 orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
291 IRQ_DOVE_UART_3, get_tclk());
294 /*****************************************************************************
296 ****************************************************************************/
297 static struct orion_spi_info dove_spi0_data = {
301 static struct resource dove_spi0_resources[] = {
303 .start = DOVE_SPI0_PHYS_BASE,
304 .end = DOVE_SPI0_PHYS_BASE + SZ_512 - 1,
305 .flags = IORESOURCE_MEM,
307 .start = IRQ_DOVE_SPI0,
308 .end = IRQ_DOVE_SPI0,
309 .flags = IORESOURCE_IRQ,
313 static struct platform_device dove_spi0 = {
316 .resource = dove_spi0_resources,
318 .platform_data = &dove_spi0_data,
320 .num_resources = ARRAY_SIZE(dove_spi0_resources),
323 void __init dove_spi0_init(void)
325 platform_device_register(&dove_spi0);
328 /*****************************************************************************
330 ****************************************************************************/
331 static struct orion_spi_info dove_spi1_data = {
335 static struct resource dove_spi1_resources[] = {
337 .start = DOVE_SPI1_PHYS_BASE,
338 .end = DOVE_SPI1_PHYS_BASE + SZ_512 - 1,
339 .flags = IORESOURCE_MEM,
341 .start = IRQ_DOVE_SPI1,
342 .end = IRQ_DOVE_SPI1,
343 .flags = IORESOURCE_IRQ,
347 static struct platform_device dove_spi1 = {
350 .resource = dove_spi1_resources,
352 .platform_data = &dove_spi1_data,
354 .num_resources = ARRAY_SIZE(dove_spi1_resources),
357 void __init dove_spi1_init(void)
359 platform_device_register(&dove_spi1);
362 /*****************************************************************************
364 ****************************************************************************/
365 static struct mv64xxx_i2c_pdata dove_i2c_data = {
366 .freq_m = 10, /* assumes 166 MHz TCLK gets 94.3kHz */
368 .timeout = 1000, /* Default timeout of 1 second */
371 static struct resource dove_i2c_resources[] = {
374 .start = DOVE_I2C_PHYS_BASE,
375 .end = DOVE_I2C_PHYS_BASE + 0x20 - 1,
376 .flags = IORESOURCE_MEM,
379 .start = IRQ_DOVE_I2C,
381 .flags = IORESOURCE_IRQ,
385 static struct platform_device dove_i2c = {
386 .name = MV64XXX_I2C_CTLR_NAME,
388 .num_resources = ARRAY_SIZE(dove_i2c_resources),
389 .resource = dove_i2c_resources,
391 .platform_data = &dove_i2c_data,
395 void __init dove_i2c_init(void)
397 platform_device_register(&dove_i2c);
400 /*****************************************************************************
402 ****************************************************************************/
403 void __init dove_init_early(void)
405 orion_time_set_base(TIMER_VIRT_BASE);
408 static int get_tclk(void)
410 /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
414 static void dove_timer_init(void)
416 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
417 IRQ_DOVE_BRIDGE, get_tclk());
420 struct sys_timer dove_timer = {
421 .init = dove_timer_init,
424 /*****************************************************************************
426 ****************************************************************************/
427 static struct mv_xor_platform_shared_data dove_xor_shared_data = {
428 .dram = &dove_mbus_dram_info,
431 /*****************************************************************************
433 ****************************************************************************/
434 static u64 dove_xor0_dmamask = DMA_BIT_MASK(32);
436 static struct resource dove_xor0_shared_resources[] = {
439 .start = DOVE_XOR0_PHYS_BASE,
440 .end = DOVE_XOR0_PHYS_BASE + 0xff,
441 .flags = IORESOURCE_MEM,
443 .name = "xor 0 high",
444 .start = DOVE_XOR0_HIGH_PHYS_BASE,
445 .end = DOVE_XOR0_HIGH_PHYS_BASE + 0xff,
446 .flags = IORESOURCE_MEM,
450 static struct platform_device dove_xor0_shared = {
451 .name = MV_XOR_SHARED_NAME,
454 .platform_data = &dove_xor_shared_data,
456 .num_resources = ARRAY_SIZE(dove_xor0_shared_resources),
457 .resource = dove_xor0_shared_resources,
460 static struct resource dove_xor00_resources[] = {
462 .start = IRQ_DOVE_XOR_00,
463 .end = IRQ_DOVE_XOR_00,
464 .flags = IORESOURCE_IRQ,
468 static struct mv_xor_platform_data dove_xor00_data = {
469 .shared = &dove_xor0_shared,
471 .pool_size = PAGE_SIZE,
474 static struct platform_device dove_xor00_channel = {
477 .num_resources = ARRAY_SIZE(dove_xor00_resources),
478 .resource = dove_xor00_resources,
480 .dma_mask = &dove_xor0_dmamask,
481 .coherent_dma_mask = DMA_BIT_MASK(64),
482 .platform_data = &dove_xor00_data,
486 static struct resource dove_xor01_resources[] = {
488 .start = IRQ_DOVE_XOR_01,
489 .end = IRQ_DOVE_XOR_01,
490 .flags = IORESOURCE_IRQ,
494 static struct mv_xor_platform_data dove_xor01_data = {
495 .shared = &dove_xor0_shared,
497 .pool_size = PAGE_SIZE,
500 static struct platform_device dove_xor01_channel = {
503 .num_resources = ARRAY_SIZE(dove_xor01_resources),
504 .resource = dove_xor01_resources,
506 .dma_mask = &dove_xor0_dmamask,
507 .coherent_dma_mask = DMA_BIT_MASK(64),
508 .platform_data = &dove_xor01_data,
512 void __init dove_xor0_init(void)
514 platform_device_register(&dove_xor0_shared);
517 * two engines can't do memset simultaneously, this limitation
518 * satisfied by removing memset support from one of the engines.
520 dma_cap_set(DMA_MEMCPY, dove_xor00_data.cap_mask);
521 dma_cap_set(DMA_XOR, dove_xor00_data.cap_mask);
522 platform_device_register(&dove_xor00_channel);
524 dma_cap_set(DMA_MEMCPY, dove_xor01_data.cap_mask);
525 dma_cap_set(DMA_MEMSET, dove_xor01_data.cap_mask);
526 dma_cap_set(DMA_XOR, dove_xor01_data.cap_mask);
527 platform_device_register(&dove_xor01_channel);
530 /*****************************************************************************
532 ****************************************************************************/
533 static u64 dove_xor1_dmamask = DMA_BIT_MASK(32);
535 static struct resource dove_xor1_shared_resources[] = {
538 .start = DOVE_XOR1_PHYS_BASE,
539 .end = DOVE_XOR1_PHYS_BASE + 0xff,
540 .flags = IORESOURCE_MEM,
542 .name = "xor 0 high",
543 .start = DOVE_XOR1_HIGH_PHYS_BASE,
544 .end = DOVE_XOR1_HIGH_PHYS_BASE + 0xff,
545 .flags = IORESOURCE_MEM,
549 static struct platform_device dove_xor1_shared = {
550 .name = MV_XOR_SHARED_NAME,
553 .platform_data = &dove_xor_shared_data,
555 .num_resources = ARRAY_SIZE(dove_xor1_shared_resources),
556 .resource = dove_xor1_shared_resources,
559 static struct resource dove_xor10_resources[] = {
561 .start = IRQ_DOVE_XOR_10,
562 .end = IRQ_DOVE_XOR_10,
563 .flags = IORESOURCE_IRQ,
567 static struct mv_xor_platform_data dove_xor10_data = {
568 .shared = &dove_xor1_shared,
570 .pool_size = PAGE_SIZE,
573 static struct platform_device dove_xor10_channel = {
576 .num_resources = ARRAY_SIZE(dove_xor10_resources),
577 .resource = dove_xor10_resources,
579 .dma_mask = &dove_xor1_dmamask,
580 .coherent_dma_mask = DMA_BIT_MASK(64),
581 .platform_data = &dove_xor10_data,
585 static struct resource dove_xor11_resources[] = {
587 .start = IRQ_DOVE_XOR_11,
588 .end = IRQ_DOVE_XOR_11,
589 .flags = IORESOURCE_IRQ,
593 static struct mv_xor_platform_data dove_xor11_data = {
594 .shared = &dove_xor1_shared,
596 .pool_size = PAGE_SIZE,
599 static struct platform_device dove_xor11_channel = {
602 .num_resources = ARRAY_SIZE(dove_xor11_resources),
603 .resource = dove_xor11_resources,
605 .dma_mask = &dove_xor1_dmamask,
606 .coherent_dma_mask = DMA_BIT_MASK(64),
607 .platform_data = &dove_xor11_data,
611 void __init dove_xor1_init(void)
613 platform_device_register(&dove_xor1_shared);
616 * two engines can't do memset simultaneously, this limitation
617 * satisfied by removing memset support from one of the engines.
619 dma_cap_set(DMA_MEMCPY, dove_xor10_data.cap_mask);
620 dma_cap_set(DMA_XOR, dove_xor10_data.cap_mask);
621 platform_device_register(&dove_xor10_channel);
623 dma_cap_set(DMA_MEMCPY, dove_xor11_data.cap_mask);
624 dma_cap_set(DMA_MEMSET, dove_xor11_data.cap_mask);
625 dma_cap_set(DMA_XOR, dove_xor11_data.cap_mask);
626 platform_device_register(&dove_xor11_channel);
629 /*****************************************************************************
631 ****************************************************************************/
632 static u64 sdio_dmamask = DMA_BIT_MASK(32);
634 static struct resource dove_sdio0_resources[] = {
636 .start = DOVE_SDIO0_PHYS_BASE,
637 .end = DOVE_SDIO0_PHYS_BASE + 0xff,
638 .flags = IORESOURCE_MEM,
640 .start = IRQ_DOVE_SDIO0,
641 .end = IRQ_DOVE_SDIO0,
642 .flags = IORESOURCE_IRQ,
646 static struct platform_device dove_sdio0 = {
647 .name = "sdhci-dove",
650 .dma_mask = &sdio_dmamask,
651 .coherent_dma_mask = DMA_BIT_MASK(32),
653 .resource = dove_sdio0_resources,
654 .num_resources = ARRAY_SIZE(dove_sdio0_resources),
657 void __init dove_sdio0_init(void)
659 platform_device_register(&dove_sdio0);
662 static struct resource dove_sdio1_resources[] = {
664 .start = DOVE_SDIO1_PHYS_BASE,
665 .end = DOVE_SDIO1_PHYS_BASE + 0xff,
666 .flags = IORESOURCE_MEM,
668 .start = IRQ_DOVE_SDIO1,
669 .end = IRQ_DOVE_SDIO1,
670 .flags = IORESOURCE_IRQ,
674 static struct platform_device dove_sdio1 = {
675 .name = "sdhci-dove",
678 .dma_mask = &sdio_dmamask,
679 .coherent_dma_mask = DMA_BIT_MASK(32),
681 .resource = dove_sdio1_resources,
682 .num_resources = ARRAY_SIZE(dove_sdio1_resources),
685 void __init dove_sdio1_init(void)
687 platform_device_register(&dove_sdio1);
690 void __init dove_init(void)
696 printk(KERN_INFO "Dove 88AP510 SoC, ");
697 printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000);
699 #ifdef CONFIG_CACHE_TAUROS2
702 dove_setup_cpu_mbus();
704 dove_ge00_shared_data.t_clk = tclk;
705 dove_spi0_data.tclk = tclk;
706 dove_spi1_data.tclk = tclk;
708 /* internal devices that every board has */