2 * arch/arm/mach-dove/common.c
4 * Core functions for Marvell Dove 88AP510 System On Chip
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/pci.h>
16 #include <linux/serial_8250.h>
17 #include <linux/clk.h>
18 #include <linux/mbus.h>
19 #include <linux/mv643xx_eth.h>
20 #include <linux/mv643xx_i2c.h>
21 #include <linux/ata_platform.h>
22 #include <linux/serial_8250.h>
23 #include <linux/spi/orion_spi.h>
24 #include <linux/gpio.h>
26 #include <asm/setup.h>
27 #include <asm/timex.h>
28 #include <asm/hardware/cache-tauros2.h>
29 #include <asm/mach/map.h>
30 #include <asm/mach/time.h>
31 #include <asm/mach/pci.h>
32 #include <mach/dove.h>
33 #include <mach/bridge-regs.h>
34 #include <asm/mach/arch.h>
35 #include <linux/irq.h>
36 #include <plat/mv_xor.h>
37 #include <plat/ehci-orion.h>
38 #include <plat/time.h>
39 #include <plat/common.h>
42 static int get_tclk(void);
44 /*****************************************************************************
46 ****************************************************************************/
47 static struct map_desc dove_io_desc[] __initdata = {
49 .virtual = DOVE_SB_REGS_VIRT_BASE,
50 .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
51 .length = DOVE_SB_REGS_SIZE,
54 .virtual = DOVE_NB_REGS_VIRT_BASE,
55 .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
56 .length = DOVE_NB_REGS_SIZE,
59 .virtual = DOVE_PCIE0_IO_VIRT_BASE,
60 .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
61 .length = DOVE_PCIE0_IO_SIZE,
64 .virtual = DOVE_PCIE1_IO_VIRT_BASE,
65 .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
66 .length = DOVE_PCIE1_IO_SIZE,
71 void __init dove_map_io(void)
73 iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
76 /*****************************************************************************
78 ****************************************************************************/
79 static struct orion_ehci_data dove_ehci_data = {
80 .dram = &dove_mbus_dram_info,
81 .phy_version = EHCI_PHY_NA,
84 static u64 ehci_dmamask = DMA_BIT_MASK(32);
86 /*****************************************************************************
88 ****************************************************************************/
89 static struct resource dove_ehci0_resources[] = {
91 .start = DOVE_USB0_PHYS_BASE,
92 .end = DOVE_USB0_PHYS_BASE + SZ_4K - 1,
93 .flags = IORESOURCE_MEM,
95 .start = IRQ_DOVE_USB0,
97 .flags = IORESOURCE_IRQ,
101 static struct platform_device dove_ehci0 = {
102 .name = "orion-ehci",
105 .dma_mask = &ehci_dmamask,
106 .coherent_dma_mask = DMA_BIT_MASK(32),
107 .platform_data = &dove_ehci_data,
109 .resource = dove_ehci0_resources,
110 .num_resources = ARRAY_SIZE(dove_ehci0_resources),
113 void __init dove_ehci0_init(void)
115 platform_device_register(&dove_ehci0);
118 /*****************************************************************************
120 ****************************************************************************/
121 static struct resource dove_ehci1_resources[] = {
123 .start = DOVE_USB1_PHYS_BASE,
124 .end = DOVE_USB1_PHYS_BASE + SZ_4K - 1,
125 .flags = IORESOURCE_MEM,
127 .start = IRQ_DOVE_USB1,
128 .end = IRQ_DOVE_USB1,
129 .flags = IORESOURCE_IRQ,
133 static struct platform_device dove_ehci1 = {
134 .name = "orion-ehci",
137 .dma_mask = &ehci_dmamask,
138 .coherent_dma_mask = DMA_BIT_MASK(32),
139 .platform_data = &dove_ehci_data,
141 .resource = dove_ehci1_resources,
142 .num_resources = ARRAY_SIZE(dove_ehci1_resources),
145 void __init dove_ehci1_init(void)
147 platform_device_register(&dove_ehci1);
150 /*****************************************************************************
152 ****************************************************************************/
153 struct mv643xx_eth_shared_platform_data dove_ge00_shared_data = {
155 .dram = &dove_mbus_dram_info,
158 static struct resource dove_ge00_shared_resources[] = {
161 .start = DOVE_GE00_PHYS_BASE + 0x2000,
162 .end = DOVE_GE00_PHYS_BASE + SZ_16K - 1,
163 .flags = IORESOURCE_MEM,
167 static struct platform_device dove_ge00_shared = {
168 .name = MV643XX_ETH_SHARED_NAME,
171 .platform_data = &dove_ge00_shared_data,
174 .resource = dove_ge00_shared_resources,
177 static struct resource dove_ge00_resources[] = {
180 .start = IRQ_DOVE_GE00_SUM,
181 .end = IRQ_DOVE_GE00_SUM,
182 .flags = IORESOURCE_IRQ,
186 static struct platform_device dove_ge00 = {
187 .name = MV643XX_ETH_NAME,
190 .resource = dove_ge00_resources,
192 .coherent_dma_mask = 0xffffffff,
196 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
198 eth_data->shared = &dove_ge00_shared;
199 dove_ge00.dev.platform_data = eth_data;
201 platform_device_register(&dove_ge00_shared);
202 platform_device_register(&dove_ge00);
205 /*****************************************************************************
207 ****************************************************************************/
208 void __init dove_rtc_init(void)
210 orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
213 /*****************************************************************************
215 ****************************************************************************/
216 static struct resource dove_sata_resources[] = {
219 .start = DOVE_SATA_PHYS_BASE,
220 .end = DOVE_SATA_PHYS_BASE + 0x5000 - 1,
221 .flags = IORESOURCE_MEM,
224 .start = IRQ_DOVE_SATA,
225 .end = IRQ_DOVE_SATA,
226 .flags = IORESOURCE_IRQ,
230 static struct platform_device dove_sata = {
234 .coherent_dma_mask = DMA_BIT_MASK(32),
236 .num_resources = ARRAY_SIZE(dove_sata_resources),
237 .resource = dove_sata_resources,
240 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
242 sata_data->dram = &dove_mbus_dram_info;
243 dove_sata.dev.platform_data = sata_data;
244 platform_device_register(&dove_sata);
247 /*****************************************************************************
249 ****************************************************************************/
250 void __init dove_uart0_init(void)
252 orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
253 IRQ_DOVE_UART_0, get_tclk());
256 /*****************************************************************************
258 ****************************************************************************/
259 void __init dove_uart1_init(void)
261 orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
262 IRQ_DOVE_UART_1, get_tclk());
265 /*****************************************************************************
267 ****************************************************************************/
268 void __init dove_uart2_init(void)
270 orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
271 IRQ_DOVE_UART_2, get_tclk());
274 /*****************************************************************************
276 ****************************************************************************/
277 void __init dove_uart3_init(void)
279 orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
280 IRQ_DOVE_UART_3, get_tclk());
283 /*****************************************************************************
285 ****************************************************************************/
286 static struct orion_spi_info dove_spi0_data = {
290 static struct resource dove_spi0_resources[] = {
292 .start = DOVE_SPI0_PHYS_BASE,
293 .end = DOVE_SPI0_PHYS_BASE + SZ_512 - 1,
294 .flags = IORESOURCE_MEM,
296 .start = IRQ_DOVE_SPI0,
297 .end = IRQ_DOVE_SPI0,
298 .flags = IORESOURCE_IRQ,
302 static struct platform_device dove_spi0 = {
305 .resource = dove_spi0_resources,
307 .platform_data = &dove_spi0_data,
309 .num_resources = ARRAY_SIZE(dove_spi0_resources),
312 void __init dove_spi0_init(void)
314 platform_device_register(&dove_spi0);
317 /*****************************************************************************
319 ****************************************************************************/
320 static struct orion_spi_info dove_spi1_data = {
324 static struct resource dove_spi1_resources[] = {
326 .start = DOVE_SPI1_PHYS_BASE,
327 .end = DOVE_SPI1_PHYS_BASE + SZ_512 - 1,
328 .flags = IORESOURCE_MEM,
330 .start = IRQ_DOVE_SPI1,
331 .end = IRQ_DOVE_SPI1,
332 .flags = IORESOURCE_IRQ,
336 static struct platform_device dove_spi1 = {
339 .resource = dove_spi1_resources,
341 .platform_data = &dove_spi1_data,
343 .num_resources = ARRAY_SIZE(dove_spi1_resources),
346 void __init dove_spi1_init(void)
348 platform_device_register(&dove_spi1);
351 /*****************************************************************************
353 ****************************************************************************/
354 static struct mv64xxx_i2c_pdata dove_i2c_data = {
355 .freq_m = 10, /* assumes 166 MHz TCLK gets 94.3kHz */
357 .timeout = 1000, /* Default timeout of 1 second */
360 static struct resource dove_i2c_resources[] = {
363 .start = DOVE_I2C_PHYS_BASE,
364 .end = DOVE_I2C_PHYS_BASE + 0x20 - 1,
365 .flags = IORESOURCE_MEM,
368 .start = IRQ_DOVE_I2C,
370 .flags = IORESOURCE_IRQ,
374 static struct platform_device dove_i2c = {
375 .name = MV64XXX_I2C_CTLR_NAME,
377 .num_resources = ARRAY_SIZE(dove_i2c_resources),
378 .resource = dove_i2c_resources,
380 .platform_data = &dove_i2c_data,
384 void __init dove_i2c_init(void)
386 platform_device_register(&dove_i2c);
389 /*****************************************************************************
391 ****************************************************************************/
392 void __init dove_init_early(void)
394 orion_time_set_base(TIMER_VIRT_BASE);
397 static int get_tclk(void)
399 /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
403 static void dove_timer_init(void)
405 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
406 IRQ_DOVE_BRIDGE, get_tclk());
409 struct sys_timer dove_timer = {
410 .init = dove_timer_init,
413 /*****************************************************************************
415 ****************************************************************************/
416 static struct mv_xor_platform_shared_data dove_xor_shared_data = {
417 .dram = &dove_mbus_dram_info,
420 /*****************************************************************************
422 ****************************************************************************/
423 static u64 dove_xor0_dmamask = DMA_BIT_MASK(32);
425 static struct resource dove_xor0_shared_resources[] = {
428 .start = DOVE_XOR0_PHYS_BASE,
429 .end = DOVE_XOR0_PHYS_BASE + 0xff,
430 .flags = IORESOURCE_MEM,
432 .name = "xor 0 high",
433 .start = DOVE_XOR0_HIGH_PHYS_BASE,
434 .end = DOVE_XOR0_HIGH_PHYS_BASE + 0xff,
435 .flags = IORESOURCE_MEM,
439 static struct platform_device dove_xor0_shared = {
440 .name = MV_XOR_SHARED_NAME,
443 .platform_data = &dove_xor_shared_data,
445 .num_resources = ARRAY_SIZE(dove_xor0_shared_resources),
446 .resource = dove_xor0_shared_resources,
449 static struct resource dove_xor00_resources[] = {
451 .start = IRQ_DOVE_XOR_00,
452 .end = IRQ_DOVE_XOR_00,
453 .flags = IORESOURCE_IRQ,
457 static struct mv_xor_platform_data dove_xor00_data = {
458 .shared = &dove_xor0_shared,
460 .pool_size = PAGE_SIZE,
463 static struct platform_device dove_xor00_channel = {
466 .num_resources = ARRAY_SIZE(dove_xor00_resources),
467 .resource = dove_xor00_resources,
469 .dma_mask = &dove_xor0_dmamask,
470 .coherent_dma_mask = DMA_BIT_MASK(64),
471 .platform_data = &dove_xor00_data,
475 static struct resource dove_xor01_resources[] = {
477 .start = IRQ_DOVE_XOR_01,
478 .end = IRQ_DOVE_XOR_01,
479 .flags = IORESOURCE_IRQ,
483 static struct mv_xor_platform_data dove_xor01_data = {
484 .shared = &dove_xor0_shared,
486 .pool_size = PAGE_SIZE,
489 static struct platform_device dove_xor01_channel = {
492 .num_resources = ARRAY_SIZE(dove_xor01_resources),
493 .resource = dove_xor01_resources,
495 .dma_mask = &dove_xor0_dmamask,
496 .coherent_dma_mask = DMA_BIT_MASK(64),
497 .platform_data = &dove_xor01_data,
501 void __init dove_xor0_init(void)
503 platform_device_register(&dove_xor0_shared);
506 * two engines can't do memset simultaneously, this limitation
507 * satisfied by removing memset support from one of the engines.
509 dma_cap_set(DMA_MEMCPY, dove_xor00_data.cap_mask);
510 dma_cap_set(DMA_XOR, dove_xor00_data.cap_mask);
511 platform_device_register(&dove_xor00_channel);
513 dma_cap_set(DMA_MEMCPY, dove_xor01_data.cap_mask);
514 dma_cap_set(DMA_MEMSET, dove_xor01_data.cap_mask);
515 dma_cap_set(DMA_XOR, dove_xor01_data.cap_mask);
516 platform_device_register(&dove_xor01_channel);
519 /*****************************************************************************
521 ****************************************************************************/
522 static u64 dove_xor1_dmamask = DMA_BIT_MASK(32);
524 static struct resource dove_xor1_shared_resources[] = {
527 .start = DOVE_XOR1_PHYS_BASE,
528 .end = DOVE_XOR1_PHYS_BASE + 0xff,
529 .flags = IORESOURCE_MEM,
531 .name = "xor 0 high",
532 .start = DOVE_XOR1_HIGH_PHYS_BASE,
533 .end = DOVE_XOR1_HIGH_PHYS_BASE + 0xff,
534 .flags = IORESOURCE_MEM,
538 static struct platform_device dove_xor1_shared = {
539 .name = MV_XOR_SHARED_NAME,
542 .platform_data = &dove_xor_shared_data,
544 .num_resources = ARRAY_SIZE(dove_xor1_shared_resources),
545 .resource = dove_xor1_shared_resources,
548 static struct resource dove_xor10_resources[] = {
550 .start = IRQ_DOVE_XOR_10,
551 .end = IRQ_DOVE_XOR_10,
552 .flags = IORESOURCE_IRQ,
556 static struct mv_xor_platform_data dove_xor10_data = {
557 .shared = &dove_xor1_shared,
559 .pool_size = PAGE_SIZE,
562 static struct platform_device dove_xor10_channel = {
565 .num_resources = ARRAY_SIZE(dove_xor10_resources),
566 .resource = dove_xor10_resources,
568 .dma_mask = &dove_xor1_dmamask,
569 .coherent_dma_mask = DMA_BIT_MASK(64),
570 .platform_data = &dove_xor10_data,
574 static struct resource dove_xor11_resources[] = {
576 .start = IRQ_DOVE_XOR_11,
577 .end = IRQ_DOVE_XOR_11,
578 .flags = IORESOURCE_IRQ,
582 static struct mv_xor_platform_data dove_xor11_data = {
583 .shared = &dove_xor1_shared,
585 .pool_size = PAGE_SIZE,
588 static struct platform_device dove_xor11_channel = {
591 .num_resources = ARRAY_SIZE(dove_xor11_resources),
592 .resource = dove_xor11_resources,
594 .dma_mask = &dove_xor1_dmamask,
595 .coherent_dma_mask = DMA_BIT_MASK(64),
596 .platform_data = &dove_xor11_data,
600 void __init dove_xor1_init(void)
602 platform_device_register(&dove_xor1_shared);
605 * two engines can't do memset simultaneously, this limitation
606 * satisfied by removing memset support from one of the engines.
608 dma_cap_set(DMA_MEMCPY, dove_xor10_data.cap_mask);
609 dma_cap_set(DMA_XOR, dove_xor10_data.cap_mask);
610 platform_device_register(&dove_xor10_channel);
612 dma_cap_set(DMA_MEMCPY, dove_xor11_data.cap_mask);
613 dma_cap_set(DMA_MEMSET, dove_xor11_data.cap_mask);
614 dma_cap_set(DMA_XOR, dove_xor11_data.cap_mask);
615 platform_device_register(&dove_xor11_channel);
618 /*****************************************************************************
620 ****************************************************************************/
621 static u64 sdio_dmamask = DMA_BIT_MASK(32);
623 static struct resource dove_sdio0_resources[] = {
625 .start = DOVE_SDIO0_PHYS_BASE,
626 .end = DOVE_SDIO0_PHYS_BASE + 0xff,
627 .flags = IORESOURCE_MEM,
629 .start = IRQ_DOVE_SDIO0,
630 .end = IRQ_DOVE_SDIO0,
631 .flags = IORESOURCE_IRQ,
635 static struct platform_device dove_sdio0 = {
636 .name = "sdhci-dove",
639 .dma_mask = &sdio_dmamask,
640 .coherent_dma_mask = DMA_BIT_MASK(32),
642 .resource = dove_sdio0_resources,
643 .num_resources = ARRAY_SIZE(dove_sdio0_resources),
646 void __init dove_sdio0_init(void)
648 platform_device_register(&dove_sdio0);
651 static struct resource dove_sdio1_resources[] = {
653 .start = DOVE_SDIO1_PHYS_BASE,
654 .end = DOVE_SDIO1_PHYS_BASE + 0xff,
655 .flags = IORESOURCE_MEM,
657 .start = IRQ_DOVE_SDIO1,
658 .end = IRQ_DOVE_SDIO1,
659 .flags = IORESOURCE_IRQ,
663 static struct platform_device dove_sdio1 = {
664 .name = "sdhci-dove",
667 .dma_mask = &sdio_dmamask,
668 .coherent_dma_mask = DMA_BIT_MASK(32),
670 .resource = dove_sdio1_resources,
671 .num_resources = ARRAY_SIZE(dove_sdio1_resources),
674 void __init dove_sdio1_init(void)
676 platform_device_register(&dove_sdio1);
679 void __init dove_init(void)
685 printk(KERN_INFO "Dove 88AP510 SoC, ");
686 printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000);
688 #ifdef CONFIG_CACHE_TAUROS2
691 dove_setup_cpu_mbus();
693 dove_ge00_shared_data.t_clk = tclk;
694 dove_spi0_data.tclk = tclk;
695 dove_spi1_data.tclk = tclk;
697 /* internal devices that every board has */