arch/arm/mach-at91/setup.c

   1 /*
   2  * Copyright (C) 2007 Atmel Corporation.
   3  * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
   4  *
   5  * Under GPLv2
   6  */
   7
   8 #define pr_fmt(fmt)     "AT91: " fmt
   9
  10 #include <linux/module.h>
  11 #include <linux/io.h>
  12 #include <linux/mm.h>
  13 #include <linux/pm.h>
  14 #include <linux/of_address.h>
  15 #include <linux/pinctrl/machine.h>
  16 #include <linux/clk/at91_pmc.h>
  17
  18 #include <asm/system_misc.h>
  19 #include <asm/mach/map.h>
  20
  21 #include <mach/hardware.h>
  22 #include <mach/cpu.h>
  23 #include <mach/at91_dbgu.h>
  24
  25 #include "soc.h"
  26 #include "generic.h"
  27 #include "pm.h"
  28
  29 struct at91_init_soc __initdata at91_boot_soc;
  30
  31 struct at91_socinfo at91_soc_initdata;
  32 EXPORT_SYMBOL(at91_soc_initdata);
  33
  34 void __init at91rm9200_set_type(int type)
  35 {
  36         if (type == ARCH_REVISON_9200_PQFP)
  37                 at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP;
  38         else
  39                 at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
  40
  41         pr_info("filled in soc subtype: %s\n",
  42                 at91_get_soc_subtype(&at91_soc_initdata));
  43 }
  44
  45 void __iomem *at91_ramc_base[2];
  46 EXPORT_SYMBOL_GPL(at91_ramc_base);
  47
  48 static struct map_desc sram_desc[2] __initdata;
  49
  50 void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
  51 {
  52         struct map_desc *desc = &sram_desc[bank];
  53
  54         desc->virtual = (unsigned long)AT91_IO_VIRT_BASE - length;
  55         if (bank > 0)
  56                 desc->virtual -= sram_desc[bank - 1].length;
  57
  58         desc->pfn = __phys_to_pfn(base);
  59         desc->length = length;
  60         desc->type = MT_MEMORY_RWX_NONCACHED;
  61
  62         pr_info("sram at 0x%lx of 0x%x mapped at 0x%lx\n",
  63                 base, length, desc->virtual);
  64
  65         iotable_init(desc, 1);
  66 }
  67
  68 static struct map_desc at91_io_desc __initdata __maybe_unused = {
  69         .virtual        = (unsigned long)AT91_VA_BASE_SYS,
  70         .pfn            = __phys_to_pfn(AT91_BASE_SYS),
  71         .length         = SZ_16K,
  72         .type           = MT_DEVICE,
  73 };
  74
  75 static struct map_desc at91_alt_io_desc __initdata __maybe_unused = {
  76         .virtual        = (unsigned long)AT91_ALT_VA_BASE_SYS,
  77         .pfn            = __phys_to_pfn(AT91_ALT_BASE_SYS),
  78         .length         = 24 * SZ_1K,
  79         .type           = MT_DEVICE,
  80 };
  81
  82 static void __init soc_detect(u32 dbgu_base)
  83 {
  84         u32 cidr, socid;
  85
  86         cidr = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
  87         socid = cidr & ~AT91_CIDR_VERSION;
  88
  89         switch (socid) {
  90         case ARCH_ID_AT91RM9200:
  91                 at91_soc_initdata.type = AT91_SOC_RM9200;
  92                 if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_UNKNOWN)
  93                         at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
  94                 at91_boot_soc = at91rm9200_soc;
  95                 break;
  96
  97         case ARCH_ID_AT91SAM9260:
  98                 at91_soc_initdata.type = AT91_SOC_SAM9260;
  99                 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
 100                 at91_boot_soc = at91sam9260_soc;
 101                 break;
 102
 103         case ARCH_ID_AT91SAM9261:
 104                 at91_soc_initdata.type = AT91_SOC_SAM9261;
 105                 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
 106                 at91_boot_soc = at91sam9261_soc;
 107                 break;
 108
 109         case ARCH_ID_AT91SAM9263:
 110                 at91_soc_initdata.type = AT91_SOC_SAM9263;
 111                 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
 112                 at91_boot_soc = at91sam9263_soc;
 113                 break;
 114
 115         case ARCH_ID_AT91SAM9G20:
 116                 at91_soc_initdata.type = AT91_SOC_SAM9G20;
 117                 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
 118                 at91_boot_soc = at91sam9260_soc;
 119                 break;
 120
 121         case ARCH_ID_AT91SAM9G45:
 122                 at91_soc_initdata.type = AT91_SOC_SAM9G45;
 123                 if (cidr == ARCH_ID_AT91SAM9G45ES)
 124                         at91_soc_initdata.subtype = AT91_SOC_SAM9G45ES;
 125                 at91_boot_soc = at91sam9g45_soc;
 126                 break;
 127
 128         case ARCH_ID_AT91SAM9RL64:
 129                 at91_soc_initdata.type = AT91_SOC_SAM9RL;
 130                 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
 131                 at91_boot_soc = at91sam9rl_soc;
 132                 break;
 133
 134         case ARCH_ID_AT91SAM9X5:
 135                 at91_soc_initdata.type = AT91_SOC_SAM9X5;
 136                 at91_boot_soc = at91sam9x5_soc;
 137                 break;
 138
 139         case ARCH_ID_AT91SAM9N12:
 140                 at91_soc_initdata.type = AT91_SOC_SAM9N12;
 141                 at91_boot_soc = at91sam9n12_soc;
 142                 break;
 143
 144         case ARCH_ID_SAMA5:
 145                 at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
 146                 if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
 147                         at91_soc_initdata.type = AT91_SOC_SAMA5D3;
 148                         at91_boot_soc = sama5d3_soc;
 149                 }
 150                 break;
 151         }
 152
 153         /* at91sam9g10 */
 154         if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
 155                 at91_soc_initdata.type = AT91_SOC_SAM9G10;
 156                 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
 157                 at91_boot_soc = at91sam9261_soc;
 158         }
 159         /* at91sam9xe */
 160         else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
 161                 at91_soc_initdata.type = AT91_SOC_SAM9260;
 162                 at91_soc_initdata.subtype = AT91_SOC_SAM9XE;
 163                 at91_boot_soc = at91sam9260_soc;
 164         }
 165
 166         if (!at91_soc_is_detected())
 167                 return;
 168
 169         at91_soc_initdata.cidr = cidr;
 170
 171         /* sub version of soc */
 172         if (!at91_soc_initdata.exid)
 173                 at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
 174
 175         if (at91_soc_initdata.type == AT91_SOC_SAM9G45) {
 176                 switch (at91_soc_initdata.exid) {
 177                 case ARCH_EXID_AT91SAM9M10:
 178                         at91_soc_initdata.subtype = AT91_SOC_SAM9M10;
 179                         break;
 180                 case ARCH_EXID_AT91SAM9G46:
 181                         at91_soc_initdata.subtype = AT91_SOC_SAM9G46;
 182                         break;
 183                 case ARCH_EXID_AT91SAM9M11:
 184                         at91_soc_initdata.subtype = AT91_SOC_SAM9M11;
 185                         break;
 186                 }
 187         }
 188
 189         if (at91_soc_initdata.type == AT91_SOC_SAM9X5) {
 190                 switch (at91_soc_initdata.exid) {
 191                 case ARCH_EXID_AT91SAM9G15:
 192                         at91_soc_initdata.subtype = AT91_SOC_SAM9G15;
 193                         break;
 194                 case ARCH_EXID_AT91SAM9G35:
 195                         at91_soc_initdata.subtype = AT91_SOC_SAM9G35;
 196                         break;
 197                 case ARCH_EXID_AT91SAM9X35:
 198                         at91_soc_initdata.subtype = AT91_SOC_SAM9X35;
 199                         break;
 200                 case ARCH_EXID_AT91SAM9G25:
 201                         at91_soc_initdata.subtype = AT91_SOC_SAM9G25;
 202                         break;
 203                 case ARCH_EXID_AT91SAM9X25:
 204                         at91_soc_initdata.subtype = AT91_SOC_SAM9X25;
 205                         break;
 206                 }
 207         }
 208
 209         if (at91_soc_initdata.type == AT91_SOC_SAMA5D3) {
 210                 switch (at91_soc_initdata.exid) {
 211                 case ARCH_EXID_SAMA5D31:
 212                         at91_soc_initdata.subtype = AT91_SOC_SAMA5D31;
 213                         break;
 214                 case ARCH_EXID_SAMA5D33:
 215                         at91_soc_initdata.subtype = AT91_SOC_SAMA5D33;
 216                         break;
 217                 case ARCH_EXID_SAMA5D34:
 218                         at91_soc_initdata.subtype = AT91_SOC_SAMA5D34;
 219                         break;
 220                 case ARCH_EXID_SAMA5D35:
 221                         at91_soc_initdata.subtype = AT91_SOC_SAMA5D35;
 222                         break;
 223                 case ARCH_EXID_SAMA5D36:
 224                         at91_soc_initdata.subtype = AT91_SOC_SAMA5D36;
 225                         break;
 226                 }
 227         }
 228 }
 229
 230 static void __init alt_soc_detect(u32 dbgu_base)
 231 {
 232         u32 cidr, socid;
 233
 234         /* SoC ID */
 235         cidr = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
 236         socid = cidr & ~AT91_CIDR_VERSION;
 237
 238         switch (socid) {
 239         case ARCH_ID_SAMA5:
 240                 at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
 241                 if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
 242                         at91_soc_initdata.type = AT91_SOC_SAMA5D3;
 243                         at91_boot_soc = sama5d3_soc;
 244                 } else if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D4) {
 245                         at91_soc_initdata.type = AT91_SOC_SAMA5D4;
 246                         at91_boot_soc = sama5d4_soc;
 247                 }
 248                 break;
 249         }
 250
 251         if (!at91_soc_is_detected())
 252                 return;
 253
 254         at91_soc_initdata.cidr = cidr;
 255
 256         /* sub version of soc */
 257         if (!at91_soc_initdata.exid)
 258                 at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
 259
 260         if (at91_soc_initdata.type == AT91_SOC_SAMA5D4) {
 261                 switch (at91_soc_initdata.exid) {
 262                 case ARCH_EXID_SAMA5D41:
 263                         at91_soc_initdata.subtype = AT91_SOC_SAMA5D41;
 264                         break;
 265                 case ARCH_EXID_SAMA5D42:
 266                         at91_soc_initdata.subtype = AT91_SOC_SAMA5D42;
 267                         break;
 268                 case ARCH_EXID_SAMA5D43:
 269                         at91_soc_initdata.subtype = AT91_SOC_SAMA5D43;
 270                         break;
 271                 case ARCH_EXID_SAMA5D44:
 272                         at91_soc_initdata.subtype = AT91_SOC_SAMA5D44;
 273                         break;
 274                 }
 275         }
 276 }
 277
 278 static const char *soc_name[] = {
 279         [AT91_SOC_RM9200]       = "at91rm9200",
 280         [AT91_SOC_SAM9260]      = "at91sam9260",
 281         [AT91_SOC_SAM9261]      = "at91sam9261",
 282         [AT91_SOC_SAM9263]      = "at91sam9263",
 283         [AT91_SOC_SAM9G10]      = "at91sam9g10",
 284         [AT91_SOC_SAM9G20]      = "at91sam9g20",
 285         [AT91_SOC_SAM9G45]      = "at91sam9g45",
 286         [AT91_SOC_SAM9RL]       = "at91sam9rl",
 287         [AT91_SOC_SAM9X5]       = "at91sam9x5",
 288         [AT91_SOC_SAM9N12]      = "at91sam9n12",
 289         [AT91_SOC_SAMA5D3]      = "sama5d3",
 290         [AT91_SOC_SAMA5D4]      = "sama5d4",
 291         [AT91_SOC_UNKNOWN]      = "Unknown",
 292 };
 293
 294 const char *at91_get_soc_type(struct at91_socinfo *c)
 295 {
 296         return soc_name[c->type];
 297 }
 298 EXPORT_SYMBOL(at91_get_soc_type);
 299
 300 static const char *soc_subtype_name[] = {
 301         [AT91_SOC_RM9200_BGA]   = "at91rm9200 BGA",
 302         [AT91_SOC_RM9200_PQFP]  = "at91rm9200 PQFP",
 303         [AT91_SOC_SAM9XE]       = "at91sam9xe",
 304         [AT91_SOC_SAM9G45ES]    = "at91sam9g45es",
 305         [AT91_SOC_SAM9M10]      = "at91sam9m10",
 306         [AT91_SOC_SAM9G46]      = "at91sam9g46",
 307         [AT91_SOC_SAM9M11]      = "at91sam9m11",
 308         [AT91_SOC_SAM9G15]      = "at91sam9g15",
 309         [AT91_SOC_SAM9G35]      = "at91sam9g35",
 310         [AT91_SOC_SAM9X35]      = "at91sam9x35",
 311         [AT91_SOC_SAM9G25]      = "at91sam9g25",
 312         [AT91_SOC_SAM9X25]      = "at91sam9x25",
 313         [AT91_SOC_SAMA5D31]     = "sama5d31",
 314         [AT91_SOC_SAMA5D33]     = "sama5d33",
 315         [AT91_SOC_SAMA5D34]     = "sama5d34",
 316         [AT91_SOC_SAMA5D35]     = "sama5d35",
 317         [AT91_SOC_SAMA5D36]     = "sama5d36",
 318         [AT91_SOC_SAMA5D41]     = "sama5d41",
 319         [AT91_SOC_SAMA5D42]     = "sama5d42",
 320         [AT91_SOC_SAMA5D43]     = "sama5d43",
 321         [AT91_SOC_SAMA5D44]     = "sama5d44",
 322         [AT91_SOC_SUBTYPE_NONE] = "None",
 323         [AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown",
 324 };
 325
 326 const char *at91_get_soc_subtype(struct at91_socinfo *c)
 327 {
 328         return soc_subtype_name[c->subtype];
 329 }
 330 EXPORT_SYMBOL(at91_get_soc_subtype);
 331
 332 void __init at91_map_io(void)
 333 {
 334         /* Map peripherals */
 335         iotable_init(&at91_io_desc, 1);
 336
 337         at91_soc_initdata.type = AT91_SOC_UNKNOWN;
 338         at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
 339
 340         soc_detect(AT91_BASE_DBGU0);
 341         if (!at91_soc_is_detected())
 342                 soc_detect(AT91_BASE_DBGU1);
 343
 344         if (!at91_soc_is_detected())
 345                 panic(pr_fmt("Impossible to detect the SOC type"));
 346
 347         pr_info("Detected soc type: %s\n",
 348                 at91_get_soc_type(&at91_soc_initdata));
 349         if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
 350                 pr_info("Detected soc subtype: %s\n",
 351                         at91_get_soc_subtype(&at91_soc_initdata));
 352
 353         if (!at91_soc_is_enabled())
 354                 panic(pr_fmt("Soc not enabled"));
 355
 356         if (at91_boot_soc.map_io)
 357                 at91_boot_soc.map_io();
 358 }
 359
 360 void __init at91_alt_map_io(void)
 361 {
 362         /* Map peripherals */
 363         iotable_init(&at91_alt_io_desc, 1);
 364
 365         at91_soc_initdata.type = AT91_SOC_UNKNOWN;
 366         at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
 367
 368         alt_soc_detect(AT91_BASE_DBGU2);
 369         if (!at91_soc_is_detected())
 370                 panic("AT91: Impossible to detect the SOC type");
 371
 372         pr_info("AT91: Detected soc type: %s\n",
 373                 at91_get_soc_type(&at91_soc_initdata));
 374         if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
 375                 pr_info("AT91: Detected soc subtype: %s\n",
 376                         at91_get_soc_subtype(&at91_soc_initdata));
 377
 378         if (!at91_soc_is_enabled())
 379                 panic("AT91: Soc not enabled");
 380
 381         if (at91_boot_soc.map_io)
 382                 at91_boot_soc.map_io();
 383 }
 384
 385 void __iomem *at91_matrix_base;
 386 EXPORT_SYMBOL_GPL(at91_matrix_base);
 387
 388 void __init at91_ioremap_matrix(u32 base_addr)
 389 {
 390         at91_matrix_base = ioremap(base_addr, 512);
 391         if (!at91_matrix_base)
 392                 panic(pr_fmt("Impossible to ioremap at91_matrix_base\n"));
 393 }
 394
 395 static struct of_device_id ramc_ids[] = {
 396         { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
 397         { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
 398         { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },
 399         { .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby },
 400         { /*sentinel*/ }
 401 };
 402
 403 static void at91_dt_ramc(void)
 404 {
 405         struct device_node *np;
 406         const struct of_device_id *of_id;
 407         int idx = 0;
 408         const void *standby = NULL;
 409
 410         for_each_matching_node_and_match(np, ramc_ids, &of_id) {
 411                 at91_ramc_base[idx] = of_iomap(np, 0);
 412                 if (!at91_ramc_base[idx])
 413                         panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx);
 414
 415                 if (!standby)
 416                         standby = of_id->data;
 417
 418                 idx++;
 419         }
 420
 421         if (!idx)
 422                 panic(pr_fmt("unable to find compatible ram controller node in dtb\n"));
 423
 424         if (!standby) {
 425                 pr_warn("ramc no standby function available\n");
 426                 return;
 427         }
 428
 429         at91_pm_set_standby(standby);
 430 }
 431
 432 void __init at91rm9200_dt_initialize(void)
 433 {
 434         at91_dt_ramc();
 435
 436         at91_boot_soc.init();
 437 }
 438
 439 void __init at91_dt_initialize(void)
 440 {
 441         at91_dt_ramc();
 442
 443         if (at91_boot_soc.init)
 444                 at91_boot_soc.init();
 445 }