Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
[pandora-kernel.git] / arch / arm / mach-at91 / pm.c
1 /*
2  * arch/arm/mach-at91/pm.c
3  * AT91 Power Management
4  *
5  * Copyright (C) 2005 David Brownell
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  */
12
13 #include <linux/gpio.h>
14 #include <linux/suspend.h>
15 #include <linux/sched.h>
16 #include <linux/proc_fs.h>
17 #include <linux/interrupt.h>
18 #include <linux/sysfs.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/clk/at91_pmc.h>
23
24 #include <asm/irq.h>
25 #include <linux/atomic.h>
26 #include <asm/mach/time.h>
27 #include <asm/mach/irq.h>
28
29 #include <mach/cpu.h>
30 #include <mach/hardware.h>
31
32 #include "at91_aic.h"
33 #include "generic.h"
34 #include "pm.h"
35 #include "gpio.h"
36
37 /*
38  * Show the reason for the previous system reset.
39  */
40
41 #include "at91_rstc.h"
42 #include "at91_shdwc.h"
43
44 static void (*at91_pm_standby)(void);
45
46 static void __init show_reset_status(void)
47 {
48         static char reset[] __initdata = "reset";
49
50         static char general[] __initdata = "general";
51         static char wakeup[] __initdata = "wakeup";
52         static char watchdog[] __initdata = "watchdog";
53         static char software[] __initdata = "software";
54         static char user[] __initdata = "user";
55         static char unknown[] __initdata = "unknown";
56
57         static char signal[] __initdata = "signal";
58         static char rtc[] __initdata = "rtc";
59         static char rtt[] __initdata = "rtt";
60         static char restore[] __initdata = "power-restored";
61
62         char *reason, *r2 = reset;
63         u32 reset_type, wake_type;
64
65         if (!at91_shdwc_base || !at91_rstc_base)
66                 return;
67
68         reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
69         wake_type = at91_shdwc_read(AT91_SHDW_SR);
70
71         switch (reset_type) {
72         case AT91_RSTC_RSTTYP_GENERAL:
73                 reason = general;
74                 break;
75         case AT91_RSTC_RSTTYP_WAKEUP:
76                 /* board-specific code enabled the wakeup sources */
77                 reason = wakeup;
78
79                 /* "wakeup signal" */
80                 if (wake_type & AT91_SHDW_WAKEUP0)
81                         r2 = signal;
82                 else {
83                         r2 = reason;
84                         if (wake_type & AT91_SHDW_RTTWK)        /* rtt wakeup */
85                                 reason = rtt;
86                         else if (wake_type & AT91_SHDW_RTCWK)   /* rtc wakeup */
87                                 reason = rtc;
88                         else if (wake_type == 0)        /* power-restored wakeup */
89                                 reason = restore;
90                         else                            /* unknown wakeup */
91                                 reason = unknown;
92                 }
93                 break;
94         case AT91_RSTC_RSTTYP_WATCHDOG:
95                 reason = watchdog;
96                 break;
97         case AT91_RSTC_RSTTYP_SOFTWARE:
98                 reason = software;
99                 break;
100         case AT91_RSTC_RSTTYP_USER:
101                 reason = user;
102                 break;
103         default:
104                 reason = unknown;
105                 break;
106         }
107         pr_info("AT91: Starting after %s %s\n", reason, r2);
108 }
109
110 static int at91_pm_valid_state(suspend_state_t state)
111 {
112         switch (state) {
113                 case PM_SUSPEND_ON:
114                 case PM_SUSPEND_STANDBY:
115                 case PM_SUSPEND_MEM:
116                         return 1;
117
118                 default:
119                         return 0;
120         }
121 }
122
123
124 static suspend_state_t target_state;
125
126 /*
127  * Called after processes are frozen, but before we shutdown devices.
128  */
129 static int at91_pm_begin(suspend_state_t state)
130 {
131         target_state = state;
132         return 0;
133 }
134
135 /*
136  * Verify that all the clocks are correct before entering
137  * slow-clock mode.
138  */
139 static int at91_pm_verify_clocks(void)
140 {
141         unsigned long scsr;
142         int i;
143
144         scsr = at91_pmc_read(AT91_PMC_SCSR);
145
146         /* USB must not be using PLLB */
147         if (cpu_is_at91rm9200()) {
148                 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
149                         pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
150                         return 0;
151                 }
152         } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()
153                         || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) {
154                 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) {
155                         pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
156                         return 0;
157                 }
158         }
159
160         /* PCK0..PCK3 must be disabled, or configured to use clk32k */
161         for (i = 0; i < 4; i++) {
162                 u32 css;
163
164                 if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
165                         continue;
166
167                 css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
168                 if (css != AT91_PMC_CSS_SLOW) {
169                         pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
170                         return 0;
171                 }
172         }
173
174         return 1;
175 }
176
177 /*
178  * Call this from platform driver suspend() to see how deeply to suspend.
179  * For example, some controllers (like OHCI) need one of the PLL clocks
180  * in order to act as a wakeup source, and those are not available when
181  * going into slow clock mode.
182  *
183  * REVISIT: generalize as clk_will_be_available(clk)?  Other platforms have
184  * the very same problem (but not using at91 main_clk), and it'd be better
185  * to add one generic API rather than lots of platform-specific ones.
186  */
187 int at91_suspend_entering_slow_clock(void)
188 {
189         return (target_state == PM_SUSPEND_MEM);
190 }
191 EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
192
193
194 static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0,
195                           void __iomem *ramc1, int memctrl);
196
197 #ifdef CONFIG_AT91_SLOW_CLOCK
198 extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
199                             void __iomem *ramc1, int memctrl);
200 extern u32 at91_slow_clock_sz;
201 #endif
202
203 static int at91_pm_enter(suspend_state_t state)
204 {
205         if (of_have_populated_dt())
206                 at91_pinctrl_gpio_suspend();
207         else
208                 at91_gpio_suspend();
209         at91_irq_suspend();
210
211         pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
212                         /* remember all the always-wake irqs */
213                         (at91_pmc_read(AT91_PMC_PCSR)
214                                         | (1 << AT91_ID_FIQ)
215                                         | (1 << AT91_ID_SYS)
216                                         | (at91_get_extern_irq()))
217                                 & at91_aic_read(AT91_AIC_IMR),
218                         state);
219
220         switch (state) {
221                 /*
222                  * Suspend-to-RAM is like STANDBY plus slow clock mode, so
223                  * drivers must suspend more deeply:  only the master clock
224                  * controller may be using the main oscillator.
225                  */
226                 case PM_SUSPEND_MEM:
227                         /*
228                          * Ensure that clocks are in a valid state.
229                          */
230                         if (!at91_pm_verify_clocks())
231                                 goto error;
232
233                         /*
234                          * Enter slow clock mode by switching over to clk32k and
235                          * turning off the main oscillator; reverse on wakeup.
236                          */
237                         if (slow_clock) {
238                                 int memctrl = AT91_MEMCTRL_SDRAMC;
239
240                                 if (cpu_is_at91rm9200())
241                                         memctrl = AT91_MEMCTRL_MC;
242                                 else if (cpu_is_at91sam9g45())
243                                         memctrl = AT91_MEMCTRL_DDRSDR;
244 #ifdef CONFIG_AT91_SLOW_CLOCK
245                                 /* copy slow_clock handler to SRAM, and call it */
246                                 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
247 #endif
248                                 slow_clock(at91_pmc_base, at91_ramc_base[0],
249                                            at91_ramc_base[1], memctrl);
250                                 break;
251                         } else {
252                                 pr_info("AT91: PM - no slow clock mode enabled ...\n");
253                                 /* FALLTHROUGH leaving master clock alone */
254                         }
255
256                 /*
257                  * STANDBY mode has *all* drivers suspended; ignores irqs not
258                  * marked as 'wakeup' event sources; and reduces DRAM power.
259                  * But otherwise it's identical to PM_SUSPEND_ON:  cpu idle, and
260                  * nothing fancy done with main or cpu clocks.
261                  */
262                 case PM_SUSPEND_STANDBY:
263                         /*
264                          * NOTE: the Wait-for-Interrupt instruction needs to be
265                          * in icache so no SDRAM accesses are needed until the
266                          * wakeup IRQ occurs and self-refresh is terminated.
267                          * For ARM 926 based chips, this requirement is weaker
268                          * as at91sam9 can access a RAM in self-refresh mode.
269                          */
270                         if (at91_pm_standby)
271                                 at91_pm_standby();
272                         break;
273
274                 case PM_SUSPEND_ON:
275                         cpu_do_idle();
276                         break;
277
278                 default:
279                         pr_debug("AT91: PM - bogus suspend state %d\n", state);
280                         goto error;
281         }
282
283         pr_debug("AT91: PM - wakeup %08x\n",
284                         at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
285
286 error:
287         target_state = PM_SUSPEND_ON;
288         at91_irq_resume();
289         if (of_have_populated_dt())
290                 at91_pinctrl_gpio_resume();
291         else
292                 at91_gpio_resume();
293         return 0;
294 }
295
296 /*
297  * Called right prior to thawing processes.
298  */
299 static void at91_pm_end(void)
300 {
301         target_state = PM_SUSPEND_ON;
302 }
303
304
305 static const struct platform_suspend_ops at91_pm_ops = {
306         .valid  = at91_pm_valid_state,
307         .begin  = at91_pm_begin,
308         .enter  = at91_pm_enter,
309         .end    = at91_pm_end,
310 };
311
312 static struct platform_device at91_cpuidle_device = {
313         .name = "cpuidle-at91",
314 };
315
316 void at91_pm_set_standby(void (*at91_standby)(void))
317 {
318         if (at91_standby) {
319                 at91_cpuidle_device.dev.platform_data = at91_standby;
320                 at91_pm_standby = at91_standby;
321         }
322 }
323
324 static int __init at91_pm_init(void)
325 {
326 #ifdef CONFIG_AT91_SLOW_CLOCK
327         slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz);
328 #endif
329
330         pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
331
332         /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
333         if (cpu_is_at91rm9200())
334                 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
335         
336         if (at91_cpuidle_device.dev.platform_data)
337                 platform_device_register(&at91_cpuidle_device);
338
339         suspend_set_ops(&at91_pm_ops);
340
341         show_reset_status();
342         return 0;
343 }
344 arch_initcall(at91_pm_init);