2 * arch/arm/mach-at91/at91sam9263_devices.c
4 * Copyright (C) 2007 Atmel Corporation.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
21 #include <video/atmel_lcdc.h>
23 #include <mach/board.h>
24 #include <mach/at91sam9263.h>
25 #include <mach/at91sam9263_matrix.h>
26 #include <mach/at91_matrix.h>
27 #include <mach/at91sam9_smc.h>
32 /* --------------------------------------------------------------------
34 * -------------------------------------------------------------------- */
36 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
37 static u64 ohci_dmamask = DMA_BIT_MASK(32);
38 static struct at91_usbh_data usbh_data;
40 static struct resource usbh_resources[] = {
42 .start = AT91SAM9263_UHP_BASE,
43 .end = AT91SAM9263_UHP_BASE + SZ_1M - 1,
44 .flags = IORESOURCE_MEM,
47 .start = AT91SAM9263_ID_UHP,
48 .end = AT91SAM9263_ID_UHP,
49 .flags = IORESOURCE_IRQ,
53 static struct platform_device at91_usbh_device = {
57 .dma_mask = &ohci_dmamask,
58 .coherent_dma_mask = DMA_BIT_MASK(32),
59 .platform_data = &usbh_data,
61 .resource = usbh_resources,
62 .num_resources = ARRAY_SIZE(usbh_resources),
65 void __init at91_add_device_usbh(struct at91_usbh_data *data)
72 /* Enable VBus control for UHP ports */
73 for (i = 0; i < data->ports; i++) {
74 if (gpio_is_valid(data->vbus_pin[i]))
75 at91_set_gpio_output(data->vbus_pin[i],
76 data->vbus_pin_active_low[i]);
79 /* Enable overcurrent notification */
80 for (i = 0; i < data->ports; i++) {
81 if (data->overcurrent_pin[i])
82 at91_set_gpio_input(data->overcurrent_pin[i], 1);
86 platform_device_register(&at91_usbh_device);
89 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
93 /* --------------------------------------------------------------------
95 * -------------------------------------------------------------------- */
97 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
98 static struct at91_udc_data udc_data;
100 static struct resource udc_resources[] = {
102 .start = AT91SAM9263_BASE_UDP,
103 .end = AT91SAM9263_BASE_UDP + SZ_16K - 1,
104 .flags = IORESOURCE_MEM,
107 .start = AT91SAM9263_ID_UDP,
108 .end = AT91SAM9263_ID_UDP,
109 .flags = IORESOURCE_IRQ,
113 static struct platform_device at91_udc_device = {
117 .platform_data = &udc_data,
119 .resource = udc_resources,
120 .num_resources = ARRAY_SIZE(udc_resources),
123 void __init at91_add_device_udc(struct at91_udc_data *data)
128 if (gpio_is_valid(data->vbus_pin)) {
129 at91_set_gpio_input(data->vbus_pin, 0);
130 at91_set_deglitch(data->vbus_pin, 1);
133 /* Pullup pin is handled internally by USB device peripheral */
136 platform_device_register(&at91_udc_device);
139 void __init at91_add_device_udc(struct at91_udc_data *data) {}
143 /* --------------------------------------------------------------------
145 * -------------------------------------------------------------------- */
147 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
148 static u64 eth_dmamask = DMA_BIT_MASK(32);
149 static struct macb_platform_data eth_data;
151 static struct resource eth_resources[] = {
153 .start = AT91SAM9263_BASE_EMAC,
154 .end = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
155 .flags = IORESOURCE_MEM,
158 .start = AT91SAM9263_ID_EMAC,
159 .end = AT91SAM9263_ID_EMAC,
160 .flags = IORESOURCE_IRQ,
164 static struct platform_device at91sam9263_eth_device = {
168 .dma_mask = ð_dmamask,
169 .coherent_dma_mask = DMA_BIT_MASK(32),
170 .platform_data = ð_data,
172 .resource = eth_resources,
173 .num_resources = ARRAY_SIZE(eth_resources),
176 void __init at91_add_device_eth(struct macb_platform_data *data)
181 if (gpio_is_valid(data->phy_irq_pin)) {
182 at91_set_gpio_input(data->phy_irq_pin, 0);
183 at91_set_deglitch(data->phy_irq_pin, 1);
186 /* Pins used for MII and RMII */
187 at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */
188 at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */
189 at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */
190 at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */
191 at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */
192 at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */
193 at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */
194 at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */
195 at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */
196 at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */
198 if (!data->is_rmii) {
199 at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */
200 at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */
201 at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */
202 at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */
203 at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */
204 at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */
205 at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */
206 at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */
210 platform_device_register(&at91sam9263_eth_device);
213 void __init at91_add_device_eth(struct macb_platform_data *data) {}
217 /* --------------------------------------------------------------------
219 * -------------------------------------------------------------------- */
221 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
222 static u64 mmc_dmamask = DMA_BIT_MASK(32);
223 static struct at91_mmc_data mmc0_data, mmc1_data;
225 static struct resource mmc0_resources[] = {
227 .start = AT91SAM9263_BASE_MCI0,
228 .end = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
229 .flags = IORESOURCE_MEM,
232 .start = AT91SAM9263_ID_MCI0,
233 .end = AT91SAM9263_ID_MCI0,
234 .flags = IORESOURCE_IRQ,
238 static struct platform_device at91sam9263_mmc0_device = {
242 .dma_mask = &mmc_dmamask,
243 .coherent_dma_mask = DMA_BIT_MASK(32),
244 .platform_data = &mmc0_data,
246 .resource = mmc0_resources,
247 .num_resources = ARRAY_SIZE(mmc0_resources),
250 static struct resource mmc1_resources[] = {
252 .start = AT91SAM9263_BASE_MCI1,
253 .end = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
254 .flags = IORESOURCE_MEM,
257 .start = AT91SAM9263_ID_MCI1,
258 .end = AT91SAM9263_ID_MCI1,
259 .flags = IORESOURCE_IRQ,
263 static struct platform_device at91sam9263_mmc1_device = {
267 .dma_mask = &mmc_dmamask,
268 .coherent_dma_mask = DMA_BIT_MASK(32),
269 .platform_data = &mmc1_data,
271 .resource = mmc1_resources,
272 .num_resources = ARRAY_SIZE(mmc1_resources),
275 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
281 if (gpio_is_valid(data->det_pin)) {
282 at91_set_gpio_input(data->det_pin, 1);
283 at91_set_deglitch(data->det_pin, 1);
285 if (gpio_is_valid(data->wp_pin))
286 at91_set_gpio_input(data->wp_pin, 1);
287 if (gpio_is_valid(data->vcc_pin))
288 at91_set_gpio_output(data->vcc_pin, 0);
290 if (mmc_id == 0) { /* MCI0 */
292 at91_set_A_periph(AT91_PIN_PA12, 0);
296 at91_set_A_periph(AT91_PIN_PA16, 1);
298 /* DAT0, maybe DAT1..DAT3 */
299 at91_set_A_periph(AT91_PIN_PA17, 1);
301 at91_set_A_periph(AT91_PIN_PA18, 1);
302 at91_set_A_periph(AT91_PIN_PA19, 1);
303 at91_set_A_periph(AT91_PIN_PA20, 1);
307 at91_set_A_periph(AT91_PIN_PA1, 1);
309 /* DAT0, maybe DAT1..DAT3 */
310 at91_set_A_periph(AT91_PIN_PA0, 1);
312 at91_set_A_periph(AT91_PIN_PA3, 1);
313 at91_set_A_periph(AT91_PIN_PA4, 1);
314 at91_set_A_periph(AT91_PIN_PA5, 1);
319 platform_device_register(&at91sam9263_mmc0_device);
322 at91_set_A_periph(AT91_PIN_PA6, 0);
326 at91_set_A_periph(AT91_PIN_PA21, 1);
328 /* DAT0, maybe DAT1..DAT3 */
329 at91_set_A_periph(AT91_PIN_PA22, 1);
331 at91_set_A_periph(AT91_PIN_PA23, 1);
332 at91_set_A_periph(AT91_PIN_PA24, 1);
333 at91_set_A_periph(AT91_PIN_PA25, 1);
337 at91_set_A_periph(AT91_PIN_PA7, 1);
339 /* DAT0, maybe DAT1..DAT3 */
340 at91_set_A_periph(AT91_PIN_PA8, 1);
342 at91_set_A_periph(AT91_PIN_PA9, 1);
343 at91_set_A_periph(AT91_PIN_PA10, 1);
344 at91_set_A_periph(AT91_PIN_PA11, 1);
349 platform_device_register(&at91sam9263_mmc1_device);
353 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
356 /* --------------------------------------------------------------------
357 * Compact Flash (PCMCIA or IDE)
358 * -------------------------------------------------------------------- */
360 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
361 defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
363 static struct at91_cf_data cf0_data;
365 static struct resource cf0_resources[] = {
367 .start = AT91_CHIPSELECT_4,
368 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
369 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
373 static struct platform_device cf0_device = {
376 .platform_data = &cf0_data,
378 .resource = cf0_resources,
379 .num_resources = ARRAY_SIZE(cf0_resources),
382 static struct at91_cf_data cf1_data;
384 static struct resource cf1_resources[] = {
386 .start = AT91_CHIPSELECT_5,
387 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
388 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
392 static struct platform_device cf1_device = {
395 .platform_data = &cf1_data,
397 .resource = cf1_resources,
398 .num_resources = ARRAY_SIZE(cf1_resources),
401 void __init at91_add_device_cf(struct at91_cf_data *data)
403 unsigned long ebi0_csa;
404 struct platform_device *pdev;
410 * assign CS4 or CS5 to SMC with Compact Flash logic support,
411 * we assume SMC timings are configured by board code,
412 * except True IDE where timings are controlled by driver
414 ebi0_csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
415 switch (data->chipselect) {
417 at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */
418 ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
423 at91_set_A_periph(AT91_PIN_PD7, 0); /* EBI0_NCS5/CFCS1 */
424 ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
429 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
433 at91_matrix_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
435 if (gpio_is_valid(data->det_pin)) {
436 at91_set_gpio_input(data->det_pin, 1);
437 at91_set_deglitch(data->det_pin, 1);
440 if (gpio_is_valid(data->irq_pin)) {
441 at91_set_gpio_input(data->irq_pin, 1);
442 at91_set_deglitch(data->irq_pin, 1);
445 if (gpio_is_valid(data->vcc_pin))
447 at91_set_gpio_output(data->vcc_pin, 0);
449 /* enable EBI controlled pins */
450 at91_set_A_periph(AT91_PIN_PD5, 1); /* NWAIT */
451 at91_set_A_periph(AT91_PIN_PD8, 0); /* CFCE1 */
452 at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
453 at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
455 pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "pata_at91" : "at91_cf";
456 platform_device_register(pdev);
459 void __init at91_add_device_cf(struct at91_cf_data *data) {}
462 /* --------------------------------------------------------------------
464 * -------------------------------------------------------------------- */
466 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
467 static struct atmel_nand_data nand_data;
469 #define NAND_BASE AT91_CHIPSELECT_3
471 static struct resource nand_resources[] = {
474 .end = NAND_BASE + SZ_256M - 1,
475 .flags = IORESOURCE_MEM,
478 .start = AT91SAM9263_BASE_ECC0,
479 .end = AT91SAM9263_BASE_ECC0 + SZ_512 - 1,
480 .flags = IORESOURCE_MEM,
484 static struct platform_device at91sam9263_nand_device = {
485 .name = "atmel_nand",
488 .platform_data = &nand_data,
490 .resource = nand_resources,
491 .num_resources = ARRAY_SIZE(nand_resources),
494 void __init at91_add_device_nand(struct atmel_nand_data *data)
501 csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
502 at91_matrix_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
505 if (gpio_is_valid(data->enable_pin))
506 at91_set_gpio_output(data->enable_pin, 1);
509 if (gpio_is_valid(data->rdy_pin))
510 at91_set_gpio_input(data->rdy_pin, 1);
512 /* card detect pin */
513 if (gpio_is_valid(data->det_pin))
514 at91_set_gpio_input(data->det_pin, 1);
517 platform_device_register(&at91sam9263_nand_device);
520 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
524 /* --------------------------------------------------------------------
526 * -------------------------------------------------------------------- */
529 * Prefer the GPIO code since the TWI controller isn't robust
530 * (gets overruns and underruns under load) and can only issue
531 * repeated STARTs in one scenario (the driver doesn't yet handle them).
533 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
535 static struct i2c_gpio_platform_data pdata = {
536 .sda_pin = AT91_PIN_PB4,
537 .sda_is_open_drain = 1,
538 .scl_pin = AT91_PIN_PB5,
539 .scl_is_open_drain = 1,
540 .udelay = 2, /* ~100 kHz */
543 static struct platform_device at91sam9263_twi_device = {
546 .dev.platform_data = &pdata,
549 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
551 at91_set_GPIO_periph(AT91_PIN_PB4, 1); /* TWD (SDA) */
552 at91_set_multi_drive(AT91_PIN_PB4, 1);
554 at91_set_GPIO_periph(AT91_PIN_PB5, 1); /* TWCK (SCL) */
555 at91_set_multi_drive(AT91_PIN_PB5, 1);
557 i2c_register_board_info(0, devices, nr_devices);
558 platform_device_register(&at91sam9263_twi_device);
561 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
563 static struct resource twi_resources[] = {
565 .start = AT91SAM9263_BASE_TWI,
566 .end = AT91SAM9263_BASE_TWI + SZ_16K - 1,
567 .flags = IORESOURCE_MEM,
570 .start = AT91SAM9263_ID_TWI,
571 .end = AT91SAM9263_ID_TWI,
572 .flags = IORESOURCE_IRQ,
576 static struct platform_device at91sam9263_twi_device = {
579 .resource = twi_resources,
580 .num_resources = ARRAY_SIZE(twi_resources),
583 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
585 /* pins used for TWI interface */
586 at91_set_A_periph(AT91_PIN_PB4, 0); /* TWD */
587 at91_set_multi_drive(AT91_PIN_PB4, 1);
589 at91_set_A_periph(AT91_PIN_PB5, 0); /* TWCK */
590 at91_set_multi_drive(AT91_PIN_PB5, 1);
592 i2c_register_board_info(0, devices, nr_devices);
593 platform_device_register(&at91sam9263_twi_device);
596 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
600 /* --------------------------------------------------------------------
602 * -------------------------------------------------------------------- */
604 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
605 static u64 spi_dmamask = DMA_BIT_MASK(32);
607 static struct resource spi0_resources[] = {
609 .start = AT91SAM9263_BASE_SPI0,
610 .end = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
611 .flags = IORESOURCE_MEM,
614 .start = AT91SAM9263_ID_SPI0,
615 .end = AT91SAM9263_ID_SPI0,
616 .flags = IORESOURCE_IRQ,
620 static struct platform_device at91sam9263_spi0_device = {
624 .dma_mask = &spi_dmamask,
625 .coherent_dma_mask = DMA_BIT_MASK(32),
627 .resource = spi0_resources,
628 .num_resources = ARRAY_SIZE(spi0_resources),
631 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
633 static struct resource spi1_resources[] = {
635 .start = AT91SAM9263_BASE_SPI1,
636 .end = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
637 .flags = IORESOURCE_MEM,
640 .start = AT91SAM9263_ID_SPI1,
641 .end = AT91SAM9263_ID_SPI1,
642 .flags = IORESOURCE_IRQ,
646 static struct platform_device at91sam9263_spi1_device = {
650 .dma_mask = &spi_dmamask,
651 .coherent_dma_mask = DMA_BIT_MASK(32),
653 .resource = spi1_resources,
654 .num_resources = ARRAY_SIZE(spi1_resources),
657 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
659 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
662 unsigned long cs_pin;
663 short enable_spi0 = 0;
664 short enable_spi1 = 0;
666 /* Choose SPI chip-selects */
667 for (i = 0; i < nr_devices; i++) {
668 if (devices[i].controller_data)
669 cs_pin = (unsigned long) devices[i].controller_data;
670 else if (devices[i].bus_num == 0)
671 cs_pin = spi0_standard_cs[devices[i].chip_select];
673 cs_pin = spi1_standard_cs[devices[i].chip_select];
675 if (!gpio_is_valid(cs_pin))
678 if (devices[i].bus_num == 0)
683 /* enable chip-select pin */
684 at91_set_gpio_output(cs_pin, 1);
686 /* pass chip-select pin to driver */
687 devices[i].controller_data = (void *) cs_pin;
690 spi_register_board_info(devices, nr_devices);
692 /* Configure SPI bus(es) */
694 at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
695 at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
696 at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
698 platform_device_register(&at91sam9263_spi0_device);
701 at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */
702 at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
703 at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
705 platform_device_register(&at91sam9263_spi1_device);
709 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
713 /* --------------------------------------------------------------------
715 * -------------------------------------------------------------------- */
717 #if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
718 static u64 ac97_dmamask = DMA_BIT_MASK(32);
719 static struct ac97c_platform_data ac97_data;
721 static struct resource ac97_resources[] = {
723 .start = AT91SAM9263_BASE_AC97C,
724 .end = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
725 .flags = IORESOURCE_MEM,
728 .start = AT91SAM9263_ID_AC97C,
729 .end = AT91SAM9263_ID_AC97C,
730 .flags = IORESOURCE_IRQ,
734 static struct platform_device at91sam9263_ac97_device = {
735 .name = "atmel_ac97c",
738 .dma_mask = &ac97_dmamask,
739 .coherent_dma_mask = DMA_BIT_MASK(32),
740 .platform_data = &ac97_data,
742 .resource = ac97_resources,
743 .num_resources = ARRAY_SIZE(ac97_resources),
746 void __init at91_add_device_ac97(struct ac97c_platform_data *data)
751 at91_set_A_periph(AT91_PIN_PB0, 0); /* AC97FS */
752 at91_set_A_periph(AT91_PIN_PB1, 0); /* AC97CK */
753 at91_set_A_periph(AT91_PIN_PB2, 0); /* AC97TX */
754 at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */
757 if (gpio_is_valid(data->reset_pin))
758 at91_set_gpio_output(data->reset_pin, 0);
761 platform_device_register(&at91sam9263_ac97_device);
764 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
767 /* --------------------------------------------------------------------
769 * -------------------------------------------------------------------- */
771 #if defined(CONFIG_CAN_AT91) || defined(CONFIG_CAN_AT91_MODULE)
772 static struct resource can_resources[] = {
774 .start = AT91SAM9263_BASE_CAN,
775 .end = AT91SAM9263_BASE_CAN + SZ_16K - 1,
776 .flags = IORESOURCE_MEM,
779 .start = AT91SAM9263_ID_CAN,
780 .end = AT91SAM9263_ID_CAN,
781 .flags = IORESOURCE_IRQ,
785 static struct platform_device at91sam9263_can_device = {
788 .resource = can_resources,
789 .num_resources = ARRAY_SIZE(can_resources),
792 void __init at91_add_device_can(struct at91_can_data *data)
794 at91_set_A_periph(AT91_PIN_PA13, 0); /* CANTX */
795 at91_set_A_periph(AT91_PIN_PA14, 0); /* CANRX */
796 at91sam9263_can_device.dev.platform_data = data;
798 platform_device_register(&at91sam9263_can_device);
801 void __init at91_add_device_can(struct at91_can_data *data) {}
804 /* --------------------------------------------------------------------
806 * -------------------------------------------------------------------- */
808 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
809 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
810 static struct atmel_lcdfb_info lcdc_data;
812 static struct resource lcdc_resources[] = {
814 .start = AT91SAM9263_LCDC_BASE,
815 .end = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
816 .flags = IORESOURCE_MEM,
819 .start = AT91SAM9263_ID_LCDC,
820 .end = AT91SAM9263_ID_LCDC,
821 .flags = IORESOURCE_IRQ,
825 static struct platform_device at91_lcdc_device = {
826 .name = "atmel_lcdfb",
829 .dma_mask = &lcdc_dmamask,
830 .coherent_dma_mask = DMA_BIT_MASK(32),
831 .platform_data = &lcdc_data,
833 .resource = lcdc_resources,
834 .num_resources = ARRAY_SIZE(lcdc_resources),
837 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
842 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
843 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
844 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
845 at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
846 at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
847 at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
848 at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
849 at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
850 at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
851 at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
852 at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
853 at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
854 at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
855 at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */
856 at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
857 at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
858 at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
859 at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
860 at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
861 at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */
862 at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
863 at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
866 platform_device_register(&at91_lcdc_device);
869 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
873 /* --------------------------------------------------------------------
874 * Image Sensor Interface
875 * -------------------------------------------------------------------- */
877 #if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
879 struct resource isi_resources[] = {
881 .start = AT91SAM9263_BASE_ISI,
882 .end = AT91SAM9263_BASE_ISI + SZ_16K - 1,
883 .flags = IORESOURCE_MEM,
886 .start = AT91SAM9263_ID_ISI,
887 .end = AT91SAM9263_ID_ISI,
888 .flags = IORESOURCE_IRQ,
892 static struct platform_device at91sam9263_isi_device = {
895 .resource = isi_resources,
896 .num_resources = ARRAY_SIZE(isi_resources),
899 void __init at91_add_device_isi(struct isi_platform_data *data,
902 at91_set_A_periph(AT91_PIN_PE0, 0); /* ISI_D0 */
903 at91_set_A_periph(AT91_PIN_PE1, 0); /* ISI_D1 */
904 at91_set_A_periph(AT91_PIN_PE2, 0); /* ISI_D2 */
905 at91_set_A_periph(AT91_PIN_PE3, 0); /* ISI_D3 */
906 at91_set_A_periph(AT91_PIN_PE4, 0); /* ISI_D4 */
907 at91_set_A_periph(AT91_PIN_PE5, 0); /* ISI_D5 */
908 at91_set_A_periph(AT91_PIN_PE6, 0); /* ISI_D6 */
909 at91_set_A_periph(AT91_PIN_PE7, 0); /* ISI_D7 */
910 at91_set_A_periph(AT91_PIN_PE8, 0); /* ISI_PCK */
911 at91_set_A_periph(AT91_PIN_PE9, 0); /* ISI_HSYNC */
912 at91_set_A_periph(AT91_PIN_PE10, 0); /* ISI_VSYNC */
913 at91_set_B_periph(AT91_PIN_PE12, 0); /* ISI_PD8 */
914 at91_set_B_periph(AT91_PIN_PE13, 0); /* ISI_PD9 */
915 at91_set_B_periph(AT91_PIN_PE14, 0); /* ISI_PD10 */
916 at91_set_B_periph(AT91_PIN_PE15, 0); /* ISI_PD11 */
918 if (use_pck_as_mck) {
919 at91_set_B_periph(AT91_PIN_PE11, 0); /* ISI_MCK (PCK3) */
921 /* TODO: register the PCK for ISI_MCK and set its parent */
925 void __init at91_add_device_isi(struct isi_platform_data *data,
926 bool use_pck_as_mck) {}
930 /* --------------------------------------------------------------------
931 * Timer/Counter block
932 * -------------------------------------------------------------------- */
934 #ifdef CONFIG_ATMEL_TCLIB
936 static struct resource tcb_resources[] = {
938 .start = AT91SAM9263_BASE_TCB0,
939 .end = AT91SAM9263_BASE_TCB0 + SZ_16K - 1,
940 .flags = IORESOURCE_MEM,
943 .start = AT91SAM9263_ID_TCB,
944 .end = AT91SAM9263_ID_TCB,
945 .flags = IORESOURCE_IRQ,
949 static struct platform_device at91sam9263_tcb_device = {
952 .resource = tcb_resources,
953 .num_resources = ARRAY_SIZE(tcb_resources),
956 static void __init at91_add_device_tc(void)
958 platform_device_register(&at91sam9263_tcb_device);
961 static void __init at91_add_device_tc(void) { }
965 /* --------------------------------------------------------------------
967 * -------------------------------------------------------------------- */
969 static struct resource rtt0_resources[] = {
971 .start = AT91SAM9263_BASE_RTT0,
972 .end = AT91SAM9263_BASE_RTT0 + SZ_16 - 1,
973 .flags = IORESOURCE_MEM,
975 .flags = IORESOURCE_MEM,
979 static struct platform_device at91sam9263_rtt0_device = {
982 .resource = rtt0_resources,
985 static struct resource rtt1_resources[] = {
987 .start = AT91SAM9263_BASE_RTT1,
988 .end = AT91SAM9263_BASE_RTT1 + SZ_16 - 1,
989 .flags = IORESOURCE_MEM,
991 .flags = IORESOURCE_MEM,
995 static struct platform_device at91sam9263_rtt1_device = {
998 .resource = rtt1_resources,
1001 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
1002 static void __init at91_add_device_rtt_rtc(void)
1004 struct platform_device *pdev;
1007 switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
1010 * The second resource is needed only for the chosen RTT:
1011 * GPBR will serve as the storage for RTC time offset
1013 at91sam9263_rtt0_device.num_resources = 2;
1014 at91sam9263_rtt1_device.num_resources = 1;
1015 pdev = &at91sam9263_rtt0_device;
1019 at91sam9263_rtt0_device.num_resources = 1;
1020 at91sam9263_rtt1_device.num_resources = 2;
1021 pdev = &at91sam9263_rtt1_device;
1025 pr_err("at91sam9263: only supports 2 RTT (%d)\n",
1026 CONFIG_RTC_DRV_AT91SAM9_RTT);
1030 pdev->name = "rtc-at91sam9";
1031 r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
1032 r[1].end = r[1].start + 3;
1035 static void __init at91_add_device_rtt_rtc(void)
1037 /* Only one resource is needed: RTT not used as RTC */
1038 at91sam9263_rtt0_device.num_resources = 1;
1039 at91sam9263_rtt1_device.num_resources = 1;
1043 static void __init at91_add_device_rtt(void)
1045 at91_add_device_rtt_rtc();
1046 platform_device_register(&at91sam9263_rtt0_device);
1047 platform_device_register(&at91sam9263_rtt1_device);
1051 /* --------------------------------------------------------------------
1053 * -------------------------------------------------------------------- */
1055 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
1056 static struct resource wdt_resources[] = {
1058 .start = AT91SAM9263_BASE_WDT,
1059 .end = AT91SAM9263_BASE_WDT + SZ_16 - 1,
1060 .flags = IORESOURCE_MEM,
1064 static struct platform_device at91sam9263_wdt_device = {
1067 .resource = wdt_resources,
1068 .num_resources = ARRAY_SIZE(wdt_resources),
1071 static void __init at91_add_device_watchdog(void)
1073 platform_device_register(&at91sam9263_wdt_device);
1076 static void __init at91_add_device_watchdog(void) {}
1080 /* --------------------------------------------------------------------
1082 * --------------------------------------------------------------------*/
1084 #if defined(CONFIG_ATMEL_PWM)
1085 static u32 pwm_mask;
1087 static struct resource pwm_resources[] = {
1089 .start = AT91SAM9263_BASE_PWMC,
1090 .end = AT91SAM9263_BASE_PWMC + SZ_16K - 1,
1091 .flags = IORESOURCE_MEM,
1094 .start = AT91SAM9263_ID_PWMC,
1095 .end = AT91SAM9263_ID_PWMC,
1096 .flags = IORESOURCE_IRQ,
1100 static struct platform_device at91sam9263_pwm0_device = {
1101 .name = "atmel_pwm",
1104 .platform_data = &pwm_mask,
1106 .resource = pwm_resources,
1107 .num_resources = ARRAY_SIZE(pwm_resources),
1110 void __init at91_add_device_pwm(u32 mask)
1112 if (mask & (1 << AT91_PWM0))
1113 at91_set_B_periph(AT91_PIN_PB7, 1); /* enable PWM0 */
1115 if (mask & (1 << AT91_PWM1))
1116 at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */
1118 if (mask & (1 << AT91_PWM2))
1119 at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */
1121 if (mask & (1 << AT91_PWM3))
1122 at91_set_B_periph(AT91_PIN_PB29, 1); /* enable PWM3 */
1126 platform_device_register(&at91sam9263_pwm0_device);
1129 void __init at91_add_device_pwm(u32 mask) {}
1133 /* --------------------------------------------------------------------
1134 * SSC -- Synchronous Serial Controller
1135 * -------------------------------------------------------------------- */
1137 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
1138 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
1140 static struct resource ssc0_resources[] = {
1142 .start = AT91SAM9263_BASE_SSC0,
1143 .end = AT91SAM9263_BASE_SSC0 + SZ_16K - 1,
1144 .flags = IORESOURCE_MEM,
1147 .start = AT91SAM9263_ID_SSC0,
1148 .end = AT91SAM9263_ID_SSC0,
1149 .flags = IORESOURCE_IRQ,
1153 static struct platform_device at91sam9263_ssc0_device = {
1157 .dma_mask = &ssc0_dmamask,
1158 .coherent_dma_mask = DMA_BIT_MASK(32),
1160 .resource = ssc0_resources,
1161 .num_resources = ARRAY_SIZE(ssc0_resources),
1164 static inline void configure_ssc0_pins(unsigned pins)
1166 if (pins & ATMEL_SSC_TF)
1167 at91_set_B_periph(AT91_PIN_PB0, 1);
1168 if (pins & ATMEL_SSC_TK)
1169 at91_set_B_periph(AT91_PIN_PB1, 1);
1170 if (pins & ATMEL_SSC_TD)
1171 at91_set_B_periph(AT91_PIN_PB2, 1);
1172 if (pins & ATMEL_SSC_RD)
1173 at91_set_B_periph(AT91_PIN_PB3, 1);
1174 if (pins & ATMEL_SSC_RK)
1175 at91_set_B_periph(AT91_PIN_PB4, 1);
1176 if (pins & ATMEL_SSC_RF)
1177 at91_set_B_periph(AT91_PIN_PB5, 1);
1180 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
1182 static struct resource ssc1_resources[] = {
1184 .start = AT91SAM9263_BASE_SSC1,
1185 .end = AT91SAM9263_BASE_SSC1 + SZ_16K - 1,
1186 .flags = IORESOURCE_MEM,
1189 .start = AT91SAM9263_ID_SSC1,
1190 .end = AT91SAM9263_ID_SSC1,
1191 .flags = IORESOURCE_IRQ,
1195 static struct platform_device at91sam9263_ssc1_device = {
1199 .dma_mask = &ssc1_dmamask,
1200 .coherent_dma_mask = DMA_BIT_MASK(32),
1202 .resource = ssc1_resources,
1203 .num_resources = ARRAY_SIZE(ssc1_resources),
1206 static inline void configure_ssc1_pins(unsigned pins)
1208 if (pins & ATMEL_SSC_TF)
1209 at91_set_A_periph(AT91_PIN_PB6, 1);
1210 if (pins & ATMEL_SSC_TK)
1211 at91_set_A_periph(AT91_PIN_PB7, 1);
1212 if (pins & ATMEL_SSC_TD)
1213 at91_set_A_periph(AT91_PIN_PB8, 1);
1214 if (pins & ATMEL_SSC_RD)
1215 at91_set_A_periph(AT91_PIN_PB9, 1);
1216 if (pins & ATMEL_SSC_RK)
1217 at91_set_A_periph(AT91_PIN_PB10, 1);
1218 if (pins & ATMEL_SSC_RF)
1219 at91_set_A_periph(AT91_PIN_PB11, 1);
1223 * SSC controllers are accessed through library code, instead of any
1224 * kind of all-singing/all-dancing driver. For example one could be
1225 * used by a particular I2S audio codec's driver, while another one
1226 * on the same system might be used by a custom data capture driver.
1228 void __init at91_add_device_ssc(unsigned id, unsigned pins)
1230 struct platform_device *pdev;
1233 * NOTE: caller is responsible for passing information matching
1234 * "pins" to whatever will be using each particular controller.
1237 case AT91SAM9263_ID_SSC0:
1238 pdev = &at91sam9263_ssc0_device;
1239 configure_ssc0_pins(pins);
1241 case AT91SAM9263_ID_SSC1:
1242 pdev = &at91sam9263_ssc1_device;
1243 configure_ssc1_pins(pins);
1249 platform_device_register(pdev);
1253 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1257 /* --------------------------------------------------------------------
1259 * -------------------------------------------------------------------- */
1261 #if defined(CONFIG_SERIAL_ATMEL)
1263 static struct resource dbgu_resources[] = {
1265 .start = AT91SAM9263_BASE_DBGU,
1266 .end = AT91SAM9263_BASE_DBGU + SZ_512 - 1,
1267 .flags = IORESOURCE_MEM,
1270 .start = AT91_ID_SYS,
1272 .flags = IORESOURCE_IRQ,
1276 static struct atmel_uart_data dbgu_data = {
1278 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
1281 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
1283 static struct platform_device at91sam9263_dbgu_device = {
1284 .name = "atmel_usart",
1287 .dma_mask = &dbgu_dmamask,
1288 .coherent_dma_mask = DMA_BIT_MASK(32),
1289 .platform_data = &dbgu_data,
1291 .resource = dbgu_resources,
1292 .num_resources = ARRAY_SIZE(dbgu_resources),
1295 static inline void configure_dbgu_pins(void)
1297 at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
1298 at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
1301 static struct resource uart0_resources[] = {
1303 .start = AT91SAM9263_BASE_US0,
1304 .end = AT91SAM9263_BASE_US0 + SZ_16K - 1,
1305 .flags = IORESOURCE_MEM,
1308 .start = AT91SAM9263_ID_US0,
1309 .end = AT91SAM9263_ID_US0,
1310 .flags = IORESOURCE_IRQ,
1314 static struct atmel_uart_data uart0_data = {
1319 static u64 uart0_dmamask = DMA_BIT_MASK(32);
1321 static struct platform_device at91sam9263_uart0_device = {
1322 .name = "atmel_usart",
1325 .dma_mask = &uart0_dmamask,
1326 .coherent_dma_mask = DMA_BIT_MASK(32),
1327 .platform_data = &uart0_data,
1329 .resource = uart0_resources,
1330 .num_resources = ARRAY_SIZE(uart0_resources),
1333 static inline void configure_usart0_pins(unsigned pins)
1335 at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */
1336 at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */
1338 if (pins & ATMEL_UART_RTS)
1339 at91_set_A_periph(AT91_PIN_PA28, 0); /* RTS0 */
1340 if (pins & ATMEL_UART_CTS)
1341 at91_set_A_periph(AT91_PIN_PA29, 0); /* CTS0 */
1344 static struct resource uart1_resources[] = {
1346 .start = AT91SAM9263_BASE_US1,
1347 .end = AT91SAM9263_BASE_US1 + SZ_16K - 1,
1348 .flags = IORESOURCE_MEM,
1351 .start = AT91SAM9263_ID_US1,
1352 .end = AT91SAM9263_ID_US1,
1353 .flags = IORESOURCE_IRQ,
1357 static struct atmel_uart_data uart1_data = {
1362 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1364 static struct platform_device at91sam9263_uart1_device = {
1365 .name = "atmel_usart",
1368 .dma_mask = &uart1_dmamask,
1369 .coherent_dma_mask = DMA_BIT_MASK(32),
1370 .platform_data = &uart1_data,
1372 .resource = uart1_resources,
1373 .num_resources = ARRAY_SIZE(uart1_resources),
1376 static inline void configure_usart1_pins(unsigned pins)
1378 at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
1379 at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
1381 if (pins & ATMEL_UART_RTS)
1382 at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */
1383 if (pins & ATMEL_UART_CTS)
1384 at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */
1387 static struct resource uart2_resources[] = {
1389 .start = AT91SAM9263_BASE_US2,
1390 .end = AT91SAM9263_BASE_US2 + SZ_16K - 1,
1391 .flags = IORESOURCE_MEM,
1394 .start = AT91SAM9263_ID_US2,
1395 .end = AT91SAM9263_ID_US2,
1396 .flags = IORESOURCE_IRQ,
1400 static struct atmel_uart_data uart2_data = {
1405 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1407 static struct platform_device at91sam9263_uart2_device = {
1408 .name = "atmel_usart",
1411 .dma_mask = &uart2_dmamask,
1412 .coherent_dma_mask = DMA_BIT_MASK(32),
1413 .platform_data = &uart2_data,
1415 .resource = uart2_resources,
1416 .num_resources = ARRAY_SIZE(uart2_resources),
1419 static inline void configure_usart2_pins(unsigned pins)
1421 at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
1422 at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */
1424 if (pins & ATMEL_UART_RTS)
1425 at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */
1426 if (pins & ATMEL_UART_CTS)
1427 at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
1430 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1432 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1434 struct platform_device *pdev;
1435 struct atmel_uart_data *pdata;
1439 pdev = &at91sam9263_dbgu_device;
1440 configure_dbgu_pins();
1442 case AT91SAM9263_ID_US0:
1443 pdev = &at91sam9263_uart0_device;
1444 configure_usart0_pins(pins);
1446 case AT91SAM9263_ID_US1:
1447 pdev = &at91sam9263_uart1_device;
1448 configure_usart1_pins(pins);
1450 case AT91SAM9263_ID_US2:
1451 pdev = &at91sam9263_uart2_device;
1452 configure_usart2_pins(pins);
1457 pdata = pdev->dev.platform_data;
1458 pdata->num = portnr; /* update to mapped ID */
1460 if (portnr < ATMEL_MAX_UART)
1461 at91_uarts[portnr] = pdev;
1464 void __init at91_set_serial_console(unsigned portnr)
1466 if (portnr < ATMEL_MAX_UART) {
1467 atmel_default_console_device = at91_uarts[portnr];
1468 at91sam9263_set_console_clock(at91_uarts[portnr]->id);
1472 void __init at91_add_device_serial(void)
1476 for (i = 0; i < ATMEL_MAX_UART; i++) {
1478 platform_device_register(at91_uarts[i]);
1481 if (!atmel_default_console_device)
1482 printk(KERN_INFO "AT91: No default serial console defined.\n");
1485 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1486 void __init at91_set_serial_console(unsigned portnr) {}
1487 void __init at91_add_device_serial(void) {}
1491 /* -------------------------------------------------------------------- */
1493 * These devices are always present and don't need any board-specific
1496 static int __init at91_add_standard_devices(void)
1498 at91_add_device_rtt();
1499 at91_add_device_watchdog();
1500 at91_add_device_tc();
1504 arch_initcall(at91_add_standard_devices);