2 * arch/arm/mach-at91/at91sam9261.c
4 * Copyright (C) 2005 SAN People
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/module.h>
17 #include <asm/mach/arch.h>
18 #include <asm/mach/map.h>
20 #include <mach/at91sam9261.h>
21 #include <mach/at91_pmc.h>
22 #include <mach/at91_rstc.h>
23 #include <mach/at91_shdwc.h>
28 static struct map_desc at91sam9261_io_desc[] __initdata = {
30 .virtual = AT91_VA_BASE_SYS,
31 .pfn = __phys_to_pfn(AT91_BASE_SYS),
37 static struct map_desc at91sam9261_sram_desc[] __initdata = {
39 .virtual = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
40 .pfn = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
41 .length = AT91SAM9261_SRAM_SIZE,
46 static struct map_desc at91sam9g10_sram_desc[] __initdata = {
48 .virtual = AT91_IO_VIRT_BASE - AT91SAM9G10_SRAM_SIZE,
49 .pfn = __phys_to_pfn(AT91SAM9G10_SRAM_BASE),
50 .length = AT91SAM9G10_SRAM_SIZE,
55 /* --------------------------------------------------------------------
57 * -------------------------------------------------------------------- */
60 * The peripheral clocks.
62 static struct clk pioA_clk = {
64 .pmc_mask = 1 << AT91SAM9261_ID_PIOA,
65 .type = CLK_TYPE_PERIPHERAL,
67 static struct clk pioB_clk = {
69 .pmc_mask = 1 << AT91SAM9261_ID_PIOB,
70 .type = CLK_TYPE_PERIPHERAL,
72 static struct clk pioC_clk = {
74 .pmc_mask = 1 << AT91SAM9261_ID_PIOC,
75 .type = CLK_TYPE_PERIPHERAL,
77 static struct clk usart0_clk = {
79 .pmc_mask = 1 << AT91SAM9261_ID_US0,
80 .type = CLK_TYPE_PERIPHERAL,
82 static struct clk usart1_clk = {
84 .pmc_mask = 1 << AT91SAM9261_ID_US1,
85 .type = CLK_TYPE_PERIPHERAL,
87 static struct clk usart2_clk = {
89 .pmc_mask = 1 << AT91SAM9261_ID_US2,
90 .type = CLK_TYPE_PERIPHERAL,
92 static struct clk mmc_clk = {
94 .pmc_mask = 1 << AT91SAM9261_ID_MCI,
95 .type = CLK_TYPE_PERIPHERAL,
97 static struct clk udc_clk = {
99 .pmc_mask = 1 << AT91SAM9261_ID_UDP,
100 .type = CLK_TYPE_PERIPHERAL,
102 static struct clk twi_clk = {
104 .pmc_mask = 1 << AT91SAM9261_ID_TWI,
105 .type = CLK_TYPE_PERIPHERAL,
107 static struct clk spi0_clk = {
109 .pmc_mask = 1 << AT91SAM9261_ID_SPI0,
110 .type = CLK_TYPE_PERIPHERAL,
112 static struct clk spi1_clk = {
114 .pmc_mask = 1 << AT91SAM9261_ID_SPI1,
115 .type = CLK_TYPE_PERIPHERAL,
117 static struct clk ssc0_clk = {
119 .pmc_mask = 1 << AT91SAM9261_ID_SSC0,
120 .type = CLK_TYPE_PERIPHERAL,
122 static struct clk ssc1_clk = {
124 .pmc_mask = 1 << AT91SAM9261_ID_SSC1,
125 .type = CLK_TYPE_PERIPHERAL,
127 static struct clk ssc2_clk = {
129 .pmc_mask = 1 << AT91SAM9261_ID_SSC2,
130 .type = CLK_TYPE_PERIPHERAL,
132 static struct clk tc0_clk = {
134 .pmc_mask = 1 << AT91SAM9261_ID_TC0,
135 .type = CLK_TYPE_PERIPHERAL,
137 static struct clk tc1_clk = {
139 .pmc_mask = 1 << AT91SAM9261_ID_TC1,
140 .type = CLK_TYPE_PERIPHERAL,
142 static struct clk tc2_clk = {
144 .pmc_mask = 1 << AT91SAM9261_ID_TC2,
145 .type = CLK_TYPE_PERIPHERAL,
147 static struct clk ohci_clk = {
149 .pmc_mask = 1 << AT91SAM9261_ID_UHP,
150 .type = CLK_TYPE_PERIPHERAL,
152 static struct clk lcdc_clk = {
154 .pmc_mask = 1 << AT91SAM9261_ID_LCDC,
155 .type = CLK_TYPE_PERIPHERAL,
158 static struct clk *periph_clocks[] __initdata = {
181 static struct clk_lookup periph_clocks_lookups[] = {
182 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
183 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
184 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
185 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
186 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc1_clk),
187 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
188 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
189 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
192 static struct clk_lookup usart_clocks_lookups[] = {
193 CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
194 CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
195 CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
196 CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
200 * The four programmable clocks.
201 * You must configure pin multiplexing to bring these signals out.
203 static struct clk pck0 = {
205 .pmc_mask = AT91_PMC_PCK0,
206 .type = CLK_TYPE_PROGRAMMABLE,
209 static struct clk pck1 = {
211 .pmc_mask = AT91_PMC_PCK1,
212 .type = CLK_TYPE_PROGRAMMABLE,
215 static struct clk pck2 = {
217 .pmc_mask = AT91_PMC_PCK2,
218 .type = CLK_TYPE_PROGRAMMABLE,
221 static struct clk pck3 = {
223 .pmc_mask = AT91_PMC_PCK3,
224 .type = CLK_TYPE_PROGRAMMABLE,
229 static struct clk hck0 = {
231 .pmc_mask = AT91_PMC_HCK0,
232 .type = CLK_TYPE_SYSTEM,
235 static struct clk hck1 = {
237 .pmc_mask = AT91_PMC_HCK1,
238 .type = CLK_TYPE_SYSTEM,
242 static void __init at91sam9261_register_clocks(void)
246 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
247 clk_register(periph_clocks[i]);
249 clkdev_add_table(periph_clocks_lookups,
250 ARRAY_SIZE(periph_clocks_lookups));
251 clkdev_add_table(usart_clocks_lookups,
252 ARRAY_SIZE(usart_clocks_lookups));
263 static struct clk_lookup console_clock_lookup;
265 void __init at91sam9261_set_console_clock(int id)
267 if (id >= ARRAY_SIZE(usart_clocks_lookups))
270 console_clock_lookup.con_id = "usart";
271 console_clock_lookup.clk = usart_clocks_lookups[id].clk;
272 clkdev_add(&console_clock_lookup);
275 /* --------------------------------------------------------------------
277 * -------------------------------------------------------------------- */
279 static struct at91_gpio_bank at91sam9261_gpio[] = {
281 .id = AT91SAM9261_ID_PIOA,
285 .id = AT91SAM9261_ID_PIOB,
289 .id = AT91SAM9261_ID_PIOC,
295 static void at91sam9261_poweroff(void)
297 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
301 /* --------------------------------------------------------------------
302 * AT91SAM9261 processor initialization
303 * -------------------------------------------------------------------- */
305 void __init at91sam9261_map_io(void)
307 /* Map peripherals */
308 iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
310 if (cpu_is_at91sam9g10())
311 iotable_init(at91sam9g10_sram_desc, ARRAY_SIZE(at91sam9g10_sram_desc));
313 iotable_init(at91sam9261_sram_desc, ARRAY_SIZE(at91sam9261_sram_desc));
316 void __init at91sam9261_initialize(unsigned long main_clock)
318 at91_arch_reset = at91sam9_alt_reset;
319 pm_power_off = at91sam9261_poweroff;
320 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
321 | (1 << AT91SAM9261_ID_IRQ2);
323 /* Init clock subsystem */
324 at91_clock_init(main_clock);
326 /* Register the processor-specific clocks */
327 at91sam9261_register_clocks();
329 /* Register GPIO subsystem */
330 at91_gpio_init(at91sam9261_gpio, 3);
333 /* --------------------------------------------------------------------
334 * Interrupt initialization
335 * -------------------------------------------------------------------- */
338 * The default interrupt priority levels (0 = lowest, 7 = highest).
340 static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
341 7, /* Advanced Interrupt Controller */
342 7, /* System Peripherals */
343 1, /* Parallel IO Controller A */
344 1, /* Parallel IO Controller B */
345 1, /* Parallel IO Controller C */
350 0, /* Multimedia Card Interface */
351 2, /* USB Device Port */
352 6, /* Two-Wire Interface */
353 5, /* Serial Peripheral Interface 0 */
354 5, /* Serial Peripheral Interface 1 */
355 4, /* Serial Synchronous Controller 0 */
356 4, /* Serial Synchronous Controller 1 */
357 4, /* Serial Synchronous Controller 2 */
358 0, /* Timer Counter 0 */
359 0, /* Timer Counter 1 */
360 0, /* Timer Counter 2 */
361 2, /* USB Host port */
362 3, /* LCD Controller */
370 0, /* Advanced Interrupt Controller */
371 0, /* Advanced Interrupt Controller */
372 0, /* Advanced Interrupt Controller */
375 void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
378 priority = at91sam9261_default_irq_priority;
380 /* Initialize the AIC interrupt controller */
381 at91_aic_init(priority);
383 /* Enable GPIO interrupts */
384 at91_gpio_irq_setup();