Merge branch 'fix/hda' into topic/hda
[pandora-kernel.git] / arch / arm / mach-at91 / at91sam9260_devices.c
1 /*
2  * arch/arm/mach-at91/at91sam9260_devices.c
3  *
4  *  Copyright (C) 2006 Atmel
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/dma-mapping.h>
16 #include <linux/platform_device.h>
17 #include <linux/i2c-gpio.h>
18
19 #include <mach/board.h>
20 #include <mach/gpio.h>
21 #include <mach/cpu.h>
22 #include <mach/at91sam9260.h>
23 #include <mach/at91sam9260_matrix.h>
24 #include <mach/at91sam9_smc.h>
25
26 #include "generic.h"
27
28
29 /* --------------------------------------------------------------------
30  *  USB Host
31  * -------------------------------------------------------------------- */
32
33 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
34 static u64 ohci_dmamask = DMA_BIT_MASK(32);
35 static struct at91_usbh_data usbh_data;
36
37 static struct resource usbh_resources[] = {
38         [0] = {
39                 .start  = AT91SAM9260_UHP_BASE,
40                 .end    = AT91SAM9260_UHP_BASE + SZ_1M - 1,
41                 .flags  = IORESOURCE_MEM,
42         },
43         [1] = {
44                 .start  = AT91SAM9260_ID_UHP,
45                 .end    = AT91SAM9260_ID_UHP,
46                 .flags  = IORESOURCE_IRQ,
47         },
48 };
49
50 static struct platform_device at91_usbh_device = {
51         .name           = "at91_ohci",
52         .id             = -1,
53         .dev            = {
54                                 .dma_mask               = &ohci_dmamask,
55                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
56                                 .platform_data          = &usbh_data,
57         },
58         .resource       = usbh_resources,
59         .num_resources  = ARRAY_SIZE(usbh_resources),
60 };
61
62 void __init at91_add_device_usbh(struct at91_usbh_data *data)
63 {
64         if (!data)
65                 return;
66
67         usbh_data = *data;
68         platform_device_register(&at91_usbh_device);
69 }
70 #else
71 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
72 #endif
73
74
75 /* --------------------------------------------------------------------
76  *  USB Device (Gadget)
77  * -------------------------------------------------------------------- */
78
79 #ifdef CONFIG_USB_GADGET_AT91
80 static struct at91_udc_data udc_data;
81
82 static struct resource udc_resources[] = {
83         [0] = {
84                 .start  = AT91SAM9260_BASE_UDP,
85                 .end    = AT91SAM9260_BASE_UDP + SZ_16K - 1,
86                 .flags  = IORESOURCE_MEM,
87         },
88         [1] = {
89                 .start  = AT91SAM9260_ID_UDP,
90                 .end    = AT91SAM9260_ID_UDP,
91                 .flags  = IORESOURCE_IRQ,
92         },
93 };
94
95 static struct platform_device at91_udc_device = {
96         .name           = "at91_udc",
97         .id             = -1,
98         .dev            = {
99                                 .platform_data          = &udc_data,
100         },
101         .resource       = udc_resources,
102         .num_resources  = ARRAY_SIZE(udc_resources),
103 };
104
105 void __init at91_add_device_udc(struct at91_udc_data *data)
106 {
107         if (!data)
108                 return;
109
110         if (data->vbus_pin) {
111                 at91_set_gpio_input(data->vbus_pin, 0);
112                 at91_set_deglitch(data->vbus_pin, 1);
113         }
114
115         /* Pullup pin is handled internally by USB device peripheral */
116
117         udc_data = *data;
118         platform_device_register(&at91_udc_device);
119 }
120 #else
121 void __init at91_add_device_udc(struct at91_udc_data *data) {}
122 #endif
123
124
125 /* --------------------------------------------------------------------
126  *  Ethernet
127  * -------------------------------------------------------------------- */
128
129 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
130 static u64 eth_dmamask = DMA_BIT_MASK(32);
131 static struct at91_eth_data eth_data;
132
133 static struct resource eth_resources[] = {
134         [0] = {
135                 .start  = AT91SAM9260_BASE_EMAC,
136                 .end    = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
137                 .flags  = IORESOURCE_MEM,
138         },
139         [1] = {
140                 .start  = AT91SAM9260_ID_EMAC,
141                 .end    = AT91SAM9260_ID_EMAC,
142                 .flags  = IORESOURCE_IRQ,
143         },
144 };
145
146 static struct platform_device at91sam9260_eth_device = {
147         .name           = "macb",
148         .id             = -1,
149         .dev            = {
150                                 .dma_mask               = &eth_dmamask,
151                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
152                                 .platform_data          = &eth_data,
153         },
154         .resource       = eth_resources,
155         .num_resources  = ARRAY_SIZE(eth_resources),
156 };
157
158 void __init at91_add_device_eth(struct at91_eth_data *data)
159 {
160         if (!data)
161                 return;
162
163         if (data->phy_irq_pin) {
164                 at91_set_gpio_input(data->phy_irq_pin, 0);
165                 at91_set_deglitch(data->phy_irq_pin, 1);
166         }
167
168         /* Pins used for MII and RMII */
169         at91_set_A_periph(AT91_PIN_PA19, 0);    /* ETXCK_EREFCK */
170         at91_set_A_periph(AT91_PIN_PA17, 0);    /* ERXDV */
171         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERX0 */
172         at91_set_A_periph(AT91_PIN_PA15, 0);    /* ERX1 */
173         at91_set_A_periph(AT91_PIN_PA18, 0);    /* ERXER */
174         at91_set_A_periph(AT91_PIN_PA16, 0);    /* ETXEN */
175         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ETX0 */
176         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ETX1 */
177         at91_set_A_periph(AT91_PIN_PA21, 0);    /* EMDIO */
178         at91_set_A_periph(AT91_PIN_PA20, 0);    /* EMDC */
179
180         if (!data->is_rmii) {
181                 at91_set_B_periph(AT91_PIN_PA28, 0);    /* ECRS */
182                 at91_set_B_periph(AT91_PIN_PA29, 0);    /* ECOL */
183                 at91_set_B_periph(AT91_PIN_PA25, 0);    /* ERX2 */
184                 at91_set_B_periph(AT91_PIN_PA26, 0);    /* ERX3 */
185                 at91_set_B_periph(AT91_PIN_PA27, 0);    /* ERXCK */
186                 at91_set_B_periph(AT91_PIN_PA23, 0);    /* ETX2 */
187                 at91_set_B_periph(AT91_PIN_PA24, 0);    /* ETX3 */
188                 at91_set_B_periph(AT91_PIN_PA22, 0);    /* ETXER */
189         }
190
191         eth_data = *data;
192         platform_device_register(&at91sam9260_eth_device);
193 }
194 #else
195 void __init at91_add_device_eth(struct at91_eth_data *data) {}
196 #endif
197
198
199 /* --------------------------------------------------------------------
200  *  MMC / SD
201  * -------------------------------------------------------------------- */
202
203 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
204 static u64 mmc_dmamask = DMA_BIT_MASK(32);
205 static struct at91_mmc_data mmc_data;
206
207 static struct resource mmc_resources[] = {
208         [0] = {
209                 .start  = AT91SAM9260_BASE_MCI,
210                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
211                 .flags  = IORESOURCE_MEM,
212         },
213         [1] = {
214                 .start  = AT91SAM9260_ID_MCI,
215                 .end    = AT91SAM9260_ID_MCI,
216                 .flags  = IORESOURCE_IRQ,
217         },
218 };
219
220 static struct platform_device at91sam9260_mmc_device = {
221         .name           = "at91_mci",
222         .id             = -1,
223         .dev            = {
224                                 .dma_mask               = &mmc_dmamask,
225                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
226                                 .platform_data          = &mmc_data,
227         },
228         .resource       = mmc_resources,
229         .num_resources  = ARRAY_SIZE(mmc_resources),
230 };
231
232 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
233 {
234         if (!data)
235                 return;
236
237         /* input/irq */
238         if (data->det_pin) {
239                 at91_set_gpio_input(data->det_pin, 1);
240                 at91_set_deglitch(data->det_pin, 1);
241         }
242         if (data->wp_pin)
243                 at91_set_gpio_input(data->wp_pin, 1);
244         if (data->vcc_pin)
245                 at91_set_gpio_output(data->vcc_pin, 0);
246
247         /* CLK */
248         at91_set_A_periph(AT91_PIN_PA8, 0);
249
250         if (data->slot_b) {
251                 /* CMD */
252                 at91_set_B_periph(AT91_PIN_PA1, 1);
253
254                 /* DAT0, maybe DAT1..DAT3 */
255                 at91_set_B_periph(AT91_PIN_PA0, 1);
256                 if (data->wire4) {
257                         at91_set_B_periph(AT91_PIN_PA5, 1);
258                         at91_set_B_periph(AT91_PIN_PA4, 1);
259                         at91_set_B_periph(AT91_PIN_PA3, 1);
260                 }
261         } else {
262                 /* CMD */
263                 at91_set_A_periph(AT91_PIN_PA7, 1);
264
265                 /* DAT0, maybe DAT1..DAT3 */
266                 at91_set_A_periph(AT91_PIN_PA6, 1);
267                 if (data->wire4) {
268                         at91_set_A_periph(AT91_PIN_PA9, 1);
269                         at91_set_A_periph(AT91_PIN_PA10, 1);
270                         at91_set_A_periph(AT91_PIN_PA11, 1);
271                 }
272         }
273
274         mmc_data = *data;
275         platform_device_register(&at91sam9260_mmc_device);
276 }
277 #else
278 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
279 #endif
280
281 /* --------------------------------------------------------------------
282  *  MMC / SD Slot for Atmel MCI Driver
283  * -------------------------------------------------------------------- */
284
285 #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
286 static u64 mmc_dmamask = DMA_BIT_MASK(32);
287 static struct mci_platform_data mmc_data;
288
289 static struct resource mmc_resources[] = {
290         [0] = {
291                 .start  = AT91SAM9260_BASE_MCI,
292                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
293                 .flags  = IORESOURCE_MEM,
294         },
295         [1] = {
296                 .start  = AT91SAM9260_ID_MCI,
297                 .end    = AT91SAM9260_ID_MCI,
298                 .flags  = IORESOURCE_IRQ,
299         },
300 };
301
302 static struct platform_device at91sam9260_mmc_device = {
303         .name           = "atmel_mci",
304         .id             = -1,
305         .dev            = {
306                                 .dma_mask               = &mmc_dmamask,
307                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
308                                 .platform_data          = &mmc_data,
309         },
310         .resource       = mmc_resources,
311         .num_resources  = ARRAY_SIZE(mmc_resources),
312 };
313
314 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
315 {
316         unsigned int i;
317         unsigned int slot_count = 0;
318
319         if (!data)
320                 return;
321
322         for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
323                 if (data->slot[i].bus_width) {
324                         /* input/irq */
325                         if (data->slot[i].detect_pin) {
326                                 at91_set_gpio_input(data->slot[i].detect_pin, 1);
327                                 at91_set_deglitch(data->slot[i].detect_pin, 1);
328                         }
329                         if (data->slot[i].wp_pin)
330                                 at91_set_gpio_input(data->slot[i].wp_pin, 1);
331
332                         switch (i) {
333                         case 0:
334                                 /* CMD */
335                                 at91_set_A_periph(AT91_PIN_PA7, 1);
336                                 /* DAT0, maybe DAT1..DAT3 */
337                                 at91_set_A_periph(AT91_PIN_PA6, 1);
338                                 if (data->slot[i].bus_width == 4) {
339                                         at91_set_A_periph(AT91_PIN_PA9, 1);
340                                         at91_set_A_periph(AT91_PIN_PA10, 1);
341                                         at91_set_A_periph(AT91_PIN_PA11, 1);
342                                 }
343                                 slot_count++;
344                                 break;
345                         case 1:
346                                 /* CMD */
347                                 at91_set_B_periph(AT91_PIN_PA1, 1);
348                                 /* DAT0, maybe DAT1..DAT3 */
349                                 at91_set_B_periph(AT91_PIN_PA0, 1);
350                                 if (data->slot[i].bus_width == 4) {
351                                         at91_set_B_periph(AT91_PIN_PA5, 1);
352                                         at91_set_B_periph(AT91_PIN_PA4, 1);
353                                         at91_set_B_periph(AT91_PIN_PA3, 1);
354                                 }
355                                 slot_count++;
356                                 break;
357                         default:
358                                 printk(KERN_ERR
359                                         "AT91: SD/MMC slot %d not available\n", i);
360                                 break;
361                         }
362                 }
363         }
364
365         if (slot_count) {
366                 /* CLK */
367                 at91_set_A_periph(AT91_PIN_PA8, 0);
368
369                 mmc_data = *data;
370                 platform_device_register(&at91sam9260_mmc_device);
371         }
372 }
373 #else
374 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
375 #endif
376
377
378 /* --------------------------------------------------------------------
379  *  NAND / SmartMedia
380  * -------------------------------------------------------------------- */
381
382 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
383 static struct atmel_nand_data nand_data;
384
385 #define NAND_BASE       AT91_CHIPSELECT_3
386
387 static struct resource nand_resources[] = {
388         [0] = {
389                 .start  = NAND_BASE,
390                 .end    = NAND_BASE + SZ_256M - 1,
391                 .flags  = IORESOURCE_MEM,
392         },
393         [1] = {
394                 .start  = AT91_BASE_SYS + AT91_ECC,
395                 .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
396                 .flags  = IORESOURCE_MEM,
397         }
398 };
399
400 static struct platform_device at91sam9260_nand_device = {
401         .name           = "atmel_nand",
402         .id             = -1,
403         .dev            = {
404                                 .platform_data  = &nand_data,
405         },
406         .resource       = nand_resources,
407         .num_resources  = ARRAY_SIZE(nand_resources),
408 };
409
410 void __init at91_add_device_nand(struct atmel_nand_data *data)
411 {
412         unsigned long csa;
413
414         if (!data)
415                 return;
416
417         csa = at91_sys_read(AT91_MATRIX_EBICSA);
418         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
419
420         /* enable pin */
421         if (data->enable_pin)
422                 at91_set_gpio_output(data->enable_pin, 1);
423
424         /* ready/busy pin */
425         if (data->rdy_pin)
426                 at91_set_gpio_input(data->rdy_pin, 1);
427
428         /* card detect pin */
429         if (data->det_pin)
430                 at91_set_gpio_input(data->det_pin, 1);
431
432         nand_data = *data;
433         platform_device_register(&at91sam9260_nand_device);
434 }
435 #else
436 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
437 #endif
438
439
440 /* --------------------------------------------------------------------
441  *  TWI (i2c)
442  * -------------------------------------------------------------------- */
443
444 /*
445  * Prefer the GPIO code since the TWI controller isn't robust
446  * (gets overruns and underruns under load) and can only issue
447  * repeated STARTs in one scenario (the driver doesn't yet handle them).
448  */
449
450 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
451
452 static struct i2c_gpio_platform_data pdata = {
453         .sda_pin                = AT91_PIN_PA23,
454         .sda_is_open_drain      = 1,
455         .scl_pin                = AT91_PIN_PA24,
456         .scl_is_open_drain      = 1,
457         .udelay                 = 2,            /* ~100 kHz */
458 };
459
460 static struct platform_device at91sam9260_twi_device = {
461         .name                   = "i2c-gpio",
462         .id                     = -1,
463         .dev.platform_data      = &pdata,
464 };
465
466 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
467 {
468         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
469         at91_set_multi_drive(AT91_PIN_PA23, 1);
470
471         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
472         at91_set_multi_drive(AT91_PIN_PA24, 1);
473
474         i2c_register_board_info(0, devices, nr_devices);
475         platform_device_register(&at91sam9260_twi_device);
476 }
477
478 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
479
480 static struct resource twi_resources[] = {
481         [0] = {
482                 .start  = AT91SAM9260_BASE_TWI,
483                 .end    = AT91SAM9260_BASE_TWI + SZ_16K - 1,
484                 .flags  = IORESOURCE_MEM,
485         },
486         [1] = {
487                 .start  = AT91SAM9260_ID_TWI,
488                 .end    = AT91SAM9260_ID_TWI,
489                 .flags  = IORESOURCE_IRQ,
490         },
491 };
492
493 static struct platform_device at91sam9260_twi_device = {
494         .name           = "at91_i2c",
495         .id             = -1,
496         .resource       = twi_resources,
497         .num_resources  = ARRAY_SIZE(twi_resources),
498 };
499
500 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
501 {
502         /* pins used for TWI interface */
503         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
504         at91_set_multi_drive(AT91_PIN_PA23, 1);
505
506         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
507         at91_set_multi_drive(AT91_PIN_PA24, 1);
508
509         i2c_register_board_info(0, devices, nr_devices);
510         platform_device_register(&at91sam9260_twi_device);
511 }
512 #else
513 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
514 #endif
515
516
517 /* --------------------------------------------------------------------
518  *  SPI
519  * -------------------------------------------------------------------- */
520
521 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
522 static u64 spi_dmamask = DMA_BIT_MASK(32);
523
524 static struct resource spi0_resources[] = {
525         [0] = {
526                 .start  = AT91SAM9260_BASE_SPI0,
527                 .end    = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
528                 .flags  = IORESOURCE_MEM,
529         },
530         [1] = {
531                 .start  = AT91SAM9260_ID_SPI0,
532                 .end    = AT91SAM9260_ID_SPI0,
533                 .flags  = IORESOURCE_IRQ,
534         },
535 };
536
537 static struct platform_device at91sam9260_spi0_device = {
538         .name           = "atmel_spi",
539         .id             = 0,
540         .dev            = {
541                                 .dma_mask               = &spi_dmamask,
542                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
543         },
544         .resource       = spi0_resources,
545         .num_resources  = ARRAY_SIZE(spi0_resources),
546 };
547
548 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
549
550 static struct resource spi1_resources[] = {
551         [0] = {
552                 .start  = AT91SAM9260_BASE_SPI1,
553                 .end    = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
554                 .flags  = IORESOURCE_MEM,
555         },
556         [1] = {
557                 .start  = AT91SAM9260_ID_SPI1,
558                 .end    = AT91SAM9260_ID_SPI1,
559                 .flags  = IORESOURCE_IRQ,
560         },
561 };
562
563 static struct platform_device at91sam9260_spi1_device = {
564         .name           = "atmel_spi",
565         .id             = 1,
566         .dev            = {
567                                 .dma_mask               = &spi_dmamask,
568                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
569         },
570         .resource       = spi1_resources,
571         .num_resources  = ARRAY_SIZE(spi1_resources),
572 };
573
574 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
575
576 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
577 {
578         int i;
579         unsigned long cs_pin;
580         short enable_spi0 = 0;
581         short enable_spi1 = 0;
582
583         /* Choose SPI chip-selects */
584         for (i = 0; i < nr_devices; i++) {
585                 if (devices[i].controller_data)
586                         cs_pin = (unsigned long) devices[i].controller_data;
587                 else if (devices[i].bus_num == 0)
588                         cs_pin = spi0_standard_cs[devices[i].chip_select];
589                 else
590                         cs_pin = spi1_standard_cs[devices[i].chip_select];
591
592                 if (devices[i].bus_num == 0)
593                         enable_spi0 = 1;
594                 else
595                         enable_spi1 = 1;
596
597                 /* enable chip-select pin */
598                 at91_set_gpio_output(cs_pin, 1);
599
600                 /* pass chip-select pin to driver */
601                 devices[i].controller_data = (void *) cs_pin;
602         }
603
604         spi_register_board_info(devices, nr_devices);
605
606         /* Configure SPI bus(es) */
607         if (enable_spi0) {
608                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
609                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
610                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
611
612                 at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
613                 platform_device_register(&at91sam9260_spi0_device);
614         }
615         if (enable_spi1) {
616                 at91_set_A_periph(AT91_PIN_PB0, 0);     /* SPI1_MISO */
617                 at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
618                 at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
619
620                 at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
621                 platform_device_register(&at91sam9260_spi1_device);
622         }
623 }
624 #else
625 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
626 #endif
627
628
629 /* --------------------------------------------------------------------
630  *  Timer/Counter blocks
631  * -------------------------------------------------------------------- */
632
633 #ifdef CONFIG_ATMEL_TCLIB
634
635 static struct resource tcb0_resources[] = {
636         [0] = {
637                 .start  = AT91SAM9260_BASE_TCB0,
638                 .end    = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
639                 .flags  = IORESOURCE_MEM,
640         },
641         [1] = {
642                 .start  = AT91SAM9260_ID_TC0,
643                 .end    = AT91SAM9260_ID_TC0,
644                 .flags  = IORESOURCE_IRQ,
645         },
646         [2] = {
647                 .start  = AT91SAM9260_ID_TC1,
648                 .end    = AT91SAM9260_ID_TC1,
649                 .flags  = IORESOURCE_IRQ,
650         },
651         [3] = {
652                 .start  = AT91SAM9260_ID_TC2,
653                 .end    = AT91SAM9260_ID_TC2,
654                 .flags  = IORESOURCE_IRQ,
655         },
656 };
657
658 static struct platform_device at91sam9260_tcb0_device = {
659         .name           = "atmel_tcb",
660         .id             = 0,
661         .resource       = tcb0_resources,
662         .num_resources  = ARRAY_SIZE(tcb0_resources),
663 };
664
665 static struct resource tcb1_resources[] = {
666         [0] = {
667                 .start  = AT91SAM9260_BASE_TCB1,
668                 .end    = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
669                 .flags  = IORESOURCE_MEM,
670         },
671         [1] = {
672                 .start  = AT91SAM9260_ID_TC3,
673                 .end    = AT91SAM9260_ID_TC3,
674                 .flags  = IORESOURCE_IRQ,
675         },
676         [2] = {
677                 .start  = AT91SAM9260_ID_TC4,
678                 .end    = AT91SAM9260_ID_TC4,
679                 .flags  = IORESOURCE_IRQ,
680         },
681         [3] = {
682                 .start  = AT91SAM9260_ID_TC5,
683                 .end    = AT91SAM9260_ID_TC5,
684                 .flags  = IORESOURCE_IRQ,
685         },
686 };
687
688 static struct platform_device at91sam9260_tcb1_device = {
689         .name           = "atmel_tcb",
690         .id             = 1,
691         .resource       = tcb1_resources,
692         .num_resources  = ARRAY_SIZE(tcb1_resources),
693 };
694
695 static void __init at91_add_device_tc(void)
696 {
697         /* this chip has a separate clock and irq for each TC channel */
698         at91_clock_associate("tc0_clk", &at91sam9260_tcb0_device.dev, "t0_clk");
699         at91_clock_associate("tc1_clk", &at91sam9260_tcb0_device.dev, "t1_clk");
700         at91_clock_associate("tc2_clk", &at91sam9260_tcb0_device.dev, "t2_clk");
701         platform_device_register(&at91sam9260_tcb0_device);
702
703         at91_clock_associate("tc3_clk", &at91sam9260_tcb1_device.dev, "t0_clk");
704         at91_clock_associate("tc4_clk", &at91sam9260_tcb1_device.dev, "t1_clk");
705         at91_clock_associate("tc5_clk", &at91sam9260_tcb1_device.dev, "t2_clk");
706         platform_device_register(&at91sam9260_tcb1_device);
707 }
708 #else
709 static void __init at91_add_device_tc(void) { }
710 #endif
711
712
713 /* --------------------------------------------------------------------
714  *  RTT
715  * -------------------------------------------------------------------- */
716
717 static struct resource rtt_resources[] = {
718         {
719                 .start  = AT91_BASE_SYS + AT91_RTT,
720                 .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
721                 .flags  = IORESOURCE_MEM,
722         }
723 };
724
725 static struct platform_device at91sam9260_rtt_device = {
726         .name           = "at91_rtt",
727         .id             = 0,
728         .resource       = rtt_resources,
729         .num_resources  = ARRAY_SIZE(rtt_resources),
730 };
731
732 static void __init at91_add_device_rtt(void)
733 {
734         platform_device_register(&at91sam9260_rtt_device);
735 }
736
737
738 /* --------------------------------------------------------------------
739  *  Watchdog
740  * -------------------------------------------------------------------- */
741
742 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
743 static struct platform_device at91sam9260_wdt_device = {
744         .name           = "at91_wdt",
745         .id             = -1,
746         .num_resources  = 0,
747 };
748
749 static void __init at91_add_device_watchdog(void)
750 {
751         platform_device_register(&at91sam9260_wdt_device);
752 }
753 #else
754 static void __init at91_add_device_watchdog(void) {}
755 #endif
756
757
758 /* --------------------------------------------------------------------
759  *  SSC -- Synchronous Serial Controller
760  * -------------------------------------------------------------------- */
761
762 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
763 static u64 ssc_dmamask = DMA_BIT_MASK(32);
764
765 static struct resource ssc_resources[] = {
766         [0] = {
767                 .start  = AT91SAM9260_BASE_SSC,
768                 .end    = AT91SAM9260_BASE_SSC + SZ_16K - 1,
769                 .flags  = IORESOURCE_MEM,
770         },
771         [1] = {
772                 .start  = AT91SAM9260_ID_SSC,
773                 .end    = AT91SAM9260_ID_SSC,
774                 .flags  = IORESOURCE_IRQ,
775         },
776 };
777
778 static struct platform_device at91sam9260_ssc_device = {
779         .name   = "ssc",
780         .id     = 0,
781         .dev    = {
782                 .dma_mask               = &ssc_dmamask,
783                 .coherent_dma_mask      = DMA_BIT_MASK(32),
784         },
785         .resource       = ssc_resources,
786         .num_resources  = ARRAY_SIZE(ssc_resources),
787 };
788
789 static inline void configure_ssc_pins(unsigned pins)
790 {
791         if (pins & ATMEL_SSC_TF)
792                 at91_set_A_periph(AT91_PIN_PB17, 1);
793         if (pins & ATMEL_SSC_TK)
794                 at91_set_A_periph(AT91_PIN_PB16, 1);
795         if (pins & ATMEL_SSC_TD)
796                 at91_set_A_periph(AT91_PIN_PB18, 1);
797         if (pins & ATMEL_SSC_RD)
798                 at91_set_A_periph(AT91_PIN_PB19, 1);
799         if (pins & ATMEL_SSC_RK)
800                 at91_set_A_periph(AT91_PIN_PB20, 1);
801         if (pins & ATMEL_SSC_RF)
802                 at91_set_A_periph(AT91_PIN_PB21, 1);
803 }
804
805 /*
806  * SSC controllers are accessed through library code, instead of any
807  * kind of all-singing/all-dancing driver.  For example one could be
808  * used by a particular I2S audio codec's driver, while another one
809  * on the same system might be used by a custom data capture driver.
810  */
811 void __init at91_add_device_ssc(unsigned id, unsigned pins)
812 {
813         struct platform_device *pdev;
814
815         /*
816          * NOTE: caller is responsible for passing information matching
817          * "pins" to whatever will be using each particular controller.
818          */
819         switch (id) {
820         case AT91SAM9260_ID_SSC:
821                 pdev = &at91sam9260_ssc_device;
822                 configure_ssc_pins(pins);
823                 at91_clock_associate("ssc_clk", &pdev->dev, "pclk");
824                 break;
825         default:
826                 return;
827         }
828
829         platform_device_register(pdev);
830 }
831
832 #else
833 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
834 #endif
835
836
837 /* --------------------------------------------------------------------
838  *  UART
839  * -------------------------------------------------------------------- */
840 #if defined(CONFIG_SERIAL_ATMEL)
841 static struct resource dbgu_resources[] = {
842         [0] = {
843                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
844                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
845                 .flags  = IORESOURCE_MEM,
846         },
847         [1] = {
848                 .start  = AT91_ID_SYS,
849                 .end    = AT91_ID_SYS,
850                 .flags  = IORESOURCE_IRQ,
851         },
852 };
853
854 static struct atmel_uart_data dbgu_data = {
855         .use_dma_tx     = 0,
856         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
857         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
858 };
859
860 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
861
862 static struct platform_device at91sam9260_dbgu_device = {
863         .name           = "atmel_usart",
864         .id             = 0,
865         .dev            = {
866                                 .dma_mask               = &dbgu_dmamask,
867                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
868                                 .platform_data          = &dbgu_data,
869         },
870         .resource       = dbgu_resources,
871         .num_resources  = ARRAY_SIZE(dbgu_resources),
872 };
873
874 static inline void configure_dbgu_pins(void)
875 {
876         at91_set_A_periph(AT91_PIN_PB14, 0);            /* DRXD */
877         at91_set_A_periph(AT91_PIN_PB15, 1);            /* DTXD */
878 }
879
880 static struct resource uart0_resources[] = {
881         [0] = {
882                 .start  = AT91SAM9260_BASE_US0,
883                 .end    = AT91SAM9260_BASE_US0 + SZ_16K - 1,
884                 .flags  = IORESOURCE_MEM,
885         },
886         [1] = {
887                 .start  = AT91SAM9260_ID_US0,
888                 .end    = AT91SAM9260_ID_US0,
889                 .flags  = IORESOURCE_IRQ,
890         },
891 };
892
893 static struct atmel_uart_data uart0_data = {
894         .use_dma_tx     = 1,
895         .use_dma_rx     = 1,
896 };
897
898 static u64 uart0_dmamask = DMA_BIT_MASK(32);
899
900 static struct platform_device at91sam9260_uart0_device = {
901         .name           = "atmel_usart",
902         .id             = 1,
903         .dev            = {
904                                 .dma_mask               = &uart0_dmamask,
905                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
906                                 .platform_data          = &uart0_data,
907         },
908         .resource       = uart0_resources,
909         .num_resources  = ARRAY_SIZE(uart0_resources),
910 };
911
912 static inline void configure_usart0_pins(unsigned pins)
913 {
914         at91_set_A_periph(AT91_PIN_PB4, 1);             /* TXD0 */
915         at91_set_A_periph(AT91_PIN_PB5, 0);             /* RXD0 */
916
917         if (pins & ATMEL_UART_RTS)
918                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS0 */
919         if (pins & ATMEL_UART_CTS)
920                 at91_set_A_periph(AT91_PIN_PB27, 0);    /* CTS0 */
921         if (pins & ATMEL_UART_DTR)
922                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* DTR0 */
923         if (pins & ATMEL_UART_DSR)
924                 at91_set_A_periph(AT91_PIN_PB22, 0);    /* DSR0 */
925         if (pins & ATMEL_UART_DCD)
926                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD0 */
927         if (pins & ATMEL_UART_RI)
928                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* RI0 */
929 }
930
931 static struct resource uart1_resources[] = {
932         [0] = {
933                 .start  = AT91SAM9260_BASE_US1,
934                 .end    = AT91SAM9260_BASE_US1 + SZ_16K - 1,
935                 .flags  = IORESOURCE_MEM,
936         },
937         [1] = {
938                 .start  = AT91SAM9260_ID_US1,
939                 .end    = AT91SAM9260_ID_US1,
940                 .flags  = IORESOURCE_IRQ,
941         },
942 };
943
944 static struct atmel_uart_data uart1_data = {
945         .use_dma_tx     = 1,
946         .use_dma_rx     = 1,
947 };
948
949 static u64 uart1_dmamask = DMA_BIT_MASK(32);
950
951 static struct platform_device at91sam9260_uart1_device = {
952         .name           = "atmel_usart",
953         .id             = 2,
954         .dev            = {
955                                 .dma_mask               = &uart1_dmamask,
956                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
957                                 .platform_data          = &uart1_data,
958         },
959         .resource       = uart1_resources,
960         .num_resources  = ARRAY_SIZE(uart1_resources),
961 };
962
963 static inline void configure_usart1_pins(unsigned pins)
964 {
965         at91_set_A_periph(AT91_PIN_PB6, 1);             /* TXD1 */
966         at91_set_A_periph(AT91_PIN_PB7, 0);             /* RXD1 */
967
968         if (pins & ATMEL_UART_RTS)
969                 at91_set_A_periph(AT91_PIN_PB28, 0);    /* RTS1 */
970         if (pins & ATMEL_UART_CTS)
971                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* CTS1 */
972 }
973
974 static struct resource uart2_resources[] = {
975         [0] = {
976                 .start  = AT91SAM9260_BASE_US2,
977                 .end    = AT91SAM9260_BASE_US2 + SZ_16K - 1,
978                 .flags  = IORESOURCE_MEM,
979         },
980         [1] = {
981                 .start  = AT91SAM9260_ID_US2,
982                 .end    = AT91SAM9260_ID_US2,
983                 .flags  = IORESOURCE_IRQ,
984         },
985 };
986
987 static struct atmel_uart_data uart2_data = {
988         .use_dma_tx     = 1,
989         .use_dma_rx     = 1,
990 };
991
992 static u64 uart2_dmamask = DMA_BIT_MASK(32);
993
994 static struct platform_device at91sam9260_uart2_device = {
995         .name           = "atmel_usart",
996         .id             = 3,
997         .dev            = {
998                                 .dma_mask               = &uart2_dmamask,
999                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1000                                 .platform_data          = &uart2_data,
1001         },
1002         .resource       = uart2_resources,
1003         .num_resources  = ARRAY_SIZE(uart2_resources),
1004 };
1005
1006 static inline void configure_usart2_pins(unsigned pins)
1007 {
1008         at91_set_A_periph(AT91_PIN_PB8, 1);             /* TXD2 */
1009         at91_set_A_periph(AT91_PIN_PB9, 0);             /* RXD2 */
1010
1011         if (pins & ATMEL_UART_RTS)
1012                 at91_set_A_periph(AT91_PIN_PA4, 0);     /* RTS2 */
1013         if (pins & ATMEL_UART_CTS)
1014                 at91_set_A_periph(AT91_PIN_PA5, 0);     /* CTS2 */
1015 }
1016
1017 static struct resource uart3_resources[] = {
1018         [0] = {
1019                 .start  = AT91SAM9260_BASE_US3,
1020                 .end    = AT91SAM9260_BASE_US3 + SZ_16K - 1,
1021                 .flags  = IORESOURCE_MEM,
1022         },
1023         [1] = {
1024                 .start  = AT91SAM9260_ID_US3,
1025                 .end    = AT91SAM9260_ID_US3,
1026                 .flags  = IORESOURCE_IRQ,
1027         },
1028 };
1029
1030 static struct atmel_uart_data uart3_data = {
1031         .use_dma_tx     = 1,
1032         .use_dma_rx     = 1,
1033 };
1034
1035 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1036
1037 static struct platform_device at91sam9260_uart3_device = {
1038         .name           = "atmel_usart",
1039         .id             = 4,
1040         .dev            = {
1041                                 .dma_mask               = &uart3_dmamask,
1042                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1043                                 .platform_data          = &uart3_data,
1044         },
1045         .resource       = uart3_resources,
1046         .num_resources  = ARRAY_SIZE(uart3_resources),
1047 };
1048
1049 static inline void configure_usart3_pins(unsigned pins)
1050 {
1051         at91_set_A_periph(AT91_PIN_PB10, 1);            /* TXD3 */
1052         at91_set_A_periph(AT91_PIN_PB11, 0);            /* RXD3 */
1053
1054         if (pins & ATMEL_UART_RTS)
1055                 at91_set_B_periph(AT91_PIN_PC8, 0);     /* RTS3 */
1056         if (pins & ATMEL_UART_CTS)
1057                 at91_set_B_periph(AT91_PIN_PC10, 0);    /* CTS3 */
1058 }
1059
1060 static struct resource uart4_resources[] = {
1061         [0] = {
1062                 .start  = AT91SAM9260_BASE_US4,
1063                 .end    = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1064                 .flags  = IORESOURCE_MEM,
1065         },
1066         [1] = {
1067                 .start  = AT91SAM9260_ID_US4,
1068                 .end    = AT91SAM9260_ID_US4,
1069                 .flags  = IORESOURCE_IRQ,
1070         },
1071 };
1072
1073 static struct atmel_uart_data uart4_data = {
1074         .use_dma_tx     = 1,
1075         .use_dma_rx     = 1,
1076 };
1077
1078 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1079
1080 static struct platform_device at91sam9260_uart4_device = {
1081         .name           = "atmel_usart",
1082         .id             = 5,
1083         .dev            = {
1084                                 .dma_mask               = &uart4_dmamask,
1085                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1086                                 .platform_data          = &uart4_data,
1087         },
1088         .resource       = uart4_resources,
1089         .num_resources  = ARRAY_SIZE(uart4_resources),
1090 };
1091
1092 static inline void configure_usart4_pins(void)
1093 {
1094         at91_set_B_periph(AT91_PIN_PA31, 1);            /* TXD4 */
1095         at91_set_B_periph(AT91_PIN_PA30, 0);            /* RXD4 */
1096 }
1097
1098 static struct resource uart5_resources[] = {
1099         [0] = {
1100                 .start  = AT91SAM9260_BASE_US5,
1101                 .end    = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1102                 .flags  = IORESOURCE_MEM,
1103         },
1104         [1] = {
1105                 .start  = AT91SAM9260_ID_US5,
1106                 .end    = AT91SAM9260_ID_US5,
1107                 .flags  = IORESOURCE_IRQ,
1108         },
1109 };
1110
1111 static struct atmel_uart_data uart5_data = {
1112         .use_dma_tx     = 1,
1113         .use_dma_rx     = 1,
1114 };
1115
1116 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1117
1118 static struct platform_device at91sam9260_uart5_device = {
1119         .name           = "atmel_usart",
1120         .id             = 6,
1121         .dev            = {
1122                                 .dma_mask               = &uart5_dmamask,
1123                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1124                                 .platform_data          = &uart5_data,
1125         },
1126         .resource       = uart5_resources,
1127         .num_resources  = ARRAY_SIZE(uart5_resources),
1128 };
1129
1130 static inline void configure_usart5_pins(void)
1131 {
1132         at91_set_A_periph(AT91_PIN_PB12, 1);            /* TXD5 */
1133         at91_set_A_periph(AT91_PIN_PB13, 0);            /* RXD5 */
1134 }
1135
1136 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1137 struct platform_device *atmel_default_console_device;   /* the serial console device */
1138
1139 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1140 {
1141         struct platform_device *pdev;
1142
1143         switch (id) {
1144                 case 0:         /* DBGU */
1145                         pdev = &at91sam9260_dbgu_device;
1146                         configure_dbgu_pins();
1147                         at91_clock_associate("mck", &pdev->dev, "usart");
1148                         break;
1149                 case AT91SAM9260_ID_US0:
1150                         pdev = &at91sam9260_uart0_device;
1151                         configure_usart0_pins(pins);
1152                         at91_clock_associate("usart0_clk", &pdev->dev, "usart");
1153                         break;
1154                 case AT91SAM9260_ID_US1:
1155                         pdev = &at91sam9260_uart1_device;
1156                         configure_usart1_pins(pins);
1157                         at91_clock_associate("usart1_clk", &pdev->dev, "usart");
1158                         break;
1159                 case AT91SAM9260_ID_US2:
1160                         pdev = &at91sam9260_uart2_device;
1161                         configure_usart2_pins(pins);
1162                         at91_clock_associate("usart2_clk", &pdev->dev, "usart");
1163                         break;
1164                 case AT91SAM9260_ID_US3:
1165                         pdev = &at91sam9260_uart3_device;
1166                         configure_usart3_pins(pins);
1167                         at91_clock_associate("usart3_clk", &pdev->dev, "usart");
1168                         break;
1169                 case AT91SAM9260_ID_US4:
1170                         pdev = &at91sam9260_uart4_device;
1171                         configure_usart4_pins();
1172                         at91_clock_associate("usart4_clk", &pdev->dev, "usart");
1173                         break;
1174                 case AT91SAM9260_ID_US5:
1175                         pdev = &at91sam9260_uart5_device;
1176                         configure_usart5_pins();
1177                         at91_clock_associate("usart5_clk", &pdev->dev, "usart");
1178                         break;
1179                 default:
1180                         return;
1181         }
1182         pdev->id = portnr;              /* update to mapped ID */
1183
1184         if (portnr < ATMEL_MAX_UART)
1185                 at91_uarts[portnr] = pdev;
1186 }
1187
1188 void __init at91_set_serial_console(unsigned portnr)
1189 {
1190         if (portnr < ATMEL_MAX_UART)
1191                 atmel_default_console_device = at91_uarts[portnr];
1192 }
1193
1194 void __init at91_add_device_serial(void)
1195 {
1196         int i;
1197
1198         for (i = 0; i < ATMEL_MAX_UART; i++) {
1199                 if (at91_uarts[i])
1200                         platform_device_register(at91_uarts[i]);
1201         }
1202
1203         if (!atmel_default_console_device)
1204                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1205 }
1206 #else
1207 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1208 void __init at91_set_serial_console(unsigned portnr) {}
1209 void __init at91_add_device_serial(void) {}
1210 #endif
1211
1212 /* --------------------------------------------------------------------
1213  *  CF/IDE
1214  * -------------------------------------------------------------------- */
1215
1216 #if defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) || \
1217         defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1218         defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1219
1220 static struct at91_cf_data cf0_data;
1221
1222 static struct resource cf0_resources[] = {
1223         [0] = {
1224                 .start  = AT91_CHIPSELECT_4,
1225                 .end    = AT91_CHIPSELECT_4 + SZ_256M - 1,
1226                 .flags  = IORESOURCE_MEM,
1227         }
1228 };
1229
1230 static struct platform_device cf0_device = {
1231         .id             = 0,
1232         .dev            = {
1233                                 .platform_data  = &cf0_data,
1234         },
1235         .resource       = cf0_resources,
1236         .num_resources  = ARRAY_SIZE(cf0_resources),
1237 };
1238
1239 static struct at91_cf_data cf1_data;
1240
1241 static struct resource cf1_resources[] = {
1242         [0] = {
1243                 .start  = AT91_CHIPSELECT_5,
1244                 .end    = AT91_CHIPSELECT_5 + SZ_256M - 1,
1245                 .flags  = IORESOURCE_MEM,
1246         }
1247 };
1248
1249 static struct platform_device cf1_device = {
1250         .id             = 1,
1251         .dev            = {
1252                                 .platform_data  = &cf1_data,
1253         },
1254         .resource       = cf1_resources,
1255         .num_resources  = ARRAY_SIZE(cf1_resources),
1256 };
1257
1258 void __init at91_add_device_cf(struct at91_cf_data *data)
1259 {
1260         struct platform_device *pdev;
1261         unsigned long csa;
1262
1263         if (!data)
1264                 return;
1265
1266         csa = at91_sys_read(AT91_MATRIX_EBICSA);
1267
1268         switch (data->chipselect) {
1269         case 4:
1270                 at91_set_multi_drive(AT91_PIN_PC8, 0);
1271                 at91_set_A_periph(AT91_PIN_PC8, 0);
1272                 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1273                 cf0_data = *data;
1274                 pdev = &cf0_device;
1275                 break;
1276         case 5:
1277                 at91_set_multi_drive(AT91_PIN_PC9, 0);
1278                 at91_set_A_periph(AT91_PIN_PC9, 0);
1279                 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1280                 cf1_data = *data;
1281                 pdev = &cf1_device;
1282                 break;
1283         default:
1284                 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1285                        data->chipselect);
1286                 return;
1287         }
1288
1289         at91_sys_write(AT91_MATRIX_EBICSA, csa);
1290
1291         if (data->rst_pin) {
1292                 at91_set_multi_drive(data->rst_pin, 0);
1293                 at91_set_gpio_output(data->rst_pin, 1);
1294         }
1295
1296         if (data->irq_pin) {
1297                 at91_set_gpio_input(data->irq_pin, 0);
1298                 at91_set_deglitch(data->irq_pin, 1);
1299         }
1300
1301         if (data->det_pin) {
1302                 at91_set_gpio_input(data->det_pin, 0);
1303                 at91_set_deglitch(data->det_pin, 1);
1304         }
1305
1306         at91_set_B_periph(AT91_PIN_PC6, 0);     /* CFCE1 */
1307         at91_set_B_periph(AT91_PIN_PC7, 0);     /* CFCE2 */
1308         at91_set_A_periph(AT91_PIN_PC10, 0);    /* CFRNW */
1309         at91_set_A_periph(AT91_PIN_PC15, 1);    /* NWAIT */
1310
1311         if (data->flags & AT91_CF_TRUE_IDE)
1312 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1313                 pdev->name = "pata_at91";
1314 #elif defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
1315                 pdev->name = "at91_ide";
1316 #else
1317 #warning "board requires AT91_CF_TRUE_IDE: enable either at91_ide or pata_at91"
1318 #endif
1319         else
1320                 pdev->name = "at91_cf";
1321
1322         platform_device_register(pdev);
1323 }
1324
1325 #else
1326 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1327 #endif
1328
1329 /* -------------------------------------------------------------------- */
1330 /*
1331  * These devices are always present and don't need any board-specific
1332  * setup.
1333  */
1334 static int __init at91_add_standard_devices(void)
1335 {
1336         at91_add_device_rtt();
1337         at91_add_device_watchdog();
1338         at91_add_device_tc();
1339         return 0;
1340 }
1341
1342 arch_initcall(at91_add_standard_devices);