5 #include <asm-generic/pci-dma-compat.h>
7 #include <mach/hardware.h> /* for PCIBIOS_MIN_* */
9 #define pcibios_scan_all_fns(a, b) 0
11 #ifdef CONFIG_PCI_HOST_ITE8152
12 /* ITE bridge requires setting latency timer to avoid early bus access
13 termination by PIC bus mater devices
15 extern void pcibios_set_master(struct pci_dev *dev);
17 static inline void pcibios_set_master(struct pci_dev *dev)
19 /* No special bus mastering setup handling */
23 static inline void pcibios_penalize_isa_irq(int irq, int active)
25 /* We don't do dynamic PCI IRQ allocation */
29 * The PCI address space does equal the physical memory address space.
30 * The networking and block device layers use this boolean for bounce
33 #define PCI_DMA_BUS_IS_PHYS (1)
36 * Whether pci_unmap_{single,page} is a nop depends upon the
39 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
40 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
41 #define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
42 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
43 #define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
44 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
47 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
48 enum pci_dma_burst_strategy *strat,
49 unsigned long *strategy_parameter)
51 *strat = PCI_DMA_BURST_INFINITY;
52 *strategy_parameter = ~0UL;
57 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
58 enum pci_mmap_state mmap_state, int write_combine);
61 pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
62 struct resource *res);
65 pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
66 struct pci_bus_region *region);
69 * Dummy implementation; always return 0.
71 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
76 #endif /* __KERNEL__ */