1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2002-2010
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 #ifndef __ASM_GBL_DATA_H
8 #define __ASM_GBL_DATA_H
14 #include <asm/types.h>
15 #include <linux/types.h>
17 /* Architecture-specific global data */
18 struct arch_global_data {
19 #if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_FSL_ESDHC_IMX)
23 #if defined(CONFIG_FSL_ESDHC)
27 #if defined(CONFIG_U_QE)
32 #endif /* CONFIG_U_QE */
34 #ifdef CONFIG_AT91FAMILY
35 /* "static data" needed by at91's clock.c */
36 unsigned long cpu_clk_rate_hz;
37 unsigned long main_clk_rate_hz;
38 unsigned long mck_rate_hz;
39 unsigned long plla_rate_hz;
40 unsigned long pllb_rate_hz;
41 unsigned long at91_pllb_usb_init;
43 /* "static data" needed by most of timer.c on ARM platforms */
44 unsigned long timer_rate_hz;
47 unsigned long lastinc;
48 unsigned long long timer_reset_value;
49 #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
50 unsigned long tlb_addr;
51 unsigned long tlb_size;
52 #if defined(CONFIG_ARM64)
53 unsigned long tlb_fillptr;
54 unsigned long tlb_emerg;
57 #ifdef CFG_SYS_MEM_RESERVE_SECURE
58 #define MEM_RESERVE_SECURE_SECURED 0x1
59 #define MEM_RESERVE_SECURE_MAINTAINED 0x2
60 #define MEM_RESERVE_SECURE_ADDR_MASK (~0x3)
63 * This variable needs maintenance if the RAM base is not zero,
64 * or if RAM splits into non-consecutive banks. It also has a
65 * flag indicating the secure memory is marked as secure by MMU.
66 * Flags used: 0x1 secured
69 phys_addr_t secure_ram;
70 unsigned long tlb_allocated;
72 #ifdef CONFIG_RESV_RAM
74 * Reserved RAM for memory resident, eg. Management Complex (MC)
75 * driver which continues to run after U-Boot exits.
80 #ifdef CONFIG_ARCH_OMAP2PLUS
85 #if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR)
86 unsigned long mem2_clk;
89 #ifdef CONFIG_ARCH_IMX8
90 struct udevice *scu_dev;
93 #ifdef CONFIG_IMX_SENTINEL
94 struct udevice *s400_dev;
102 #include <asm-generic/global_data.h>
104 #if defined(__clang__) || defined(LTO_ENABLE)
106 #define DECLARE_GLOBAL_DATA_PTR
109 static inline gd_t *get_gd(void)
114 __asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr));
116 __asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr));
125 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18")
127 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9")
131 static inline void set_gd(volatile gd_t *gd_ptr)
134 __asm__ volatile("ldr x18, %0\n" : : "m"(gd_ptr));
135 #elif __ARM_ARCH >= 7
136 __asm__ volatile("ldr r9, %0\n" : : "m"(gd_ptr));
138 __asm__ volatile("mov r9, %0\n" : : "r"(gd_ptr));
142 #endif /* __ASSEMBLY__ */
144 #endif /* __ASM_GBL_DATA_H */