2 * linux/arch/arm/common/timer-sp.c
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/clocksource.h>
22 #include <linux/clockchips.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
27 #include <asm/hardware/arm_timer.h>
30 * These timers are currently always setup to be clocked at 1MHz.
32 #define TIMER_FREQ_KHZ (1000)
33 #define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ)
35 void __init sp804_clocksource_init(void __iomem *base, const char *name)
37 /* setup timer 0 as free-running clocksource */
38 writel(0, base + TIMER_CTRL);
39 writel(0xffffffff, base + TIMER_LOAD);
40 writel(0xffffffff, base + TIMER_VALUE);
41 writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
44 clocksource_mmio_init(base + TIMER_VALUE, name,
45 TIMER_FREQ_KHZ * 1000, 200, 32, clocksource_mmio_readl_down);
49 static void __iomem *clkevt_base;
52 * IRQ handler for the timer
54 static irqreturn_t sp804_timer_interrupt(int irq, void *dev_id)
56 struct clock_event_device *evt = dev_id;
58 /* clear the interrupt */
59 writel(1, clkevt_base + TIMER_INTCLR);
61 evt->event_handler(evt);
66 static void sp804_set_mode(enum clock_event_mode mode,
67 struct clock_event_device *evt)
69 unsigned long ctrl = TIMER_CTRL_32BIT | TIMER_CTRL_IE;
71 writel(ctrl, clkevt_base + TIMER_CTRL);
74 case CLOCK_EVT_MODE_PERIODIC:
75 writel(TIMER_RELOAD, clkevt_base + TIMER_LOAD);
76 ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
79 case CLOCK_EVT_MODE_ONESHOT:
80 /* period set, and timer enabled in 'next_event' hook */
81 ctrl |= TIMER_CTRL_ONESHOT;
84 case CLOCK_EVT_MODE_UNUSED:
85 case CLOCK_EVT_MODE_SHUTDOWN:
90 writel(ctrl, clkevt_base + TIMER_CTRL);
93 static int sp804_set_next_event(unsigned long next,
94 struct clock_event_device *evt)
96 unsigned long ctrl = readl(clkevt_base + TIMER_CTRL);
98 writel(next, clkevt_base + TIMER_LOAD);
99 writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
104 static struct clock_event_device sp804_clockevent = {
107 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
108 .set_mode = sp804_set_mode,
109 .set_next_event = sp804_set_next_event,
111 .cpumask = cpu_all_mask,
114 static struct irqaction sp804_timer_irq = {
116 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
117 .handler = sp804_timer_interrupt,
118 .dev_id = &sp804_clockevent,
121 void __init sp804_clockevents_init(void __iomem *base, unsigned int timer_irq)
123 struct clock_event_device *evt = &sp804_clockevent;
127 evt->irq = timer_irq;
128 evt->mult = div_sc(TIMER_FREQ_KHZ, NSEC_PER_MSEC, evt->shift);
129 evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt);
130 evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
132 setup_irq(timer_irq, &sp804_timer_irq);
133 clockevents_register_device(evt);