2 * linux/arch/arm/common/timer-sp.c
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/clk.h>
22 #include <linux/clocksource.h>
23 #include <linux/clockchips.h>
24 #include <linux/err.h>
25 #include <linux/interrupt.h>
26 #include <linux/irq.h>
29 #include <asm/hardware/arm_timer.h>
32 * These timers are currently always setup to be clocked at 1MHz.
34 #define TIMER_FREQ_KHZ (1000)
35 #define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ)
37 static long __init sp804_get_clock_rate(const char *name)
43 clk = clk_get_sys("sp804", name);
45 pr_err("sp804: %s clock not found: %d\n", name,
50 err = clk_enable(clk);
52 pr_err("sp804: %s clock failed to enable: %d\n", name, err);
57 rate = clk_get_rate(clk);
59 pr_err("sp804: %s clock failed to get rate: %ld\n", name, rate);
67 void __init sp804_clocksource_init(void __iomem *base, const char *name)
69 long rate = sp804_get_clock_rate(name);
74 /* setup timer 0 as free-running clocksource */
75 writel(0, base + TIMER_CTRL);
76 writel(0xffffffff, base + TIMER_LOAD);
77 writel(0xffffffff, base + TIMER_VALUE);
78 writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
81 clocksource_mmio_init(base + TIMER_VALUE, name,
82 rate, 200, 32, clocksource_mmio_readl_down);
86 static void __iomem *clkevt_base;
89 * IRQ handler for the timer
91 static irqreturn_t sp804_timer_interrupt(int irq, void *dev_id)
93 struct clock_event_device *evt = dev_id;
95 /* clear the interrupt */
96 writel(1, clkevt_base + TIMER_INTCLR);
98 evt->event_handler(evt);
103 static void sp804_set_mode(enum clock_event_mode mode,
104 struct clock_event_device *evt)
106 unsigned long ctrl = TIMER_CTRL_32BIT | TIMER_CTRL_IE;
108 writel(ctrl, clkevt_base + TIMER_CTRL);
111 case CLOCK_EVT_MODE_PERIODIC:
112 writel(TIMER_RELOAD, clkevt_base + TIMER_LOAD);
113 ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
116 case CLOCK_EVT_MODE_ONESHOT:
117 /* period set, and timer enabled in 'next_event' hook */
118 ctrl |= TIMER_CTRL_ONESHOT;
121 case CLOCK_EVT_MODE_UNUSED:
122 case CLOCK_EVT_MODE_SHUTDOWN:
127 writel(ctrl, clkevt_base + TIMER_CTRL);
130 static int sp804_set_next_event(unsigned long next,
131 struct clock_event_device *evt)
133 unsigned long ctrl = readl(clkevt_base + TIMER_CTRL);
135 writel(next, clkevt_base + TIMER_LOAD);
136 writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
141 static struct clock_event_device sp804_clockevent = {
144 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
145 .set_mode = sp804_set_mode,
146 .set_next_event = sp804_set_next_event,
148 .cpumask = cpu_all_mask,
151 static struct irqaction sp804_timer_irq = {
153 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
154 .handler = sp804_timer_interrupt,
155 .dev_id = &sp804_clockevent,
158 void __init sp804_clockevents_init(void __iomem *base, unsigned int timer_irq)
160 struct clock_event_device *evt = &sp804_clockevent;
164 evt->irq = timer_irq;
165 evt->mult = div_sc(TIMER_FREQ_KHZ, NSEC_PER_MSEC, evt->shift);
166 evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt);
167 evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
169 setup_irq(timer_irq, &sp804_timer_irq);
170 clockevents_register_device(evt);