2 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
5 #include <dt-bindings/gpio/gpio.h>
6 #include "skeleton.dtsi"
13 reg = <0x00000000 0x04000000>,
14 <0x08000000 0x04000000>;
18 compatible = "arm,l210-cache";
19 reg = <0x10210000 0x1000>;
20 interrupt-parent = <&vica>;
27 /* Nomadik system timer */
28 compatible = "st,nomadik-mtu";
29 reg = <0x101e2000 0x1000>;
30 interrupt-parent = <&vica>;
32 clocks = <&timclk>, <&pclk>;
33 clock-names = "timclk", "apb_pclk";
38 reg = <0x101e3000 0x1000>;
39 interrupt-parent = <&vica>;
41 clocks = <&timclk>, <&pclk>;
42 clock-names = "timclk", "apb_pclk";
45 gpio0: gpio@101e4000 {
46 compatible = "st,nomadik-gpio";
47 reg = <0x101e4000 0x80>;
48 interrupt-parent = <&vica>;
51 #interrupt-cells = <2>;
55 gpio-ranges = <&pinctrl 0 0 32>;
59 gpio1: gpio@101e5000 {
60 compatible = "st,nomadik-gpio";
61 reg = <0x101e5000 0x80>;
62 interrupt-parent = <&vica>;
65 #interrupt-cells = <2>;
69 gpio-ranges = <&pinctrl 0 32 32>;
73 gpio2: gpio@101e6000 {
74 compatible = "st,nomadik-gpio";
75 reg = <0x101e6000 0x80>;
76 interrupt-parent = <&vica>;
79 #interrupt-cells = <2>;
83 gpio-ranges = <&pinctrl 0 64 32>;
87 gpio3: gpio@101e7000 {
88 compatible = "st,nomadik-gpio";
89 reg = <0x101e7000 0x80>;
91 interrupt-parent = <&vica>;
94 #interrupt-cells = <2>;
98 gpio-ranges = <&pinctrl 0 96 28>;
103 compatible = "stericsson,stn8815-pinctrl";
104 nomadik-gpio-chips = <&gpio0>, <&gpio1>, <&gpio2>, <&gpio3>;
105 /* Pin configurations */
107 uart0_default_mux: uart0_mux {
115 uart1_default_mux: uart1_mux {
123 mmcsd_default_mux: mmcsd_mux {
126 groups = "mmcsd_a_1", "mmcsd_b_1";
129 mmcsd_default_mode: mmcsd_default {
136 /* MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2 */
137 pins = "GPIO10_C11", "GPIO15_A12",
138 "GPIO16_C13", "GPIO23_D15";
142 /* MCCMD, MCDAT3-0, MCMSFBCLK */
143 pins = "GPIO9_A10", "GPIO11_B11",
144 "GPIO12_A11", "GPIO13_C12",
145 "GPIO14_B12", "GPIO24_C15";
151 i2c0_default_mux: i2c0_mux {
157 i2c0_default_mode: i2c0_default {
159 pins = "GPIO62_D3", "GPIO63_D2";
165 i2c1_default_mux: i2c1_mux {
171 i2c1_default_mode: i2c1_default {
173 pins = "GPIO53_L4", "GPIO54_L3";
181 compatible = "stericsson,nomadik-src";
182 reg = <0x101e0000 0x1000>;
185 * MXTAL "Main Chrystal" is a chrystal oscillator @19.2 MHz
186 * that is parent of TIMCLK, PLL1 and PLL2
190 compatible = "fixed-clock";
191 clock-frequency = <19200000>;
195 * The 2.4 MHz TIMCLK reference clock is active at
196 * boot time, this is actually the MXTALCLK @19.2 MHz
197 * divided by 8. This clock is used by the timers and
198 * watchdog. See page 105 ff.
200 timclk: timclk@2.4M {
202 compatible = "fixed-factor-clock";
208 /* PLL1 is locked to MXTALI and variable from 20.4 to 334 MHz */
211 compatible = "st,nomadik-pll-clock";
216 /* HCLK divides the PLL1 with 1,2,3 or 4 */
219 compatible = "st,nomadik-hclk-clock";
222 /* The PCLK domain uses HCLK right off */
225 compatible = "fixed-factor-clock";
231 /* PLL2 is usually 864 MHz and divided into a few fixed rates */
234 compatible = "st,nomadik-pll-clock";
238 clk216: clk216@216M {
240 compatible = "fixed-factor-clock";
245 clk108: clk108@108M {
247 compatible = "fixed-factor-clock";
254 compatible = "fixed-factor-clock";
255 /* The data sheet does not say how this is derived */
262 compatible = "fixed-factor-clock";
263 /* The data sheet does not say how this is derived */
270 compatible = "fixed-factor-clock";
276 /* This apparently exists as well */
277 ulpiclk: ulpiclk@60M {
279 compatible = "fixed-clock";
280 clock-frequency = <60000000>;
284 * IP AMBA bus clocks, driving the bus side of the
285 * peripheral clocking, clock gates.
288 hclkdma0: hclkdma0@48M {
290 compatible = "st,nomadik-src-clock";
294 hclksmc: hclksmc@48M {
296 compatible = "st,nomadik-src-clock";
300 hclksdram: hclksdram@48M {
302 compatible = "st,nomadik-src-clock";
306 hclkdma1: hclkdma1@48M {
308 compatible = "st,nomadik-src-clock";
312 hclkclcd: hclkclcd@48M {
314 compatible = "st,nomadik-src-clock";
318 pclkirda: pclkirda@48M {
320 compatible = "st,nomadik-src-clock";
324 pclkssp: pclkssp@48M {
326 compatible = "st,nomadik-src-clock";
330 pclkuart0: pclkuart0@48M {
332 compatible = "st,nomadik-src-clock";
336 pclksdi: pclksdi@48M {
338 compatible = "st,nomadik-src-clock";
342 pclki2c0: pclki2c0@48M {
344 compatible = "st,nomadik-src-clock";
348 pclki2c1: pclki2c1@48M {
350 compatible = "st,nomadik-src-clock";
354 pclkuart1: pclkuart1@48M {
356 compatible = "st,nomadik-src-clock";
360 pclkmsp0: pclkmsp0@48M {
362 compatible = "st,nomadik-src-clock";
366 hclkusb: hclkusb@48M {
368 compatible = "st,nomadik-src-clock";
372 hclkdif: hclkdif@48M {
374 compatible = "st,nomadik-src-clock";
378 hclksaa: hclksaa@48M {
380 compatible = "st,nomadik-src-clock";
384 hclksva: hclksva@48M {
386 compatible = "st,nomadik-src-clock";
390 pclkhsi: pclkhsi@48M {
392 compatible = "st,nomadik-src-clock";
396 pclkxti: pclkxti@48M {
398 compatible = "st,nomadik-src-clock";
402 pclkuart2: pclkuart2@48M {
404 compatible = "st,nomadik-src-clock";
408 pclkmsp1: pclkmsp1@48M {
410 compatible = "st,nomadik-src-clock";
414 pclkmsp2: pclkmsp2@48M {
416 compatible = "st,nomadik-src-clock";
420 pclkowm: pclkowm@48M {
422 compatible = "st,nomadik-src-clock";
426 hclkhpi: hclkhpi@48M {
428 compatible = "st,nomadik-src-clock";
432 pclkske: pclkske@48M {
434 compatible = "st,nomadik-src-clock";
438 pclkhsem: pclkhsem@48M {
440 compatible = "st,nomadik-src-clock";
446 compatible = "st,nomadik-src-clock";
450 hclkhash: hclkhash@48M {
452 compatible = "st,nomadik-src-clock";
456 hclkcryp: hclkcryp@48M {
458 compatible = "st,nomadik-src-clock";
462 pclkmshc: pclkmshc@48M {
464 compatible = "st,nomadik-src-clock";
468 hclkusbm: hclkusbm@48M {
470 compatible = "st,nomadik-src-clock";
474 hclkrng: hclkrng@48M {
476 compatible = "st,nomadik-src-clock";
481 /* IP kernel clocks */
484 compatible = "st,nomadik-src-clock";
486 clocks = <&clk72 &clk48>;
488 irdaclk: irdaclk@48M {
490 compatible = "st,nomadik-src-clock";
494 sspiclk: sspiclk@48M {
496 compatible = "st,nomadik-src-clock";
500 uart0clk: uart0clk@48M {
502 compatible = "st,nomadik-src-clock";
507 /* Also called MCCLK in some documents */
509 compatible = "st,nomadik-src-clock";
513 i2c0clk: i2c0clk@48M {
515 compatible = "st,nomadik-src-clock";
519 i2c1clk: i2c1clk@48M {
521 compatible = "st,nomadik-src-clock";
525 uart1clk: uart1clk@48M {
527 compatible = "st,nomadik-src-clock";
531 mspclk0: mspclk0@48M {
533 compatible = "st,nomadik-src-clock";
539 compatible = "st,nomadik-src-clock";
541 clocks = <&clk48>; /* 48 MHz not ULPI */
545 compatible = "st,nomadik-src-clock";
549 ipi2cclk: ipi2cclk@48M {
551 compatible = "st,nomadik-src-clock";
553 clocks = <&clk48>; /* Guess */
555 ipbmcclk: ipbmcclk@48M {
557 compatible = "st,nomadik-src-clock";
559 clocks = <&clk48>; /* Guess */
561 hsiclkrx: hsiclkrx@216M {
563 compatible = "st,nomadik-src-clock";
567 hsiclktx: hsiclktx@108M {
569 compatible = "st,nomadik-src-clock";
573 uart2clk: uart2clk@48M {
575 compatible = "st,nomadik-src-clock";
579 mspclk1: mspclk1@48M {
581 compatible = "st,nomadik-src-clock";
585 mspclk2: mspclk2@48M {
587 compatible = "st,nomadik-src-clock";
593 compatible = "st,nomadik-src-clock";
595 clocks = <&clk48>; /* Guess */
599 compatible = "st,nomadik-src-clock";
601 clocks = <&clk48>; /* Guess */
605 compatible = "st,nomadik-src-clock";
607 clocks = <&clk48>; /* Guess */
609 pclkmsp3: pclkmsp3@48M {
611 compatible = "st,nomadik-src-clock";
615 mspclk3: mspclk3@48M {
617 compatible = "st,nomadik-src-clock";
621 mshcclk: mshcclk@48M {
623 compatible = "st,nomadik-src-clock";
625 clocks = <&clk48>; /* Guess */
627 usbmclk: usbmclk@48M {
629 compatible = "st,nomadik-src-clock";
631 /* Stated as "48 MHz not ULPI clock" */
634 rngcclk: rngcclk@48M {
636 compatible = "st,nomadik-src-clock";
638 clocks = <&clk48>; /* Guess */
642 /* A NAND flash of 128 MiB */
643 fsmc: flash@40000000 {
644 compatible = "stericsson,fsmc-nand";
645 #address-cells = <1>;
647 reg = <0x10100000 0x1000>, /* FSMC Register*/
648 <0x40000000 0x2000>, /* NAND Base DATA */
649 <0x41000000 0x2000>, /* NAND Base ADDR */
650 <0x40800000 0x2000>; /* NAND Base CMD */
651 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
654 timings = /bits/ 8 <0 0 0 0x10 0x0a 0>;
657 label = "X-Loader(NAND)";
661 label = "MemInit(NAND)";
662 reg = <0x40000 0x40000>;
665 label = "BootLoader(NAND)";
666 reg = <0x80000 0x200000>;
669 label = "Kernel zImage(NAND)";
670 reg = <0x280000 0x300000>;
673 label = "Root Filesystem(NAND)";
674 reg = <0x580000 0x1600000>;
677 label = "User Filesystem(NAND)";
678 reg = <0x1b80000 0x6480000>;
682 /* I2C0 connected to the STw4811 power management chip */
684 compatible = "st,nomadik-i2c", "arm,primecell";
685 reg = <0x101f8000 0x1000>;
686 interrupt-parent = <&vica>;
688 clock-frequency = <100000>;
689 #address-cells = <1>;
691 clocks = <&i2c0clk>, <&pclki2c0>;
692 clock-names = "mclk", "apb_pclk";
693 pinctrl-names = "default";
694 pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
697 compatible = "st,stw4811";
699 vmmc_regulator: vmmc {
700 compatible = "st,stw481x-vmmc";
701 regulator-name = "VMMC";
702 regulator-min-microvolt = <1800000>;
703 regulator-max-microvolt = <3300000>;
708 /* I2C1 connected to various sensors */
710 compatible = "st,nomadik-i2c", "arm,primecell";
711 reg = <0x101f7000 0x1000>;
712 interrupt-parent = <&vica>;
714 clock-frequency = <100000>;
715 #address-cells = <1>;
717 clocks = <&i2c1clk>, <&pclki2c1>;
718 clock-names = "mclk", "apb_pclk";
719 pinctrl-names = "default";
720 pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
723 compatible = "st,camera";
727 compatible = "st,stw5095";
732 compatible = "st,lis3lv02dl-accel";
738 compatible = "arm,amba-bus";
739 #address-cells = <1>;
743 vica: intc@10140000 {
744 compatible = "arm,versatile-vic";
745 interrupt-controller;
746 #interrupt-cells = <1>;
747 reg = <0x10140000 0x20>;
750 vicb: intc@10140020 {
751 compatible = "arm,versatile-vic";
752 interrupt-controller;
753 #interrupt-cells = <1>;
754 reg = <0x10140020 0x20>;
757 uart0: uart@101fd000 {
758 compatible = "arm,pl011", "arm,primecell";
759 reg = <0x101fd000 0x1000>;
760 interrupt-parent = <&vica>;
762 clocks = <&uart0clk>, <&pclkuart0>;
763 clock-names = "uartclk", "apb_pclk";
764 pinctrl-names = "default";
765 pinctrl-0 = <&uart0_default_mux>;
768 uart1: uart@101fb000 {
769 compatible = "arm,pl011", "arm,primecell";
770 reg = <0x101fb000 0x1000>;
771 interrupt-parent = <&vica>;
773 clocks = <&uart1clk>, <&pclkuart1>;
774 clock-names = "uartclk", "apb_pclk";
775 pinctrl-names = "default";
776 pinctrl-0 = <&uart1_default_mux>;
779 uart2: uart@101f2000 {
780 compatible = "arm,pl011", "arm,primecell";
781 reg = <0x101f2000 0x1000>;
782 interrupt-parent = <&vica>;
784 clocks = <&uart2clk>, <&pclkuart2>;
785 clock-names = "uartclk", "apb_pclk";
790 compatible = "arm,primecell";
791 reg = <0x101b0000 0x1000>;
792 clocks = <&rngcclk>, <&hclkrng>;
793 clock-names = "rng", "apb_pclk";
797 compatible = "arm,pl031", "arm,primecell";
798 reg = <0x101e8000 0x1000>;
800 clock-names = "apb_pclk";
801 interrupt-parent = <&vica>;
805 mmcsd: sdi@101f6000 {
806 compatible = "arm,pl18x", "arm,primecell";
807 reg = <0x101f6000 0x1000>;
808 clocks = <&sdiclk>, <&pclksdi>;
809 clock-names = "mclk", "apb_pclk";
810 interrupt-parent = <&vica>;
812 max-frequency = <48000000>;
816 pinctrl-names = "default";
817 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
818 vmmc-supply = <&vmmc_regulator>;