arch/arm/boot/dts/sama5d3.dtsi

   1 /*
   2  * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
   3  *                applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
   4  *
   5  *  Copyright (C) 2013 Atmel,
   6  *                2013 Ludovic Desroches <ludovic.desroches@atmel.com>
   7  *
   8  * Licensed under GPLv2 or later.
   9  */
  10
  11 #include "skeleton.dtsi"
  12 #include <dt-bindings/dma/at91.h>
  13 #include <dt-bindings/pinctrl/at91.h>
  14 #include <dt-bindings/interrupt-controller/irq.h>
  15 #include <dt-bindings/gpio/gpio.h>
  16 #include <dt-bindings/clk/at91.h>
  17
  18 / {
  19         model = "Atmel SAMA5D3 family SoC";
  20         compatible = "atmel,sama5d3", "atmel,sama5";
  21         interrupt-parent = <&aic>;
  22
  23         aliases {
  24                 serial0 = &dbgu;
  25                 serial1 = &usart0;
  26                 serial2 = &usart1;
  27                 serial3 = &usart2;
  28                 serial4 = &usart3;
  29                 gpio0 = &pioA;
  30                 gpio1 = &pioB;
  31                 gpio2 = &pioC;
  32                 gpio3 = &pioD;
  33                 gpio4 = &pioE;
  34                 tcb0 = &tcb0;
  35                 i2c0 = &i2c0;
  36                 i2c1 = &i2c1;
  37                 i2c2 = &i2c2;
  38                 ssc0 = &ssc0;
  39                 ssc1 = &ssc1;
  40                 pwm0 = &pwm0;
  41         };
  42         cpus {
  43                 #address-cells = <1>;
  44                 #size-cells = <0>;
  45                 cpu@0 {
  46                         device_type = "cpu";
  47                         compatible = "arm,cortex-a5";
  48                         reg = <0x0>;
  49                 };
  50         };
  51
  52         pmu {
  53                 compatible = "arm,cortex-a5-pmu";
  54                 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
  55         };
  56
  57         memory {
  58                 reg = <0x20000000 0x8000000>;
  59         };
  60
  61         slow_xtal: slow_xtal {
  62                 compatible = "fixed-clock";
  63                 #clock-cells = <0>;
  64                 clock-frequency = <0>;
  65         };
  66
  67         main_xtal: main_xtal {
  68                 compatible = "fixed-clock";
  69                 #clock-cells = <0>;
  70                 clock-frequency = <0>;
  71         };
  72
  73         clocks {
  74                 adc_op_clk: adc_op_clk{
  75                         compatible = "fixed-clock";
  76                         #clock-cells = <0>;
  77                         clock-frequency = <20000000>;
  78                 };
  79         };
  80
  81         ahb {
  82                 compatible = "simple-bus";
  83                 #address-cells = <1>;
  84                 #size-cells = <1>;
  85                 ranges;
  86
  87                 apb {
  88                         compatible = "simple-bus";
  89                         #address-cells = <1>;
  90                         #size-cells = <1>;
  91                         ranges;
  92
  93                         mmc0: mmc@f0000000 {
  94                                 compatible = "atmel,hsmci";
  95                                 reg = <0xf0000000 0x600>;
  96                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
  97                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
  98                                 dma-names = "rxtx";
  99                                 pinctrl-names = "default";
 100                                 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
 101                                 status = "disabled";
 102                                 #address-cells = <1>;
 103                                 #size-cells = <0>;
 104                                 clocks = <&mci0_clk>;
 105                                 clock-names = "mci_clk";
 106                         };
 107
 108                         spi0: spi@f0004000 {
 109                                 #address-cells = <1>;
 110                                 #size-cells = <0>;
 111                                 compatible = "atmel,at91rm9200-spi";
 112                                 reg = <0xf0004000 0x100>;
 113                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
 114                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
 115                                        <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
 116                                 dma-names = "tx", "rx";
 117                                 pinctrl-names = "default";
 118                                 pinctrl-0 = <&pinctrl_spi0>;
 119                                 clocks = <&spi0_clk>;
 120                                 clock-names = "spi_clk";
 121                                 status = "disabled";
 122                         };
 123
 124                         ssc0: ssc@f0008000 {
 125                                 compatible = "atmel,at91sam9g45-ssc";
 126                                 reg = <0xf0008000 0x4000>;
 127                                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
 128                                 pinctrl-names = "default";
 129                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 130                                 clocks = <&ssc0_clk>;
 131                                 clock-names = "pclk";
 132                                 status = "disabled";
 133                         };
 134
 135                         tcb0: timer@f0010000 {
 136                                 compatible = "atmel,at91sam9x5-tcb";
 137                                 reg = <0xf0010000 0x100>;
 138                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
 139                                 clocks = <&tcb0_clk>;
 140                                 clock-names = "t0_clk";
 141                         };
 142
 143                         i2c0: i2c@f0014000 {
 144                                 compatible = "atmel,at91sam9x5-i2c";
 145                                 reg = <0xf0014000 0x4000>;
 146                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
 147                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
 148                                        <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
 149                                 dma-names = "tx", "rx";
 150                                 pinctrl-names = "default";
 151                                 pinctrl-0 = <&pinctrl_i2c0>;
 152                                 #address-cells = <1>;
 153                                 #size-cells = <0>;
 154                                 clocks = <&twi0_clk>;
 155                                 status = "disabled";
 156                         };
 157
 158                         i2c1: i2c@f0018000 {
 159                                 compatible = "atmel,at91sam9x5-i2c";
 160                                 reg = <0xf0018000 0x4000>;
 161                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
 162                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
 163                                        <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
 164                                 dma-names = "tx", "rx";
 165                                 pinctrl-names = "default";
 166                                 pinctrl-0 = <&pinctrl_i2c1>;
 167                                 #address-cells = <1>;
 168                                 #size-cells = <0>;
 169                                 clocks = <&twi1_clk>;
 170                                 status = "disabled";
 171                         };
 172
 173                         usart0: serial@f001c000 {
 174                                 compatible = "atmel,at91sam9260-usart";
 175                                 reg = <0xf001c000 0x100>;
 176                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
 177                                 pinctrl-names = "default";
 178                                 pinctrl-0 = <&pinctrl_usart0>;
 179                                 clocks = <&usart0_clk>;
 180                                 clock-names = "usart";
 181                                 status = "disabled";
 182                         };
 183
 184                         usart1: serial@f0020000 {
 185                                 compatible = "atmel,at91sam9260-usart";
 186                                 reg = <0xf0020000 0x100>;
 187                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
 188                                 pinctrl-names = "default";
 189                                 pinctrl-0 = <&pinctrl_usart1>;
 190                                 clocks = <&usart1_clk>;
 191                                 clock-names = "usart";
 192                                 status = "disabled";
 193                         };
 194
 195                         pwm0: pwm@f002c000 {
 196                                 compatible = "atmel,sama5d3-pwm";
 197                                 reg = <0xf002c000 0x300>;
 198                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
 199                                 #pwm-cells = <3>;
 200                                 clocks = <&pwm_clk>;
 201                                 status = "disabled";
 202                         };
 203
 204                         isi: isi@f0034000 {
 205                                 compatible = "atmel,at91sam9g45-isi";
 206                                 reg = <0xf0034000 0x4000>;
 207                                 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
 208                                 status = "disabled";
 209                         };
 210
 211                         mmc1: mmc@f8000000 {
 212                                 compatible = "atmel,hsmci";
 213                                 reg = <0xf8000000 0x600>;
 214                                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
 215                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
 216                                 dma-names = "rxtx";
 217                                 pinctrl-names = "default";
 218                                 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
 219                                 status = "disabled";
 220                                 #address-cells = <1>;
 221                                 #size-cells = <0>;
 222                                 clocks = <&mci1_clk>;
 223                                 clock-names = "mci_clk";
 224                         };
 225
 226                         spi1: spi@f8008000 {
 227                                 #address-cells = <1>;
 228                                 #size-cells = <0>;
 229                                 compatible = "atmel,at91rm9200-spi";
 230                                 reg = <0xf8008000 0x100>;
 231                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
 232                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
 233                                        <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
 234                                 dma-names = "tx", "rx";
 235                                 pinctrl-names = "default";
 236                                 pinctrl-0 = <&pinctrl_spi1>;
 237                                 clocks = <&spi1_clk>;
 238                                 clock-names = "spi_clk";
 239                                 status = "disabled";
 240                         };
 241
 242                         ssc1: ssc@f800c000 {
 243                                 compatible = "atmel,at91sam9g45-ssc";
 244                                 reg = <0xf800c000 0x4000>;
 245                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
 246                                 pinctrl-names = "default";
 247                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
 248                                 clocks = <&ssc1_clk>;
 249                                 clock-names = "pclk";
 250                                 status = "disabled";
 251                         };
 252
 253                         adc0: adc@f8018000 {
 254                                 #address-cells = <1>;
 255                                 #size-cells = <0>;
 256                                 compatible = "atmel,at91sam9x5-adc";
 257                                 reg = <0xf8018000 0x100>;
 258                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
 259                                 pinctrl-names = "default";
 260                                 pinctrl-0 = <
 261                                         &pinctrl_adc0_adtrg
 262                                         &pinctrl_adc0_ad0
 263                                         &pinctrl_adc0_ad1
 264                                         &pinctrl_adc0_ad2
 265                                         &pinctrl_adc0_ad3
 266                                         &pinctrl_adc0_ad4
 267                                         &pinctrl_adc0_ad5
 268                                         &pinctrl_adc0_ad6
 269                                         &pinctrl_adc0_ad7
 270                                         &pinctrl_adc0_ad8
 271                                         &pinctrl_adc0_ad9
 272                                         &pinctrl_adc0_ad10
 273                                         &pinctrl_adc0_ad11
 274                                         >;
 275                                 clocks = <&adc_clk>,
 276                                          <&adc_op_clk>;
 277                                 clock-names = "adc_clk", "adc_op_clk";
 278                                 atmel,adc-channels-used = <0xfff>;
 279                                 atmel,adc-startup-time = <40>;
 280                                 atmel,adc-use-external-triggers;
 281                                 atmel,adc-vref = <3000>;
 282                                 atmel,adc-res = <10 12>;
 283                                 atmel,adc-res-names = "lowres", "highres";
 284                                 status = "disabled";
 285
 286                                 trigger@0 {
 287                                         reg = <0>;
 288                                         trigger-name = "external-rising";
 289                                         trigger-value = <0x1>;
 290                                         trigger-external;
 291                                 };
 292                                 trigger@1 {
 293                                         reg = <1>;
 294                                         trigger-name = "external-falling";
 295                                         trigger-value = <0x2>;
 296                                         trigger-external;
 297                                 };
 298                                 trigger@2 {
 299                                         reg = <2>;
 300                                         trigger-name = "external-any";
 301                                         trigger-value = <0x3>;
 302                                         trigger-external;
 303                                 };
 304                                 trigger@3 {
 305                                         reg = <3>;
 306                                         trigger-name = "continuous";
 307                                         trigger-value = <0x6>;
 308                                 };
 309                         };
 310
 311                         i2c2: i2c@f801c000 {
 312                                 compatible = "atmel,at91sam9x5-i2c";
 313                                 reg = <0xf801c000 0x4000>;
 314                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
 315                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
 316                                        <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
 317                                 dma-names = "tx", "rx";
 318                                 pinctrl-names = "default";
 319                                 pinctrl-0 = <&pinctrl_i2c2>;
 320                                 #address-cells = <1>;
 321                                 #size-cells = <0>;
 322                                 clocks = <&twi2_clk>;
 323                                 status = "disabled";
 324                         };
 325
 326                         usart2: serial@f8020000 {
 327                                 compatible = "atmel,at91sam9260-usart";
 328                                 reg = <0xf8020000 0x100>;
 329                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
 330                                 pinctrl-names = "default";
 331                                 pinctrl-0 = <&pinctrl_usart2>;
 332                                 clocks = <&usart2_clk>;
 333                                 clock-names = "usart";
 334                                 status = "disabled";
 335                         };
 336
 337                         usart3: serial@f8024000 {
 338                                 compatible = "atmel,at91sam9260-usart";
 339                                 reg = <0xf8024000 0x100>;
 340                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 341                                 pinctrl-names = "default";
 342                                 pinctrl-0 = <&pinctrl_usart3>;
 343                                 clocks = <&usart3_clk>;
 344                                 clock-names = "usart";
 345                                 status = "disabled";
 346                         };
 347
 348                         sha@f8034000 {
 349                                 compatible = "atmel,at91sam9g46-sha";
 350                                 reg = <0xf8034000 0x100>;
 351                                 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
 352                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
 353                                 dma-names = "tx";
 354                                 clocks = <&sha_clk>;
 355                                 clock-names = "sha_clk";
 356                         };
 357
 358                         aes@f8038000 {
 359                                 compatible = "atmel,at91sam9g46-aes";
 360                                 reg = <0xf8038000 0x100>;
 361                                 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
 362                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
 363                                        <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
 364                                 dma-names = "tx", "rx";
 365                                 clocks = <&aes_clk>;
 366                                 clock-names = "aes_clk";
 367                         };
 368
 369                         tdes@f803c000 {
 370                                 compatible = "atmel,at91sam9g46-tdes";
 371                                 reg = <0xf803c000 0x100>;
 372                                 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
 373                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
 374                                        <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
 375                                 dma-names = "tx", "rx";
 376                                 clocks = <&tdes_clk>;
 377                                 clock-names = "tdes_clk";
 378                         };
 379
 380                         dma0: dma-controller@ffffe600 {
 381                                 compatible = "atmel,at91sam9g45-dma";
 382                                 reg = <0xffffe600 0x200>;
 383                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
 384                                 #dma-cells = <2>;
 385                                 clocks = <&dma0_clk>;
 386                                 clock-names = "dma_clk";
 387                         };
 388
 389                         dma1: dma-controller@ffffe800 {
 390                                 compatible = "atmel,at91sam9g45-dma";
 391                                 reg = <0xffffe800 0x200>;
 392                                 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
 393                                 #dma-cells = <2>;
 394                                 clocks = <&dma1_clk>;
 395                                 clock-names = "dma_clk";
 396                         };
 397
 398                         ramc0: ramc@ffffea00 {
 399                                 compatible = "atmel,at91sam9g45-ddramc";
 400                                 reg = <0xffffea00 0x200>;
 401                         };
 402
 403                         dbgu: serial@ffffee00 {
 404                                 compatible = "atmel,at91sam9260-usart";
 405                                 reg = <0xffffee00 0x200>;
 406                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
 407                                 pinctrl-names = "default";
 408                                 pinctrl-0 = <&pinctrl_dbgu>;
 409                                 clocks = <&dbgu_clk>;
 410                                 clock-names = "usart";
 411                                 status = "disabled";
 412                         };
 413
 414                         aic: interrupt-controller@fffff000 {
 415                                 #interrupt-cells = <3>;
 416                                 compatible = "atmel,sama5d3-aic";
 417                                 interrupt-controller;
 418                                 reg = <0xfffff000 0x200>;
 419                                 atmel,external-irqs = <47>;
 420                         };
 421
 422                         pinctrl@fffff200 {
 423                                 #address-cells = <1>;
 424                                 #size-cells = <1>;
 425                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 426                                 ranges = <0xfffff200 0xfffff200 0xa00>;
 427                                 atmel,mux-mask = <
 428                                         /*   A          B          C  */
 429                                         0xffffffff 0xc0fc0000 0xc0ff0000        /* pioA */
 430                                         0xffffffff 0x0ff8ffff 0x00000000        /* pioB */
 431                                         0xffffffff 0xbc00f1ff 0x7c00fc00        /* pioC */
 432                                         0xffffffff 0xc001c0e0 0x0001c1e0        /* pioD */
 433                                         0xffffffff 0xbf9f8000 0x18000000        /* pioE */
 434                                         >;
 435
 436                                 /* shared pinctrl settings */
 437                                 adc0 {
 438                                         pinctrl_adc0_adtrg: adc0_adtrg {
 439                                                 atmel,pins =
 440                                                         <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
 441                                         };
 442                                         pinctrl_adc0_ad0: adc0_ad0 {
 443                                                 atmel,pins =
 444                                                         <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
 445                                         };
 446                                         pinctrl_adc0_ad1: adc0_ad1 {
 447                                                 atmel,pins =
 448                                                         <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
 449                                         };
 450                                         pinctrl_adc0_ad2: adc0_ad2 {
 451                                                 atmel,pins =
 452                                                         <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
 453                                         };
 454                                         pinctrl_adc0_ad3: adc0_ad3 {
 455                                                 atmel,pins =
 456                                                         <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
 457                                         };
 458                                         pinctrl_adc0_ad4: adc0_ad4 {
 459                                                 atmel,pins =
 460                                                         <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
 461                                         };
 462                                         pinctrl_adc0_ad5: adc0_ad5 {
 463                                                 atmel,pins =
 464                                                         <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
 465                                         };
 466                                         pinctrl_adc0_ad6: adc0_ad6 {
 467                                                 atmel,pins =
 468                                                         <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
 469                                         };
 470                                         pinctrl_adc0_ad7: adc0_ad7 {
 471                                                 atmel,pins =
 472                                                         <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
 473                                         };
 474                                         pinctrl_adc0_ad8: adc0_ad8 {
 475                                                 atmel,pins =
 476                                                         <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
 477                                         };
 478                                         pinctrl_adc0_ad9: adc0_ad9 {
 479                                                 atmel,pins =
 480                                                         <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
 481                                         };
 482                                         pinctrl_adc0_ad10: adc0_ad10 {
 483                                                 atmel,pins =
 484                                                         <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
 485                                         };
 486                                         pinctrl_adc0_ad11: adc0_ad11 {
 487                                                 atmel,pins =
 488                                                         <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
 489                                         };
 490                                 };
 491
 492                                 dbgu {
 493                                         pinctrl_dbgu: dbgu-0 {
 494                                                 atmel,pins =
 495                                                         <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB30 periph A */
 496                                                          AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB31 periph A with pullup */
 497                                         };
 498                                 };
 499
 500                                 i2c0 {
 501                                         pinctrl_i2c0: i2c0-0 {
 502                                                 atmel,pins =
 503                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
 504                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
 505                                         };
 506                                 };
 507
 508                                 i2c1 {
 509                                         pinctrl_i2c1: i2c1-0 {
 510                                                 atmel,pins =
 511                                                         <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
 512                                                          AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
 513                                         };
 514                                 };
 515
 516                                 i2c2 {
 517                                         pinctrl_i2c2: i2c2-0 {
 518                                                 atmel,pins =
 519                                                         <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
 520                                                          AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
 521                                         };
 522                                 };
 523
 524                                 isi {
 525                                         pinctrl_isi: isi-0 {
 526                                                 atmel,pins =
 527                                                         <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
 528                                                          AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
 529                                                          AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
 530                                                          AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
 531                                                          AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
 532                                                          AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
 533                                                          AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
 534                                                          AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
 535                                                          AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
 536                                                          AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
 537                                                          AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
 538                                                          AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
 539                                                          AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
 540                                         };
 541                                         pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
 542                                                 atmel,pins =
 543                                                         <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
 544                                         };
 545                                 };
 546
 547                                 mmc0 {
 548                                         pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
 549                                                 atmel,pins =
 550                                                         <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD9 periph A MCI0_CK */
 551                                                          AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
 552                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD1 periph A MCI0_DA0 with pullup */
 553                                         };
 554                                         pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
 555                                                 atmel,pins =
 556                                                         <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
 557                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
 558                                                          AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD4 periph A MCI0_DA3 with pullup */
 559                                         };
 560                                         pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
 561                                                 atmel,pins =
 562                                                         <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
 563                                                          AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
 564                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
 565                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
 566                                         };
 567                                 };
 568
 569                                 mmc1 {
 570                                         pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
 571                                                 atmel,pins =
 572                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB24 periph A MCI1_CK, conflicts with GRX5 */
 573                                                          AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
 574                                                          AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
 575                                         };
 576                                         pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
 577                                                 atmel,pins =
 578                                                         <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
 579                                                          AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
 580                                                          AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
 581                                         };
 582                                 };
 583
 584                                 nand0 {
 585                                         pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
 586                                                 atmel,pins =
 587                                                         <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PE21 periph A with pullup */
 588                                                          AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PE22 periph A with pullup */
 589                                         };
 590                                 };
 591
 592                                 spi0 {
 593                                         pinctrl_spi0: spi0-0 {
 594                                                 atmel,pins =
 595                                                         <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A SPI0_MISO pin */
 596                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A SPI0_MOSI pin */
 597                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
 598                                         };
 599                                 };
 600
 601                                 spi1 {
 602                                         pinctrl_spi1: spi1-0 {
 603                                                 atmel,pins =
 604                                                         <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC22 periph A SPI1_MISO pin */
 605                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC23 periph A SPI1_MOSI pin */
 606                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
 607                                         };
 608                                 };
 609
 610                                 ssc0 {
 611                                         pinctrl_ssc0_tx: ssc0_tx {
 612                                                 atmel,pins =
 613                                                         <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC16 periph A TK0 */
 614                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC17 periph A TF0 */
 615                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
 616                                         };
 617
 618                                         pinctrl_ssc0_rx: ssc0_rx {
 619                                                 atmel,pins =
 620                                                         <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC19 periph A RK0 */
 621                                                          AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC20 periph A RF0 */
 622                                                          AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
 623                                         };
 624                                 };
 625
 626                                 ssc1 {
 627                                         pinctrl_ssc1_tx: ssc1_tx {
 628                                                 atmel,pins =
 629                                                         <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB2 periph B TK1, conflicts with GTX2 */
 630                                                          AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB3 periph B TF1, conflicts with GTX3 */
 631                                                          AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB6 periph B TD1, conflicts with TD1 */
 632                                         };
 633
 634                                         pinctrl_ssc1_rx: ssc1_rx {
 635                                                 atmel,pins =
 636                                                         <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB7 periph B RK1, conflicts with EREFCK */
 637                                                          AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB10 periph B RF1, conflicts with GTXER */
 638                                                          AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
 639                                         };
 640                                 };
 641
 642                                 usart0 {
 643                                         pinctrl_usart0: usart0-0 {
 644                                                 atmel,pins =
 645                                                         <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD17 periph A */
 646                                                          AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PD18 periph A with pullup */
 647                                         };
 648
 649                                         pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
 650                                                 atmel,pins =
 651                                                         <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
 652                                                          AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
 653                                         };
 654                                 };
 655
 656                                 usart1 {
 657                                         pinctrl_usart1: usart1-0 {
 658                                                 atmel,pins =
 659                                                         <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB28 periph A */
 660                                                          AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB29 periph A with pullup */
 661                                         };
 662
 663                                         pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
 664                                                 atmel,pins =
 665                                                         <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB26 periph A, conflicts with GRX7 */
 666                                                          AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
 667                                         };
 668                                 };
 669
 670                                 usart2 {
 671                                         pinctrl_usart2: usart2-0 {
 672                                                 atmel,pins =
 673                                                         <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE25 periph B, conflicts with A25 */
 674                                                          AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PE26 periph B with pullup, conflicts NCS0 */
 675                                         };
 676
 677                                         pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
 678                                                 atmel,pins =
 679                                                         <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE23 periph B, conflicts with A23 */
 680                                                          AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
 681                                         };
 682                                 };
 683
 684                                 usart3 {
 685                                         pinctrl_usart3: usart3-0 {
 686                                                 atmel,pins =
 687                                                         <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE18 periph B, conflicts with A18 */
 688                                                          AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PE19 periph B with pullup, conflicts with A19 */
 689                                         };
 690
 691                                         pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
 692                                                 atmel,pins =
 693                                                         <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE16 periph B, conflicts with A16 */
 694                                                          AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
 695                                         };
 696                                 };
 697
 698
 699                                 pioA: gpio@fffff200 {
 700                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 701                                         reg = <0xfffff200 0x100>;
 702                                         interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
 703                                         #gpio-cells = <2>;
 704                                         gpio-controller;
 705                                         interrupt-controller;
 706                                         #interrupt-cells = <2>;
 707                                         clocks = <&pioA_clk>;
 708                                 };
 709
 710                                 pioB: gpio@fffff400 {
 711                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 712                                         reg = <0xfffff400 0x100>;
 713                                         interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
 714                                         #gpio-cells = <2>;
 715                                         gpio-controller;
 716                                         interrupt-controller;
 717                                         #interrupt-cells = <2>;
 718                                         clocks = <&pioB_clk>;
 719                                 };
 720
 721                                 pioC: gpio@fffff600 {
 722                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 723                                         reg = <0xfffff600 0x100>;
 724                                         interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
 725                                         #gpio-cells = <2>;
 726                                         gpio-controller;
 727                                         interrupt-controller;
 728                                         #interrupt-cells = <2>;
 729                                         clocks = <&pioC_clk>;
 730                                 };
 731
 732                                 pioD: gpio@fffff800 {
 733                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 734                                         reg = <0xfffff800 0x100>;
 735                                         interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
 736                                         #gpio-cells = <2>;
 737                                         gpio-controller;
 738                                         interrupt-controller;
 739                                         #interrupt-cells = <2>;
 740                                         clocks = <&pioD_clk>;
 741                                 };
 742
 743                                 pioE: gpio@fffffa00 {
 744                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 745                                         reg = <0xfffffa00 0x100>;
 746                                         interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
 747                                         #gpio-cells = <2>;
 748                                         gpio-controller;
 749                                         interrupt-controller;
 750                                         #interrupt-cells = <2>;
 751                                         clocks = <&pioE_clk>;
 752                                 };
 753                         };
 754
 755                         pmc: pmc@fffffc00 {
 756                                 compatible = "atmel,sama5d3-pmc";
 757                                 reg = <0xfffffc00 0x120>;
 758                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 759                                 interrupt-controller;
 760                                 #address-cells = <1>;
 761                                 #size-cells = <0>;
 762                                 #interrupt-cells = <1>;
 763
 764                                 main_rc_osc: main_rc_osc {
 765                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
 766                                         #clock-cells = <0>;
 767                                         interrupt-parent = <&pmc>;
 768                                         interrupts = <AT91_PMC_MOSCRCS>;
 769                                         clock-frequency = <12000000>;
 770                                         clock-accuracy = <50000000>;
 771                                 };
 772
 773                                 main_osc: main_osc {
 774                                         compatible = "atmel,at91rm9200-clk-main-osc";
 775                                         #clock-cells = <0>;
 776                                         interrupt-parent = <&pmc>;
 777                                         interrupts = <AT91_PMC_MOSCS>;
 778                                         clocks = <&main_xtal>;
 779                                 };
 780
 781                                 main: mainck {
 782                                         compatible = "atmel,at91sam9x5-clk-main";
 783                                         #clock-cells = <0>;
 784                                         interrupt-parent = <&pmc>;
 785                                         interrupts = <AT91_PMC_MOSCSELS>;
 786                                         clocks = <&main_rc_osc &main_osc>;
 787                                 };
 788
 789                                 plla: pllack {
 790                                         compatible = "atmel,sama5d3-clk-pll";
 791                                         #clock-cells = <0>;
 792                                         interrupt-parent = <&pmc>;
 793                                         interrupts = <AT91_PMC_LOCKA>;
 794                                         clocks = <&main>;
 795                                         reg = <0>;
 796                                         atmel,clk-input-range = <8000000 50000000>;
 797                                         #atmel,pll-clk-output-range-cells = <4>;
 798                                         atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
 799                                 };
 800
 801                                 plladiv: plladivck {
 802                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 803                                         #clock-cells = <0>;
 804                                         clocks = <&plla>;
 805                                 };
 806
 807                                 utmi: utmick {
 808                                         compatible = "atmel,at91sam9x5-clk-utmi";
 809                                         #clock-cells = <0>;
 810                                         interrupt-parent = <&pmc>;
 811                                         interrupts = <AT91_PMC_LOCKU>;
 812                                         clocks = <&main>;
 813                                 };
 814
 815                                 mck: masterck {
 816                                         compatible = "atmel,at91sam9x5-clk-master";
 817                                         #clock-cells = <0>;
 818                                         interrupt-parent = <&pmc>;
 819                                         interrupts = <AT91_PMC_MCKRDY>;
 820                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 821                                         atmel,clk-output-range = <0 166000000>;
 822                                         atmel,clk-divisors = <1 2 4 3>;
 823                                 };
 824
 825                                 usb: usbck {
 826                                         compatible = "atmel,at91sam9x5-clk-usb";
 827                                         #clock-cells = <0>;
 828                                         clocks = <&plladiv>, <&utmi>;
 829                                 };
 830
 831                                 prog: progck {
 832                                         compatible = "atmel,at91sam9x5-clk-programmable";
 833                                         #address-cells = <1>;
 834                                         #size-cells = <0>;
 835                                         interrupt-parent = <&pmc>;
 836                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 837
 838                                         prog0: prog0 {
 839                                                 #clock-cells = <0>;
 840                                                 reg = <0>;
 841                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 842                                         };
 843
 844                                         prog1: prog1 {
 845                                                 #clock-cells = <0>;
 846                                                 reg = <1>;
 847                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 848                                         };
 849
 850                                         prog2: prog2 {
 851                                                 #clock-cells = <0>;
 852                                                 reg = <2>;
 853                                                 interrupts = <AT91_PMC_PCKRDY(2)>;
 854                                         };
 855                                 };
 856
 857                                 smd: smdclk {
 858                                         compatible = "atmel,at91sam9x5-clk-smd";
 859                                         #clock-cells = <0>;
 860                                         clocks = <&plladiv>, <&utmi>;
 861                                 };
 862
 863                                 systemck {
 864                                         compatible = "atmel,at91rm9200-clk-system";
 865                                         #address-cells = <1>;
 866                                         #size-cells = <0>;
 867
 868                                         ddrck: ddrck {
 869                                                 #clock-cells = <0>;
 870                                                 reg = <2>;
 871                                                 clocks = <&mck>;
 872                                         };
 873
 874                                         smdck: smdck {
 875                                                 #clock-cells = <0>;
 876                                                 reg = <4>;
 877                                                 clocks = <&smd>;
 878                                         };
 879
 880                                         uhpck: uhpck {
 881                                                 #clock-cells = <0>;
 882                                                 reg = <6>;
 883                                                 clocks = <&usb>;
 884                                         };
 885
 886                                         udpck: udpck {
 887                                                 #clock-cells = <0>;
 888                                                 reg = <7>;
 889                                                 clocks = <&usb>;
 890                                         };
 891
 892                                         pck0: pck0 {
 893                                                 #clock-cells = <0>;
 894                                                 reg = <8>;
 895                                                 clocks = <&prog0>;
 896                                         };
 897
 898                                         pck1: pck1 {
 899                                                 #clock-cells = <0>;
 900                                                 reg = <9>;
 901                                                 clocks = <&prog1>;
 902                                         };
 903
 904                                         pck2: pck2 {
 905                                                 #clock-cells = <0>;
 906                                                 reg = <10>;
 907                                                 clocks = <&prog2>;
 908                                         };
 909                                 };
 910
 911                                 periphck {
 912                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 913                                         #address-cells = <1>;
 914                                         #size-cells = <0>;
 915                                         clocks = <&mck>;
 916
 917                                         dbgu_clk: dbgu_clk {
 918                                                 #clock-cells = <0>;
 919                                                 reg = <2>;
 920                                         };
 921
 922                                         pioA_clk: pioA_clk {
 923                                                 #clock-cells = <0>;
 924                                                 reg = <6>;
 925                                         };
 926
 927                                         pioB_clk: pioB_clk {
 928                                                 #clock-cells = <0>;
 929                                                 reg = <7>;
 930                                         };
 931
 932                                         pioC_clk: pioC_clk {
 933                                                 #clock-cells = <0>;
 934                                                 reg = <8>;
 935                                         };
 936
 937                                         pioD_clk: pioD_clk {
 938                                                 #clock-cells = <0>;
 939                                                 reg = <9>;
 940                                         };
 941
 942                                         pioE_clk: pioE_clk {
 943                                                 #clock-cells = <0>;
 944                                                 reg = <10>;
 945                                         };
 946
 947                                         usart0_clk: usart0_clk {
 948                                                 #clock-cells = <0>;
 949                                                 reg = <12>;
 950                                                 atmel,clk-output-range = <0 66000000>;
 951                                         };
 952
 953                                         usart1_clk: usart1_clk {
 954                                                 #clock-cells = <0>;
 955                                                 reg = <13>;
 956                                                 atmel,clk-output-range = <0 66000000>;
 957                                         };
 958
 959                                         usart2_clk: usart2_clk {
 960                                                 #clock-cells = <0>;
 961                                                 reg = <14>;
 962                                                 atmel,clk-output-range = <0 66000000>;
 963                                         };
 964
 965                                         usart3_clk: usart3_clk {
 966                                                 #clock-cells = <0>;
 967                                                 reg = <15>;
 968                                                 atmel,clk-output-range = <0 66000000>;
 969                                         };
 970
 971                                         twi0_clk: twi0_clk {
 972                                                 reg = <18>;
 973                                                 #clock-cells = <0>;
 974                                                 atmel,clk-output-range = <0 16625000>;
 975                                         };
 976
 977                                         twi1_clk: twi1_clk {
 978                                                 #clock-cells = <0>;
 979                                                 reg = <19>;
 980                                                 atmel,clk-output-range = <0 16625000>;
 981                                         };
 982
 983                                         twi2_clk: twi2_clk {
 984                                                 #clock-cells = <0>;
 985                                                 reg = <20>;
 986                                                 atmel,clk-output-range = <0 16625000>;
 987                                         };
 988
 989                                         mci0_clk: mci0_clk {
 990                                                 #clock-cells = <0>;
 991                                                 reg = <21>;
 992                                         };
 993
 994                                         mci1_clk: mci1_clk {
 995                                                 #clock-cells = <0>;
 996                                                 reg = <22>;
 997                                         };
 998
 999                                         spi0_clk: spi0_clk {
1000                                                 #clock-cells = <0>;
1001                                                 reg = <24>;
1002                                                 atmel,clk-output-range = <0 133000000>;
1003                                         };
1004
1005                                         spi1_clk: spi1_clk {
1006                                                 #clock-cells = <0>;
1007                                                 reg = <25>;
1008                                                 atmel,clk-output-range = <0 133000000>;
1009                                         };
1010
1011                                         tcb0_clk: tcb0_clk {
1012                                                 #clock-cells = <0>;
1013                                                 reg = <26>;
1014                                                 atmel,clk-output-range = <0 133000000>;
1015                                         };
1016
1017                                         pwm_clk: pwm_clk {
1018                                                 #clock-cells = <0>;
1019                                                 reg = <28>;
1020                                         };
1021
1022                                         adc_clk: adc_clk {
1023                                                 #clock-cells = <0>;
1024                                                 reg = <29>;
1025                                                 atmel,clk-output-range = <0 66000000>;
1026                                         };
1027
1028                                         dma0_clk: dma0_clk {
1029                                                 #clock-cells = <0>;
1030                                                 reg = <30>;
1031                                         };
1032
1033                                         dma1_clk: dma1_clk {
1034                                                 #clock-cells = <0>;
1035                                                 reg = <31>;
1036                                         };
1037
1038                                         uhphs_clk: uhphs_clk {
1039                                                 #clock-cells = <0>;
1040                                                 reg = <32>;
1041                                         };
1042
1043                                         udphs_clk: udphs_clk {
1044                                                 #clock-cells = <0>;
1045                                                 reg = <33>;
1046                                         };
1047
1048                                         isi_clk: isi_clk {
1049                                                 #clock-cells = <0>;
1050                                                 reg = <37>;
1051                                         };
1052
1053                                         ssc0_clk: ssc0_clk {
1054                                                 #clock-cells = <0>;
1055                                                 reg = <38>;
1056                                                 atmel,clk-output-range = <0 66000000>;
1057                                         };
1058
1059                                         ssc1_clk: ssc1_clk {
1060                                                 #clock-cells = <0>;
1061                                                 reg = <39>;
1062                                                 atmel,clk-output-range = <0 66000000>;
1063                                         };
1064
1065                                         sha_clk: sha_clk {
1066                                                 #clock-cells = <0>;
1067                                                 reg = <42>;
1068                                         };
1069
1070                                         aes_clk: aes_clk {
1071                                                 #clock-cells = <0>;
1072                                                 reg = <43>;
1073                                         };
1074
1075                                         tdes_clk: tdes_clk {
1076                                                 #clock-cells = <0>;
1077                                                 reg = <44>;
1078                                         };
1079
1080                                         trng_clk: trng_clk {
1081                                                 #clock-cells = <0>;
1082                                                 reg = <45>;
1083                                         };
1084
1085                                         fuse_clk: fuse_clk {
1086                                                 #clock-cells = <0>;
1087                                                 reg = <48>;
1088                                         };
1089                                 };
1090                         };
1091
1092                         rstc@fffffe00 {
1093                                 compatible = "atmel,at91sam9g45-rstc";
1094                                 reg = <0xfffffe00 0x10>;
1095                         };
1096
1097                         pit: timer@fffffe30 {
1098                                 compatible = "atmel,at91sam9260-pit";
1099                                 reg = <0xfffffe30 0xf>;
1100                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1101                                 clocks = <&mck>;
1102                         };
1103
1104                         watchdog@fffffe40 {
1105                                 compatible = "atmel,at91sam9260-wdt";
1106                                 reg = <0xfffffe40 0x10>;
1107                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1108                                 atmel,watchdog-type = "hardware";
1109                                 atmel,reset-type = "all";
1110                                 atmel,dbg-halt;
1111                                 atmel,idle-halt;
1112                                 status = "disabled";
1113                         };
1114
1115                         sckc@fffffe50 {
1116                                 compatible = "atmel,at91sam9x5-sckc";
1117                                 reg = <0xfffffe50 0x4>;
1118
1119                                 slow_rc_osc: slow_rc_osc {
1120                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1121                                         #clock-cells = <0>;
1122                                         clock-frequency = <32768>;
1123                                         clock-accuracy = <50000000>;
1124                                         atmel,startup-time-usec = <75>;
1125                                 };
1126
1127                                 slow_osc: slow_osc {
1128                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
1129                                         #clock-cells = <0>;
1130                                         clocks = <&slow_xtal>;
1131                                         atmel,startup-time-usec = <1200000>;
1132                                 };
1133
1134                                 clk32k: slowck {
1135                                         compatible = "atmel,at91sam9x5-clk-slow";
1136                                         #clock-cells = <0>;
1137                                         clocks = <&slow_rc_osc &slow_osc>;
1138                                 };
1139                         };
1140
1141                         rtc@fffffeb0 {
1142                                 compatible = "atmel,at91rm9200-rtc";
1143                                 reg = <0xfffffeb0 0x30>;
1144                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1145                         };
1146                 };
1147
1148                 usb0: gadget@00500000 {
1149                         #address-cells = <1>;
1150                         #size-cells = <0>;
1151                         compatible = "atmel,at91sam9rl-udc";
1152                         reg = <0x00500000 0x100000
1153                                0xf8030000 0x4000>;
1154                         interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1155                         clocks = <&udphs_clk>, <&utmi>;
1156                         clock-names = "pclk", "hclk";
1157                         status = "disabled";
1158
1159                         ep0 {
1160                                 reg = <0>;
1161                                 atmel,fifo-size = <64>;
1162                                 atmel,nb-banks = <1>;
1163                         };
1164
1165                         ep1 {
1166                                 reg = <1>;
1167                                 atmel,fifo-size = <1024>;
1168                                 atmel,nb-banks = <3>;
1169                                 atmel,can-dma;
1170                                 atmel,can-isoc;
1171                         };
1172
1173                         ep2 {
1174                                 reg = <2>;
1175                                 atmel,fifo-size = <1024>;
1176                                 atmel,nb-banks = <3>;
1177                                 atmel,can-dma;
1178                                 atmel,can-isoc;
1179                         };
1180
1181                         ep3 {
1182                                 reg = <3>;
1183                                 atmel,fifo-size = <1024>;
1184                                 atmel,nb-banks = <2>;
1185                                 atmel,can-dma;
1186                         };
1187
1188                         ep4 {
1189                                 reg = <4>;
1190                                 atmel,fifo-size = <1024>;
1191                                 atmel,nb-banks = <2>;
1192                                 atmel,can-dma;
1193                         };
1194
1195                         ep5 {
1196                                 reg = <5>;
1197                                 atmel,fifo-size = <1024>;
1198                                 atmel,nb-banks = <2>;
1199                                 atmel,can-dma;
1200                         };
1201
1202                         ep6 {
1203                                 reg = <6>;
1204                                 atmel,fifo-size = <1024>;
1205                                 atmel,nb-banks = <2>;
1206                                 atmel,can-dma;
1207                         };
1208
1209                         ep7 {
1210                                 reg = <7>;
1211                                 atmel,fifo-size = <1024>;
1212                                 atmel,nb-banks = <2>;
1213                                 atmel,can-dma;
1214                         };
1215
1216                         ep8 {
1217                                 reg = <8>;
1218                                 atmel,fifo-size = <1024>;
1219                                 atmel,nb-banks = <2>;
1220                         };
1221
1222                         ep9 {
1223                                 reg = <9>;
1224                                 atmel,fifo-size = <1024>;
1225                                 atmel,nb-banks = <2>;
1226                         };
1227
1228                         ep10 {
1229                                 reg = <10>;
1230                                 atmel,fifo-size = <1024>;
1231                                 atmel,nb-banks = <2>;
1232                         };
1233
1234                         ep11 {
1235                                 reg = <11>;
1236                                 atmel,fifo-size = <1024>;
1237                                 atmel,nb-banks = <2>;
1238                         };
1239
1240                         ep12 {
1241                                 reg = <12>;
1242                                 atmel,fifo-size = <1024>;
1243                                 atmel,nb-banks = <2>;
1244                         };
1245
1246                         ep13 {
1247                                 reg = <13>;
1248                                 atmel,fifo-size = <1024>;
1249                                 atmel,nb-banks = <2>;
1250                         };
1251
1252                         ep14 {
1253                                 reg = <14>;
1254                                 atmel,fifo-size = <1024>;
1255                                 atmel,nb-banks = <2>;
1256                         };
1257
1258                         ep15 {
1259                                 reg = <15>;
1260                                 atmel,fifo-size = <1024>;
1261                                 atmel,nb-banks = <2>;
1262                         };
1263                 };
1264
1265                 usb1: ohci@00600000 {
1266                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1267                         reg = <0x00600000 0x100000>;
1268                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1269                         clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
1270                                  <&uhpck>;
1271                         clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1272                         status = "disabled";
1273                 };
1274
1275                 usb2: ehci@00700000 {
1276                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1277                         reg = <0x00700000 0x100000>;
1278                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1279                         clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1280                         clock-names = "usb_clk", "ehci_clk", "uhpck";
1281                         status = "disabled";
1282                 };
1283
1284                 nand0: nand@60000000 {
1285                         compatible = "atmel,at91rm9200-nand";
1286                         #address-cells = <1>;
1287                         #size-cells = <1>;
1288                         ranges;
1289                         reg = < 0x60000000 0x01000000   /* EBI CS3 */
1290                                 0xffffc070 0x00000490   /* SMC PMECC regs */
1291                                 0xffffc500 0x00000100   /* SMC PMECC Error Location regs */
1292                                 0x00110000 0x00018000   /* ROM code */
1293                                 >;
1294                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1295                         atmel,nand-addr-offset = <21>;
1296                         atmel,nand-cmd-offset = <22>;
1297                         atmel,nand-has-dma;
1298                         pinctrl-names = "default";
1299                         pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1300                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1301                         status = "disabled";
1302
1303                         nfc@70000000 {
1304                                 compatible = "atmel,sama5d3-nfc";
1305                                 #address-cells = <1>;
1306                                 #size-cells = <1>;
1307                                 reg = <
1308                                         0x70000000 0x10000000   /* NFC Command Registers */
1309                                         0xffffc000 0x00000070   /* NFC HSMC regs */
1310                                         0x00200000 0x00100000   /* NFC SRAM banks */
1311                                         >;
1312                         };
1313                 };
1314         };
1315 };